MPM3510A [MPS]
36V/1.2A Module Synchronous Step-Down Converter with Integrated Inductor;
| 型号： | MPM3510A |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | 36V/1.2A Module Synchronous Step-Down Converter with Integrated Inductor |
| 文件： | 总22页 (文件大小：544K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MPM3510A
36V/1.2A Module
Synchronous Step-Down Converter
with Integrated Inductor
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MPM3510A is a synchronous, rectified,
step-down converter with built-in power
MOSFETs, inductor, and two capacitors. It
offers a compact solution with only 4 external
components to achieve a 1.2A continuous
output current with excellent load and line
regulation over a wide input supply range. The
MPM3510A operates in a 1.15MHz switching
frequency, which provides fast load transient
response.
•
•
•
•
Complete Switch Mode Power Supply
4.5V to 36V Wide Operating Input Range
1.2A Continuous Load Current
80mΩ/50mΩ Low RDS(ON) Internal Power
MOSFETs
Fixed 1.15MHz Switching Frequency
800kHz to 2MHz Frequency Sync
Power-Save Mode for Light Load
Power Good Indicator
OCP with Valley-Current Detection and
Hiccup
Thermal Shutdown
Output Adjustable from 0.8V
Available in a QFN-19 (3mmx5mmx1.6mm)
Package
•
•
•
•
•
Full protection features include over-current
protection (OCP) and thermal shutdown (TSD).
•
•
•
The MPM3510A eliminates design and
manufacturing
risks
while
dramatically
improving time-to-market.
•
Total Solution Size 6.7mmx6.3mm
The MPM3510A is available in a space-saving
QFN-19 (3mmx5mmx1.6mm) package.
APPLICATIONS
•
•
•
•
•
•
•
Industrial Controls
Automotive
Medical and Imaging Equipment
Telecom Applications
LDO Replacement
Space and Resource-Limited Applications
Distributed Power Systems
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under Quality
Assurance.
“MPS” and “The Future of Analog IC Technology” are registered
trademarks of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
MPM3510A Rev. 1.0
www.MonolithicPower.com
1
7/21/2015
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
ORDERING INFORMATION
Part Number*
Package
Top Marking
MPM3510AGQV
QFN-19 (3mmx5mmx1.6mm)
See Below
* For Tape & Reel, add suffix –Z (eg. MPM3510AGQV –Z)
TOP MARKING
MP: MPS prefix
Y: Year code
W: Week code
3510A: First four digits of the part number
LLL: Lot number
M: Module
PACKAGE REFERENCE
MPM3510A Rev. 1.0
7/21/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
2
MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
ABSOLUTE MAXIMUM RATINGS (1)
VIN ................................................ -0.3V to 40V
VSW ....................................................................
-0.3V (-5V for <10ns) to VIN+0.3V (43V for
<10ns)
Thermal Resistance (5)
QFN-19 (3mmx5mmx1.6mm). 46...... 10... °C/W
θJA θJC
NOTES:
1) Absolute maximum ratings are rated under room temperature
unless otherwise noted. Exceeding these ratings may
damage the device.
2) For additional details on EN’s ABS MAX rating, please refer
to the “Enable/SYNC” section on page 12.
3) The maximum power dissipation is a function of the maximum
junction temperature TJ (MAX), the junction-to-ambient
thermal resistance θJA, and the ambient temperature TA. The
maximum allowable continuous power dissipation at any
ambient temperature is calculated by PD (MAX) = (TJ (MAX)-
TA)/θJA. Exceeding the maximum allowable power dissipation
will produce an excessive die temperature, causing the
regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
VBST ...................................................... VSW+6V
(2)
All other pins................................-0.3V to 6V
(3)
Continuous power dissipation (TA = +25°C)
............................................................2.7W
Junction temperature...............................150°C
Lead temperature ....................................260°C
Storage temperature..................-65°C to 150°C
Recommended Operating Conditions (4)
Supply voltage (VIN) ........................ 4.5V to 36V
Output voltage (VOUT)..............0.81V to VIN*DMax
Operating junction temp. (TJ). ..-40°C to +125°C
4) The device is not guaranteed to function outside of its
operating conditions.
5) Measured on JESD51-7, 4-layer PCB.
MPM3510A Rev. 1.0
7/21/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
3
MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 24V, TJ = -40°C to +125°C(6), unless otherwise noted. Typical values are at TJ = +25°C.
Parameter
Symbol Condition
Min
Typ
Max
8
Units
μA
Supply current (shutdown)
Supply current (quiescent)
HS switch-on resistance
LS switch-on resistance
Inductor DC resistance
Switch leakage
IIN
Iq
VEN = 0V
VFB = 1V
0.58
80
0.8
155
105
mA
mΩ
mΩ
mΩ
μA
HSRDS-ON VBST-SW = 5V
LSRDS-ON VCC = 5V
LDCR
50
75
SWLKG
VEN = 0V, VSW = 24V
1
High-side peak current limit IPEAK LIMIT 20% duty cycle
Low-side valley current limit IVALLEY LIMIT Vout short to GND
3
4.3
1.5
A
A
Oscillator frequency
fSW
VFB = 700mV
VFB = 700mV
800
89
1150
1500
kHz
Maximum duty cycle
Minimum on time(7)
DMAX
92
50
%
ns
τON MIN
TJ = 25°C
798
790
810
822
830
100
mV
mV
nA
Feedback voltage
VFB
TJ = -40°C to +125°C
VFB = 850mV
Feedback current
EN rising threshold
IFB
10
VEN_RISING
1.1
1.45
1.8
1.65
7
V
V
EN falling threshold
EN input current
VEN_FALLING
IEN
0.95
1.3
4
VEN = 2V
μA
μs
EN turn-off delay(7)
ENTd-off
fSYNC
3
SYNC frequency range
800
2000
4.35
kHz
VIN under-voltage lockout
threshold—rising
INUVVth
3.75
4.05
400
V
VIN under-voltage lockout
threshold—hysteresis
INUVHYS
mV
PG rising threshold
PG falling threshold
PG rising delay
PGVth-Hi
PGVth-Lo
PGTd Rising
PGTd Falling
VPG
84%
79%
30
87.5%
82.5%
90
91%
86%
160
95
VFB
VFB
μs
μs
V
PG falling delay
25
55
PG sink current capability
PG leakage current
VCC regulator
Sink 4mA
0.4
100
5.2
4
IPG-LEAK
VCC
nA
V
4.6
0.5
4.9
1.5
VCC load regulation
ICC = 5mA
%
Soft-start time
tSS
VOUT from 10% to 90%
1.45
165
20
2.5
ms
°C
°C
Thermal shutdown (7)
Thermal hysteresis (7)
NOTES:
6) Not tested in production and guaranteed by over-temperature correlation.
7) Derived from characterization test. Not tested in production.
MPM3510A Rev. 1.0
7/21/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
4
MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
Typical performance characteristic waveforms are produced from the evaluation board.
VIN = 24V, VOUT = 3.3V, TA = 25°C, unless otherwise noted.
Efficiency vs. Load Current
VOUT =5V
Efficiency vs. Load Current
VOUT =3.3V
Efficiency vs. Load Current
VOUT =2.5 V
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
V
=5V
V
=12V
IN
IN
V
=5V
IN
V
=12V
IN
V
=24V
IN
V
=12V
IN
V
=24V
IN
V
=36V
0.1
IN
V
=24V
IN
V
=36V
IN
V
=36V
IN
0.01
1
10
0.01
0.1
1
10
0.01
0.1
1
10
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
Efficiency vs. Load Current
VOUT =1.8V
Efficiency vs. Load Current
VOUT =1.5V
Efficiency vs. Load Current
VOUT =1.2V
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
V
=5V
IN
V
=5V
IN
V
=5V
IN
V
=12V
IN
V
=12V
IN
V
=12V
IN
V
=24V
IN
V
=24V
IN
0.01
0.1
1
10
0.01
0.1
1
10
0.01
0.1
1
10
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
Efficiency vs. Load Current
VOUT =1V
Line Regulation
VOUT =3.3V
Load Regulation
VOUT =5V
100
95
90
85
80
75
70
65
60
55
50
1
0.5
0
3
2.5
2
1.5
1
0.5
0
-0.5
-1
-1.5
-2
-2.5
-3
V
=36V
IN
V
=5V
IN
I
= 0A
OUT
V
=24V
IN
V
=12V
IN
V
=12V
IN
I
= 1.2A
OUT
I
= 0.6A
OUT
-0.5
-1
0.01
0.1
1
10
4
8
12 16 20 24 28 32 36
INPUT VOLTAGE (V)
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
LOAD CURRENT (A)
LOAD CURRENT (A)
MPM3510A Rev. 1.0
7/21/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
5
MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Typical performance characteristic waveforms are produced from the evaluation board.
VIN = 24V, VOUT = 3.3V, TA = 25°C, unless otherwise noted.
Load Regulation
VOUT =3.3V
Load Regulation
VOUT =2.5V
Load Regulation
VOUT =1.8V
1
0.5
0
1
0.5
0
1
0.5
0
V
=36V
IN
V
=36V
IN
V
=24V
IN
V
=24V
IN
V
=24V
IN
V
=5V
IN
V
=5V
IN
V
=5V
IN
V
=12V
IN
V
=12V
V
=12V
IN
IN
-0.5
-1
-0.5
-1
-0.5
-1
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
LOAD CURRENT (A)
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
LOAD CURRENT (A)
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
LOAD CURRENT (A)
Load Regulation
VOUT =1.5V
Load Regulation
VOUT =1.2V
Load Regulation
VOUT =1V
1
0.8
0.6
0.4
0.2
0
1
0.8
0.6
0.4
0.2
0
1
0.8
0.6
0.4
0.2
0
V
=24V
IN
V
=12V
V
=12V
IN
IN
V
=12V
IN
V
=5V
IN
V
=5V
IN
-0.2
-0.4
-0.6
-0.8
-1
-0.2
-0.4
-0.6
-0.8
-1
-0.2
-0.4
-0.6
-0.8
-1
V
=5V
IN
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
LOAD CURRENT (A)
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
LOAD CURRENT (A)
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
LOAD CURRENT (A)
Bode Plot
IOUT =1.2A
Quiescent Current vs.
Input Voltage
Peak Current vs.
Duty Cycle
60
40
20
0
5
4.8
4.6
4.4
4.2
4
180
120
60
0.8
0.75
0.7
Phase
0.65
0.6
0
3.8
3.6
3.4
3.2
3
Gain
0.55
0.5
-20
-40
-60
-60
-120
-180
0.45
0.4
0
0
20
40
60
80
100
1,000
10,000
100,000 1,000,000
5
10 15 20 25 30 35 40
INPUT VOLTAGE (V)
FREQUENCY(Hz)
DUTY CYCLE(
)
MPM3510A Rev. 1.0
7/21/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
6
MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Typical performance characteristic waveforms are produced from the evaluation board.
VIN = 24V, VOUT = 3.3V, TA = 25°C, unless otherwise noted.
Case Temperature Rise vs.
Output Current
VOUT =5V
Case Temperature Rise vs.
Output Current
VOUT =3.3V
Disabled Supply Current
vs. Input Voltage
45
40
35
30
25
20
15
10
5
2
1.8
1.6
1.4
1.2
1
60
50
40
30
20
10
0
V
=24V
IN
V
=24V
IN
0.8
0.6
0.4
0.2
0
V
1
=12V
IN
V
=12V
IN
0
0
5
10 15 20 25 30 35 40
INPUT VOLTAGE (V)
0
0.2 0.4 0.6 0.8
1.2 1.4
0
0.2 0.4 0.6 0.8
1
1.2 1.4
LOAD CURRENT (A)
LOAD CURRENT (A)
Maximum V
IN
vs. Output Volatge
40
35
30
25
20
15
10
5
0
0.8
1.8
2.8
3.8
4.8
5.8
OUTPUT VOLTAGE(V)
MPM3510A Rev. 1.0
7/21/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
7
MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Typical performance characteristic waveforms are produced from the evaluation board.
VIN = 24V, VOUT = 3.3V, TA = 25°C, unless otherwise noted.
Start-Up through
Start-Up through
Shutdown through
Input Voltage
Input Voltage
Input Voltage
IOUT=0A
IOUT=1.2A
I
= 0A
OUT
V
V
V
OUT
OUT
OUT
2V/div.
2V/div.
2V/div.
PG
PG
PG
5V/div.
5V/div.
5V/div.
V
V
V
IN
IN
IN
10V/div.
10V/div.
10V/div.
SW
SW
SW
10V/div.
10V/div.
10V/div.
I
I
OUT
OUT
I
OUT
1A/div.
1A/div.
2A/div.
Shutdown through
Start-Up through Enable
Start-Up through Enable
I
= 0A
IOUT=1.2A
OUT
Input Voltage
IOUT=1.2A
V
V
OUT
OUT
V
OUT
2V/div.
2V/div.
2V/div.
PG
PG
PG
5V/div.
5V/div.
5V/div.
EN
5V/div.
EN
5V/div.
V
IN
10V/div.
SW
20V/div.
SW
20V/div.
SW
20V/div.
I
I
I
OUT
OUT
OUT
1A/div.
2A/div.
1A/div.
Shutdown through Enable
Shutdown through Enable
SCP Entry
I
= 0A
I
= 1.2A
I
= 0A
OUT
OUT
OUT
V
V
V
OUT
OUT
OUT
2V/div.
2V/div.
2V/div.
PG
PG
5V/div.
5V/div.
PG
5V/div.
EN
5V/div.
EN
5V/div.
V
IN
10V/div.
SW
SW
SW
20V/div.
20V/div.
20V/div.
I
I
I
OUT
OUT
OUT
2A/div.
1A/div.
5A/div.
MPM3510A Rev. 1.0
7/21/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
8
MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Typical performance characteristic waveforms are produced from the evaluation board.
VIN = 24V, VOUT = 3.3V, TA = 25°C, unless otherwise noted.
SCP Recovery
SCP Steady State
Load Transient
IOUT = 0A
IOUT = 0A-1.2A
V
OUT
2V/div.
V
OUT
PG
20V/div.
2V/div.
V
/AC
OUT
PG
5V/div.
50mV/div.
V
IN
V
IN
20V/div.
20V/div.
SW
20V/div.
SW
20V/div.
I
OUT
I
500mA/div.
I
OUT
OUT
5A/div.
5A/div.
Output Ripple
Output Ripple
Output Ripple
I
= 0A
I
= 0A
I
= 1.2A
OUT
OUT
OUT
V
/AC
V
/AC
OUT
V
/AC
OUT
OUT
10mV/div.
20mV/div.
20mV/div.
V
V
IN
IN
V
IN
20V/div.
20V/div.
10V/div.
SW
10V/div.
OUT
1A/div.
SW
10V/div.
OUT
1A/div.
I
OUT
500mA/div.
I
I
SW
10V/div.
MPM3510A Rev. 1.0
7/21/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
9
MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
PIN FUNCTIONS
Package
Pin #
Name
Description
Feedback. Connect FB to the tap of an external resistor divider from the output to
AGND to set the output voltage. To prevent current-limit runaway during a short-
circuit fault, the frequency foldback comparator lowers the oscillator frequency when
the FB voltage is below 400mV. Place the resistor divider as close to FB as possible.
Avoid placing vias on the FB traces.
1
FB
Internal 5V LDO output. The module integrates a LDO output capacitor, so there is
no need to add an external capacitor.
2
3
VCC
Analog ground. AGND is the reference ground of the logic circuit. AGND is
connected internally to PGND.
AGND
Switch output. No connection is needed for the SW pins, but a large copper plane is
recommended on pins 4, 5, and 6 to improve heat sink.
4, 5, 6
7, 8, 9
SW
OUT
NC
Power output. Connect the load to OUT. An output capacitor is needed.
10, 14, 18,
19,
No connection. Do NOT connect. NC must be left floating.
Bootstrap. A bootstrap capacitor is integrated internally, so external connections are
not needed.
11
BST
Power ground. PGND is the reference ground of the power device. PCB layout
requires extra care (see recommended “PCB Layout Guidelines” on page 16). For
best results, connect to PGND with copper and vias.
12, 13
PGND
Supply voltage. IN supplies the power for the internal MOSFET and regulator. The
MPM3510A operates from a +4.5V to +36V input rail. IN requires a low ESR and low
inductance capacitor to decouple the input rail. Place the input capacitor very close to
IN and connect it with wide PCB traces and multiple vias.
15
IN
Enable/synchronize. EN=high to enable the module. Float EN or connect it to
16
17
EN/SYNC ground to disable the converter. Apply an external clock to EN to change the
switching frequency.
PG
Power good indicator. PG is an open-drain structure.
MPM3510A Rev. 1.0
7/21/2015
www.MonolithicPower.com
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© 2015 MPS. All Rights Reserved.
10
MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
FUNCTIONAL BLOCK DIAGRAM
Figure 1: Functional Block Diagram
MPM3510A Rev. 1.0
7/21/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
11
MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
OPERATION
The
MPM3510A
is
a
high-frequency,
synchronous, rectified, step-down, switch-mode
converter with built-in power MOSFETs,
inductor, and two capacitors. It offers a very
compact solution that achieves
a
1.2A
continuous output current with excellent load
and line regulation over a 4.5V to 36V input
supply range.
Figure 2: Simplified AAM Control Logic
Error Amplifier (EA)
The error amplifier compares the FB voltage to
the internal 0.81V reference (VREF) and outputs
a current proportional to the difference between
the two. This output current then charges or
discharges the internal compensation network
to form the COMP voltage, which controls the
power MOSFET current. The optimized, internal
compensation network minimizes the external
component count and simplifies the control loop
design.
The MPM3510A operates in a fixed-frequency,
peak-current–control mode to regulate the
output voltage. An internal clock initiates a
PWM cycle. The integrated high-side power
MOSFET (HS-FET) turns on and remains on
until the current reaches the value set by the
COMP voltage. When the power switch is off, it
remains off until the next clock cycle starts. If
the current in the HS-FET does not reach the
value set by the COMP value within 92% of one
PWM period, the HS-FET is forced off.
Under-Voltage Lockout (UVLO)
Internal Regulator
Under-voltage lockout (UVLO) protects the chip
from operating at an insufficient supply voltage.
The MPM3510A UVLO comparator monitors
the output voltage of the internal regulator
(VCC). The UVLO rising threshold is about
4.05V while its falling threshold is 3.65V.
A 5V internal regulator powers most of the
internal circuitries. This regulator takes VIN and
operates in the full VIN range. When VIN
exceeds 5V, the output of the regulator is in full
regulation. When VIN is less than 5V, the output
decreases. The part integrates an internal
decoupling capacitor, so there is no need to
add an external VCC output capacitor.
ENABLE/SYNC
EN is a control pin that turns the regulator on
and off. Drive EN high to turn on the regulator;
drive EN low to turn off the regulator. An
internal 1Mꢀ resistor from EN to GND allows
EN to be floated to shut down the chip.
AAM Operation
The MPM3510A has advanced asynchronous
modulation (AAM) power-save mode for light
load (see Figure 2). AAM voltage (VAAM) is fixed
internally. The internal 250mV AAM voltage
sets the transition point from AAM to PWM.
Under a heavy-load condition, the VCOMP is
higher than VAAM. When the clock goes high,
the HS-FET turns on and remains on until
VILsense reaches the value set by the COMP
voltage. The internal clock re-sets every time
EN is clamped internally using a 6.5V series-
Zener-diode (see Figure 3). Connecting the EN
input through a pull-up resistor to the voltage on
VIN limits the EN input current to less than
100µA.
For example, with 12V connected to Vin, RPULLUP
≥ (12V – 6.5V) ÷ 100µA = 55kꢀ.
VCOMP is higher than VAAM
.
Connecting EN directly to a voltage source
without a pull-up resistor requires limiting the
amplitude of the voltage source to ≤6V to
prevent damage to the Zener diode.
Under a light-load condition, the value of VCOMP
is low. When VCOMP is less than VAAM and VFB is
less than VREF, VCOMP ramps up until it exceeds
VAAM. During this time, the internal clock is
blocked. This will make the MPM3510A skip
pulses for pulse frequency modulation (PFM)
mode, achieving the light-load power save.
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MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
This protection mode is useful when the output
is dead shorted to ground and greatly reduces
the average short-circuit current to alleviate
thermal issues and protect the regulator. The
MPM3510A exits hiccup mode once the over-
Figure 3: 6.5V Zener Diode Connection
current condition is removed.
Connect an external clock with a range of
800kHz to 2MHz to synchronize the internal
clock rising edge to the external clock rising
edge. The pulse width of the external clock
signal should be less than 700ns.
Thermal Shutdown (TSD)
Thermal shutdown prevents the chip from
operating at exceedingly high temperatures.
When the die temperatures exceed 165°C, the
device stops switching. When the temperature
drops below its lower threshold (145°C,
typically), the power supply resumes operation.
Internal Soft Start (SS)
The soft start prevents the converter output
voltage from overshooting during start-up.
When the chip starts, the internal circuitry
generates a soft-start voltage (SS) that ramps
Floating Driver and Bootstrap Charging
An internal bootstrap capacitor powers the
floating power MOSFET driver. A dedicated
internal regulator (see Figure 4) charges and
regulates the bootstrap capacitor voltage to ~5V.
When the voltage between the BST and SW
nodes drops below regulation, a PMOS pass
transistor connected from VIN to BST turns on.
The charging current path is from VIN to BST,
and then to SW. The external circuit should
provide enough voltage headroom to facilitate
charging. As long as VIN is significantly higher
than SW, the bootstrap capacitor remains
charged. When the HS-FET is on (VIN≈VSW), the
bootstrap capacitor cannot charge. When the
LS-FET is on, VIN–VSW reaches its maximum
value for fast charging. When there is no
inductor current (VSW=VOUT), the difference
between VIN and VOUT charges the bootstrap
capacitor. The floating driver has its own UVLO
protection with a rising threshold of 2.2V and a
hysteresis of 150mV.
up from 0V to 5V. When SS is lower than VREF
,
the error amplifier uses SS as the reference.
When SS is higher than VREF, the error amplifier
uses VREF as the reference. The SS time is set
internally to 1.3ms.
Over-Current Protection (OCP) and Hiccup
The MPM3510A has cycle-by-cycle peak
current limit protection and valley-current
detection protection. The inductor current is
monitored during the HS-FET on state. If the
inductor current exceeds the current-limit value
set by the COMP high clamp voltage, the HS-
FET turns off immediately. Then the low-side
MOSFET (LS-FET) turns on to discharge the
energy, and the inductor current decreases.
The HS-FET remains off unless the inductor
valley current is lower than a certain current
threshold (the valley-current limit), even though
the internal CLK pulses high. If the inductor
current doesn’t drop below the valley-current
limit when the internal CLK pulses high, the HS-
FET will miss the CLK, and the switching
frequency will decrease to half the nominal
value. Both the peak and valley current limits
assist in keeping the inductor current from
running away during an over-load or short-
circuit condition.
If the output voltage drops below the under-
voltage (UV) threshold (50% below the
reference), the MPM3510A enters hiccup mode
to re-start the part periodically (simultaneously
the peak current limit is kicked) .
Figure 4: Internal Bootstrap Charging Circuit
MPM3510A Rev. 1.0
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MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
Start-Up and Shutdown
If VIN exceeds its thresholds, the chip starts up.
The reference block starts first, generating
stable reference voltage and currents; then the
internal regulator is enabled. The regulator
provides a stable supply for the remaining
circuitries.
Three events can shut down the chip: VIN low,
EN low, and thermal shutdown. During the
shutdown procedure, the signaling path is
blocked first to avoid any fault triggering. The
COMP voltage and the internal supply rail are
then pulled down. The floating driver is not
subject to this shutdown command.
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MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
APPLICATION INFORMATION
Setting the Output Voltage
Since C1 absorbs the input switching current, it
requires an adequate ripple-current rating. The
RMS current in the input capacitor can be
estimated with Equation (2) and Equation (3):
The external resistor divider sets the output
voltage (see the “Typical Application” on page
1). Also, the feedback resistor (R1) sets the
feedback loop bandwidth with the internal
compensation capacitor (see the “Typical
Application” on page 1). Choose R1 around
75kꢀ when VOUT ≥ 1V. R2 is then given using
Equation (1):
⎛
⎞
⎟
VOUT
VIN
VOUT
VIN
⎜
IC1 = ILOAD
×
× 1−
(2)
⎜
⎝
⎟
⎠
The worse case condition occurs at VIN = 2VOUT
where:
,
R1
ILOAD
R2 =
IC1
=
(3)
(1)
2
V
OUT
− 1
For simplification, choose an input capacitor
with an RMS current rating greater than half of
the maximum load current.
0.81V
The input capacitor can be electrolytic, tantalum,
or ceramic. When using electrolytic or tantalum
capacitors, add a small, high-quality ceramic
capacitor (e.g. 0.1μF) placed as close to the IC
as possible. When using ceramic capacitors,
ensure that they have enough capacitance to
provide sufficient charge in order to prevent
excessive voltage ripple at the input. The input
voltage ripple caused by capacitance can be
estimated with Equation (4):
Figure 5: Feedback Network
See Table 1 and Figure 5 for the feedback
network and a list of the recommended resistor
values for common output voltages.
Table 1: Resistor Selection for Common Output
Voltages
⎛
⎞
⎟
⎠
ILOAD
VOUT
VOUT
(4)
ΔV
=
×
× 1−
⎜
IN
fS ×C1
V
IN
V
IN
⎝
VOUT (V)
R1 (kΩ)
R2 (kΩ)
C3(pF)
Selecting the Output Capacitor
1.0
1.2
1.5
1.8
2.5
3.3
5
75
75
75
75
75
75
75
300
150
91
33
33
22
22
22
22
22
The output capacitor (C2) maintains the DC
output voltage. Use ceramic, tantalum, or low
ESR electrolytic capacitors. For best results,
use low ESR capacitors to keep the output
voltage ripple low. The output voltage ripple can
be estimated with Equation (5):
62
36
24
(5)
⎛
⎞
⎟
⎠
VOUT
⎛
VOUT
⎞
⎟
⎠
1
14.3
ΔVOUT
=
× 1−
× R
+
⎜
⎜
ESR
fS ×L1
V
8× fS ×C2
⎝
IN
⎝
Where L1 is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous, therefore, it requires a capacitor
to supply the AC current to the converter while
maintaining the DC input voltage. Use low ESR
capacitors for the best performance. Use
ceramic capacitors with X5R or X7R dielectrics
for best results because of their low ESR and
small temperature coefficients. For most
applications, use a 4.7µF capacitor.
For ceramic capacitors, the capacitance
dominates the impedance at the switching
frequency, and the capacitance causes the
majority of the output voltage ripple. For
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MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
2. Ensure the high-current paths at GND and
IN have short, direct, and wide traces.
simplification, the output voltage ripple can be
estimated with Equation (6):
3. Place the ceramic input capacitor close to
IN and PGND. Keep the connection of the
input capacitor and IN as short and wide as
possible.
VOUT
8× fS2 ×L1 ×C2
⎛
VOUT
⎞
⎟
⎠
(6)
ΔVOUT
=
× 1−
⎜
V
⎝
IN
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output ripple
can be approximated with Equation (7):
4. Place the external feedback resistors next
to FB.
5. Keep the feedback network away from the
VOUT
VOUT
⎛
⎞
(7)
switching node.
ΔVOUT
=
× 1−
×RESR
⎜
⎟
⎠
fS ×L1
V
IN
NOTE:
⎝
8) The recommended layout is based on Figure 8 and the
“Typical Application Circuits” on page 18.
The characteristics of the output capacitor
affect the stability of the regulation system. The
MPM3510A can be optimized for a wide range
of capacitance and ESR values.
External Bootstrap Diode
An external bootstrap diode can enhance the
efficiency of the regulator given the following
conditions:
z VOUT is 5V or 3.3V;
VOUT
z the duty cycle is high: D=
>65%
VIN
In these cases, add an external BST diode from
VCC to BST (see Figure 6).
Top Layer
Figure 6: Optional External Bootstrap Diode to
Enhance Efficiency
The recommended external BST diode is
IN4148.
PCB Layout Guidelines(8)
Efficient PCB layout is critical to achieve stable
operation, especially for input capacitor
placement. For best results, refer to Figure 7
and follow the guidelines below:
Bottom Layer
1. Use a large ground plane to connect
directly to PGND. If the bottom layer is
ground plane, add vias near PGND.
Figure 7: Recommended PCB Layout
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MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
Design Example
Table 2 below is a design example following the
application guidelines for the specifications
below:
Table 2: Design Example
VIN
VOUT
Io
24V
3.3V
1.2A
The detailed application schematic is shown in
Figure 8. The typical performance and circuit
waveforms have been shown in the “Typical
Performance Characteristics” section. For
additional device applications, please refer to
the related evaluation board datasheets.
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MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
TYPICAL APPLICATION CIRCUITS
Figure 7: VOUT = 5V, IOUT = 1.2A
Figure 8: VOUT = 3.3V, IOUT = 1.2A
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MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
Figure 9: VOUT = 2.5V, IOUT = 1.2A
Figure 10: VOUT = 1.8V, IOUT = 1.2A
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MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
Figure 11: VOUT = 1.5V, IOUT = 1.2A
Figure 12: VOUT = 1.2V, IOUT = 1.2A
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MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
Figure 13: VOUT = 1V, IOUT = 1.2A
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MPM3510A –SYNCHRONOUS STEP-DOWN MODULE CONVERTER
PACKAGE INFORMATION
QFN-19 (3mm x 5mm x 1.6mm)
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
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