MX25L12875FMI-10G [Macronix]
Flash, 32MX4, PDSO16, 0.300 INCH, HALOGEN FREE AND ROHS COMPLIANT, MS-013, SOP-16;
| 型号： | MX25L12875FMI-10G |
| 厂家： | 
MACRONIX INTERNATIONAL |
| 描述： | Flash, 32MX4, PDSO16, 0.300 INCH, HALOGEN FREE AND ROHS COMPLIANT, MS-013, SOP-16 时钟 光电二极管 内存集成电路 |
| 文件： | 总4页 (文件大小：251K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
APPLICATION NOTE
Macronix MX25Lxx35E/F and MX25Lxx75E/F comparison
1. Introduction
Macronix offers MX25Lxx35E/F multi-I/O serial flash in densities from 16Mb to 256Mb. The
default I/O mode is Single and Dual I/O only. To enable Quad I/O, HOLD# and WP# must be
re-tasked from control inputs to data I/O pins by setting QE=1 (Status Register bit-6). However,
some applications may require Quad I/O as the default mode, so Macronix now offers
MX25Lxx75E/F from 32Mb to 128Mb with QE preset to ‘1’ . The MX25Lxx35E/F and
MX25Lxx75E/F are identical in all ways except the default QE bit status. This application note
explains this difference in more detail.
2. Status Register Comparison
Both flash families have identical function--only Status Register bit-6 (QE) has a different
default setting before shipping.
Status Register bit
WIP
Macronix 25Lxx35E/F Macronix 25Lxx75E/F
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
0
0
0
0
0
0
0
0
0
0
0
0
1 = write operation
WEL
1 = write enable
BP0
Level of protected block
BP1
Level of protected block
BP2
Level of protected block
BP3
Level of protected block
QE
Bit 6
Bit 7
0
0
1
0
Quad I/O Enable = 1
Quad I/O Disable = 0
SRWD
1 = status register write
disable
3. Quad Mode Introduction (QE bit setting)
When QE (Status Register bit-6) is set to ’1’, Quad I/O mode is enabled. WP# and HOLD#
functions are re-tasked as data I/O pins only. In other words, HPM (hardware protection) and
hold functions can’t be used in Quad I/O mode. If the system requires either function, it may set
QE=0 to return to Single and Dual I/O mode only.
Note: The QE bit (SR.6) is non-volatile and can be set or cleared by the customer or programmer at any time by
using the WRSR command (01h).
Publication Number: AN-175V2
1
July 25, 2012
APPLICATION NOTE
Macronix MX25Lxx35E/F and MX25Lxx75E/F comparison
4. QE Bit of MX25Lxx75E/F Usage in Application
The default QE bit value of the MX25Lxx75E/F is ‘1’. If the system needs Quad I/O mode to
be set permanently, there is no need to change the default QE bit value. However, if WP# or
Hold# functions are needed at any time, they can be re-enabled by setting the QE bit to ‘0’.
Please note that if WP# or Hold# functions are not needed and Quad I/O mode is not used,
Single I/O and Dual I/O modes still work with the default setting of QE=1. There is no need for
the system to change the default QE bit setting.
Figure 1 and Figure 2 show 4 x I/O mode and Quad I/O mode waveforms. When either I/O
mode is used, WP# and Hold# pins are used as data I/O pins only. Their original hardware input
control functions are disabled and will not be active until QE bit is cleared to ’0’.
Figure1: 4xI/O mode ( 1-1-4 mode) wavefrom
Figure2: Quad I/O mode ( 1-4-4 mode) waveform
Publication Number: AN-175V2
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July 25, 2012
APPLICATION NOTE
Macronix MX25Lxx35E/F and MX25Lxx75E/F comparison
5. Summary
Macronix MX25Lxx35E/F and MX25Lxx75E/F have identical functions and performance.
Their usage depends on the application requirement; select MX25Lxx75E/F for those
applications needing Quad I/O mode as the factory default setting.
6. Appendix
The table will show cross device between MX25Lxx35E/F and MX25Lxx75E/F.
MX25Lxx35E/F
(default: QE = 0)
MX25Lxx75E/F
(default: QE = 1)
Density
Package
MX25L3235EMI-10G
MX25L3235EM2I-10G
MX25L3235EZNI-10G
MX25L6435EMI-10G
MX25L6435EM2I-10G
MX25L6435EZNI-10G
MX25L12835FMI-10G
MX25L12835FM2I-10G
MX25L12835FZNI-10G
MX25L12835FZ2I-10G
MX25L3275EMI-10G
MX25L3275EM2I-10G
MX25L3275EZNI-10G 6x5mm 8-WSON
MX25L6475EMI-10G
MX25L6475EM2I-10G
MX25L6475EZNI-10G 6x5mm 8-WSON
MX25L12875FMI-10G
MX25L12875FM2I-10G
MX25L12875FZNI-10G 6x5mm 8-WSON
MX25L12875FZ2I-10G 8x6mm 8-WSON
300mil 16-SOP
209mil 8-SOP
32Mb
300mil 16-SOP
209mil 8-SOP
64Mb
300mil 16-SOP
209mil 8-SOP
128Mb
7. Data Sheet Version
The following data sheets are used for comparison in this application note.
Data sheet
MX25L3235E
MX25L3275E
MX25L6435E
MX25L6475E
MX25L12835F
MX25L12875F
Location
Website
Website
Website
Website
Website
Website
Date Issue
May. 07, 2012
Apr. 24, 2012
Apr. 19, 2012
Apr. 24, 2012
Apr. 17, 2012
Jun. 15, 2012
Revision
Rev. 1.0
Rev. 0.00
Rev. 0.05
Rev. 0.00
Rev. 0.01
Rev. 0.00
Note:
1. Macronix data sheet is subject to change without notice.
2. For more functional and parametric specifications, please refer to the datasheet on the Macronix Website at
http://www.macronix.com/ and go to: Products/Flash Memory/Serial Flash.
Publication Number: AN-175V2
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July 25, 2012
APPLICATION NOTE
Macronix MX25Lxx35E/F and MX25Lxx75E/F comparison
Except for customized products which have been expressly identified in the applicable agreement,
Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial,
personal, and/or household applications only, and not for use in any applications which may, directly
or indirectly, cause death, personal injury, or severe property damages. In the event Macronix
products are used in contradicted to their target usage above, the buyer shall take any and all actions
to ensure said Macronix's product qualified for its actual use in accordance with the applicable laws
and regulations; and Macronix as well as it’s suppliers and/or distributors shall be released from any
and all liability arisen therefrom.
Copyright© Macronix International Co., Ltd. 2011~2012. All rights reserved, including the trademarks
and tradename thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider,
NBit, Nbit, NBiit, Macronix NBit, eLiteFlash, HybridNVM, HybridFlash, XtraROM, Phines, KH Logo,
BE-SONOS, KSMC, Kingtech, MXSMIO, Macronix vEE, Macronix MAP, Rich Au-dio, Rich Book, Rich
TV, and FitCAM. The names and brands of third party referred thereto (if any) are for identification
purposes only
For the contact and order information, please visit Macronix’s Web site at: http://www.macronix.com
Publication Number: AN-175V2
4
July 25, 2012
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