UPD16510 [NEC]
VERTICAL DRIVER FOR CCD SENSOR; 垂直驱动器，用于CCD传感器
| 型号： | UPD16510 |
| 厂家： | 
NEC |
| 描述： | VERTICAL DRIVER FOR CCD SENSOR |
| 文件： | 总16页 (文件大小：72K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
MOS INTEGRATED CIRCUIT
µ PD16510
VERTICAL DRIVER FOR CCD SENSOR
The µPD16510 is a vertical driver dedicated for CCD area image sensors that incorporates a level conversion
circuit and a three-level output function. It contains a CCD vertical register driver (4 channels) and a VOD shutter
driver (1 channel).
The µPD16510, which uses the CMOS process, provides optimum transmission delay and output ON resistance
characteristics for the vertical drive of CCD sensors. It can be used for low-voltage logic (logic power-supply voltage:
2.0 to 5.5 V).
FEATURES
•
•
•
•
•
•
•
CCD vertical register driver : 4 channels, VOD shutter driver: 1 channel
Small package
: 20-pin plastic shrink SOP (225 mil)
: 33 V MAX.
High breakdown voltage
Low output ON resistance : 30 Ω TYP.
Low voltage operation (logic power-supply voltage: 2.0 to 5.5 V)
Latch-up free
Pin-compatible with µPD16506 (CCD driver)
APPLICATIONS
•
Camcorders
ORDERING INFORMATION
Part Number
Package
µ PD16510GR-8JG
20-pin plastic shrink SOP (225 mil)
The information in this document is subject to change without notice.
Document No. S12191EJ2V0DS00 (2nd edition)
(Previous No. IC-3448)
The mark
shows major revised points.
Date Published May 1997 N
Printed in Japan
1994
µPD16510
BLOCK DIAGRAM
V
sb
20
16
2
4
V
V
DD2a
DD2b
V
DD1
19
V
DD1
V
DD2a
V
SS
Three
5
3
TO
1
level
TI
1
7
V
SS
V
DD2b
PG
BI
1
1
8
9
Two
level
BO
1
V
SS
V
DD1
Input interface
(2.0 to 5.5 V)
V
DD2a
TI
2
14
13
12
Three
level
17 TO
2
PG
2
2
V
SS
V
DD2b
BI
Two
level
18 BO
2
SUBI 10
NC 11
V
SS
sb
V
Two
level
1
SUBO
V
CC
6
V
SS
GND 15
2
µPD16510
PIN CONFIGURATION
20-pin plastic shrink SOP (225 mil)
SUBO
1
2
20
19
18
17
16
15
14
13
12
11
V
sb
VSS
VDD2b
BO
1
3
BO
TO
2
VDD2a
4
2
TO
1
5
VDD1
VCC
6
GND
TI
PG
BI
NC
TI
1
1
1
7
2
PG
BI
8
2
9
2
SUBI
10
Remark The µPD16510 is pin-compatible with the µPD16506 (CCD driver).
However, the VOD shutter drive pulse input polarity switching pin (SSP) of the µPD16506 corresponds
to the GND pin in the µPD16510 (pin 15).
PIN FUNCTIONS
No.
1
Symbol
SUBO
VSS
I/O
O
–
O
–
O
–
I
Pin Function
VOD shutter drive pulse output
2
VL power supply
3
BO1
VDD2a
TO1
VCC
Two-level pulse output
4
VMa (Three-level driver) power supply
Three-level pulse output
5
6
Logic power supply
7
TI1
Three-level driver input (See Functions table on p. 4)
8
PG1
BI1
I
9
I
Two-level driver input (See Functions table on p. 4)
VOD shutter drive pulse input
10
11
12
13
14
15
16
17
18
19
20
SUBI
NC
I
–
I
Non connect
BI2
Two-level driver input (See Functions table on p. 4)
Three-level driver input (See Functions table on p. 4)
PG2
TI2
I
I
GND
VDD1
TO2
BO2
VDD2b
Vsb
–
–
O
O
–
–
Ground
VH power supply
Three-level pulse output
Two-level pulse output
VMb (Two-level driver) power supply
VHH (for SUB drive) power supply
3
µPD16510
FUNCTIONS
VL = VSS, VMa = VDD2a, VMb = VDD2b, VH = VDD1, VHH = Vsb
Pin TO1
Pin TO2
Input
Input
Output (TO1)
Output (TO2)
TI1
L
PG1
L
TI2
L
PG2
L
VH
VMa
VL
VH
VMa
VL
L
H
L
H
H
H
L
H
H
L
H
H
Pin BO1
Pin BO2
Input
Pin SUBO
Input
BI1
L
Input
SUBI
L
Output (BO1)
Output (BO2)
Output (SUBO)
BI2
L
VMb
VL
VMb
VL
VHH
VL
H
H
H
Usage Caution
Because the µPD16510 contains a PN junction (diode) between VDD2 → VDD1, if the voltage is VDD2 > VDD1, an
abnormal current will result.
Therefore, apply power in the sequence VDD1 → VDD2, or apply power simultaneously to VDD1 and VDD2.
4
µPD16510
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS (Unless otherwise specified, TA = 25 ˚C, GND = 0 V)
Parameter
Power supply voltage
Power supply voltage
Power supply voltage
Power supply voltage
Input voltage
Symbol
VCC
VDD1
VDD2
Vsb
Conditions
Rating
Unit
VSS–0.3 to VSS+20.0
VSS–0.3 to VSS+33.0
VSS–0.3 to VSS+33.0
VSS–0.3 to VSS+33.0
VSS–0.3 to VCC+0.3
–25 to +85
V
V
V
V
VI
V
Operating ambient temperature
Storage temperature
Power dissipation
TA
°C
°C
mW
Tstg
Pd
–40 to +125
TA = 85 °C
260
Caution Exposure to Absolute Maximum Rating for extended periods may affect device reliability;
exceeding the ratings could cause permanent damage. The parameters apply independently.
RECOMMENDED OPERATING CONDITIONS (TA = 25 ˚C, GND = 0 V)
Parameter
Power supply voltage
Power supply voltage
Power supply voltage
Power supply voltage
Power supply voltage
Power supply voltage
Power supply voltage
Input voltage, high
Symbol
VCC
Conditions
MIN.
2.0
TYP.
15.0
MAX.
5.5
Unit
V
VDD1
Note
Note
10.5
20.5
–1.0
–1.0
–10.0
21.0
31.0
+4.0
+4.0
–6.0
31.0
VCC
V
VDD1–VSS
VDD2a
VDD2b
VSS
V
V
V
Note
V
Vsb–VSS
VIH
V
–0.8 VCC
V
Input voltage, low
VIL
0
0.3 VCC
+70
V
Operating ambient temperature
TA
–20
°C
Note Set the values of VDD1 and VSS to conform to VDD1–VSS specification value.
5
µPD16510
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, VDD1 = +15 V, VDD2a = 0 V, VDD2b = +1.0 V, Vsb = +21.5 V, VCC = +2.5 V,
VSS = –7.0 V, TA = 25 °C, GND = 0 V)
Parameter
Symbol
VH
Conditions
MIN.
TYP.
MAX.
VDD1
VDD2a
VDD2b
VSS
Vsb
Unit
V
Output voltage, high
Output voltage, middle
Output voltage, middle
Output voltage, low
Output voltage, sub high
Output voltage, sub low
Output ON resistance
Output ON resistance
Output ON resistance
Output ON resistance
Transmission delay time 1
Transmission delay time 2
Transmission delay time 3
Rise/Fall time 1
IO = –20 µA
IO = 20 µA
VDD1–0.1
VDD2a–0.1
VDD2b–0.1
VSS+0.1
Vsb–0.1
VSS+0.1
VMa
VMb
VL
V
V
V
VsubH
VsubL
RL
IO = –20 µA
IO = 20 µA
V
VSS
30
V
IO = 10 mA
IO = ±10 mA
IO = –10 mA
20
30
30
30
Ω
RM
45
Ω
RH
40
Ω
Rsub
TD1
TD2
TD3
TP1
40
Ω
No load, see Figure 2. Timing Chart.
200
200
200
500
500
200
1.0
ns
ns
ns
ns
ns
ns
mA
mA
mA
mA
mA
See Figure 1. Output Load Circuit.
See Figure 2. Timing Chart.
Rise/Fall time 2
TP2
Rise/Fall time 3
TP3
Consumption Current
Consumption Current
Consumption Current
Consumption Current
Consumption Current
ICC
See Figure 1. Output Load Circuit.
See Figure 3. Input Waveform.
0.5
3.0
3.0
1.5
1.2
IDD2a
IDD2b
lDD1
Isb
5.0
5.0
3.0
1.8
Figure 1. Output Load Circuit
2000 pF
2000 pF
1000 pF
TO1
BO1
BO2
3000 pF
2000 pF
3000 pF
1000 pF
SUBO
TO2
1600 pF
2000 pF
6
µPD16510
Figure 2. Timing Chart
BI
1
, BI
2
2
TI
1
, TI
T
D1
T
D1
V
V
Mb
Ma
BO
1
, BO
2
2
TO
1
, TO
V
L
T
P1
T
P1
PG
1, PG
2
T
D2
T
D2
V
V
H
TO
1, TO
2
Ma
T
P2
T
P2
SUBI
T
D3
T
D3
V
V
HH
SUBO
L
T
P3
T
P3
7
µPD16510
Figure 3. Input Waveform
Input pulse timing diagram
63.5 µs
127 µs
2 µs
Tl2
Tl1
Bl1
Bl2
PG1
2.5 µs
PG2
63.5µs
2.5 µs
16.7 ms
2 µs
SUBI
Overlap section enlarged diagram
Tl1
Bl1
Tl2
Bl2
µs
4.9
0
0.7
1.4
2.1
2.8
3.5
4.2
8
µPD16510
APPLICATION CIRCUIT EXAMPLE
VSS
VCC
VDD1
VSUB (substrate voltage)
CCD
SUB
0.1 µF
1 MΩ
1
2
20
19
18
17
16
15
14
13
12
11
SUBO
V
sb
0.1 µF
0.1 µF
VSS
V
DD2b
V1
V2
V3
V4
3
BO
1
BO
2
2
4
VDD2a
TO
µ
SSG
5
TO1
VDD1
0.1 µF
SUB
TG
V1
0.1 µF
6
VCC
GND
7
Tl1
Tl
PG
Bl
2
2
2
V2
8
PG
1
V3
V4
9
Bl1
10
SUBI
NC
9
µPD16510
PACKAGE DRAWING
20 PIN PLASTIC SHRINK SOP (225mil)
20
11
detail of lead end
H
I
1
10
A
J
N
B
L
C
M
M
D
NOTE
ITEM MILLIMETERS
INCHES
Each lead centerline is located within 0.10 mm (0.004 inch) of
its true position (T.P.) at maximum material condition.
A
B
C
7.00 MAX.
0.575 MAX.
0.65 (T.P.)
0.276 MAX.
0.023 MAX.
0.026 (T.P.)
+0.10
0.22
+0.004
0.009
D
–0.05
–0.003
E
F
0.1±0.1
0.004±0.004
0.057 MAX.
1.45 MAX.
+0.005
0.045
G
H
I
1.15±0.1
6.4±0.2
4.4±0.1
–0.004
0.252±0.008
+0.005
0.173
–0.004
+0.009
0.039
J
K
L
1.0±0.2
–0.008
+0.10
0.15
+0.004
0.006
–0.05
–0.002
+0.008
0.020
0.5±0.2
–0.009
M
N
0.10
0.10
0.004
0.004
+7˚
3˚
+7˚
3˚
P
–3˚
–3˚
P20GR-65-225C-1
10
µPD16510
RECOMMENDED SOLDERING CONDITIONS
When soldering this product, it is highly recommended to observe the conditions as shown below. If other soldering
processes are used, or if the soldering is performed under different conditions, please make sure to consult with our
sales offices.
For more details, refer to our document “SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL”
(C10535E).
Surface mount device
µPD16510GR-8JG: 20-pin plastic shrink SOP (225 mil)
Process
Conditions
Symbol
Infrared ray reflow
Peak temperature: 235 °C or below (Package surface temperature),
Reflow time: 30 seconds or less (at 210 °C or higher),
Maximum number of reflow processes: 3 times.
IR35-00-3
VPS
Peak temperature: 215 °C or below (Package surface temperature),
Reflow time: 40 seconds or less (at 200 °C or higher),
Maximum number of reflow processes: 3 times.
VP15-00-3
WS60-00-1
—
Wave soldering
Solder temperature: 260 °C or below, Flow time: 10 seconds or less,
Maximum number of flow processes: 1 time,
Pre-heating temperature: 120 °C or below (Package surface temperature).
Partial heating method Pin temperature: 300 °C or below,
Heat time: 3 seconds or less (Per each side of the device).
Caution Apply only one kind of soldering condition to a device, except for “partial heating method”, or the
device will be damaged by heat stress.
11
µPD16510
[MEMO]
12
µPD16510
[MEMO]
13
µPD16510
[MEMO]
14
µPD16510
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note: Strong electric field, when exposed to a MOS device, can cause destruction
of the gate oxide and ultimately degrade the device operation. Steps must
be taken to stop generation of static electricity as much as possible, and
quickly dissipate it once, when it has occurred. Environmental control must
be adequate. When it is dry, humidifier should be used. It is recommended
to avoid using insulators that easily build static electricity. Semiconductor
devices must be stored and transported in an anti-static container, static
shielding bag or conductive material. All test and measurement tools
including work bench and floor should be grounded. The operator should
be grounded using wrist strap. Semiconductor devices must not be touched
with bare hands. Similar precautions need to be taken for PW boards with
semiconductor devices on it.
2 HANDLING OF UNUSED INPUT PINS FOR CMOS
Note: No connection for CMOS device inputs can be cause of malfunction. If no
connection is provided to the input pins, it is possible that an internal input
level may be generated due to noise, etc., hence causing malfunction. CMOS
device behave differently than Bipolar or NMOS devices. Input levels of
CMOS devices must be fixed high or low by using a pull-up or pull-down
circuitry. Each unused pin should be connected to VDD or GND with a
resistor, if it is considered to have a possibility of being an output pin. All
handling related to the unused pins must be judged device by device and
related specifications governing the devices.
3 STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note: Power-on does not necessarily define initial status of MOS device. Produc-
tion process of MOS does not define the initial operation status of the device.
Immediately after the power source is turned ON, the devices with reset
function have not yet been initialized. Hence, power-on does not guarantee
out-pin levels, I/O settings or contents of registers. Device is not initialized
until the reset signal is received. Reset operation must be executed imme-
diately after power-on for devices having reset function.
15
µPD16510
[MEMO]
The application circuits and their parameters are for reference only and are not intended for use in actual design-ins.
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
Anti-radioactive design is not implemented in this product.
M4 96.5
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SPECIALTY INTERFACE CIRCUIT, PDSO20, 5.72 MM, LEAD FREE, PLASTIC, SSOP-20
RENESAS
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