74LVC2G74DP-Q100 [NEXPERIA]
Single D-type flip-flop with set and reset; positive edge trigger;型号: | 74LVC2G74DP-Q100 |
厂家: | Nexperia |
描述: | Single D-type flip-flop with set and reset; positive edge trigger |
文件: | 总15页 (文件大小:231K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74LVC2G74-Q100
Single D-type flip-flop with set and reset;
positive edge trigger
Rev. 3 — 3 October 2018
Product data sheet
1. General description
The 74LVC2G74-Q100 is a single positive-edge triggered D-type flip-flop. It has individual data (D)
inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing damaging backflow current through the device when it is powered
down.
The set and reset are asynchronous active LOW inputs and operate independently of the clock
input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition
of the clock pulse. The D inputs must be stable, one set-up time prior to the LOW-to-HIGH clock
transition for predictable operation. Schmitt trigger action at all inputs makes the circuit highly
tolerant to slower input rise and fall times.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
•
•
•
•
•
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
•
•
•
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
•
ESD protection:
•
•
•
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
•
•
•
•
•
±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74LVC2G74DP-Q100
74LVC2G74DC-Q100
-40 °C to +125 °C
TSSOP8
plastic thin shrink small outline package;
8 leads; body width 3 mm; lead length 0.5 mm
SOT505-2
-40 °C to +125 °C
VSSOP8
plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
SOT765-1
4. Marking
Table 2. Marking codes
Type number
Marking code [1]
74LVC2G74DP-Q100
74LVC2G74DC-Q100
V74
V74
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
SD
SD
Q
Q
D
Q
Q
D
CP
S
CP
FF
C1
1D
R
RD
RD
001aah725
001aah726
Fig. 1. Logic symbol
Fig. 2. IEC logic symbol
Q
C
C
C
C
C
C
C
D
Q
C
RD
SD
CP
mna421
C
C
Fig. 3. Logic diagram
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
2 / 15
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
6. Pinning information
6.1. Pinning
74LVC2G74-Q100
1
2
3
4
8
7
6
5
CP
D
V
CC
SD
RD
Q
Q
GND
aaa-005592
Fig. 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)
6.2. Pin description
Table 3. Pin description
Symbol
CP
Pin
1
Description
clock input (LOW-to-HIGH, edge-triggered)
data input
D
2
Q
3
complement output
GND
Q
4
ground (0 V)
5
true output
RD
SD
6
asynchronous reset-direct input (active LOW)
asynchronous set-direct input (active LOW)
supply voltage
7
VCC
8
7. Functional description
Table 4. Function table for asynchronous operation
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
Input
Output
SD
L
RD
H
CP
X
D
X
X
X
Q
H
L
Q
L
H
L
X
H
H
L
L
X
H
Table 5. Function table for synchronous operation
H = HIGH voltage level; L = LOW voltage level; ↑ = LOW-to-HIGH CP transition;
Qn+1 = state after the next LOW-to-HIGH CP transition.
Input
Output
SD
H
RD
H
CP
↑
D
L
Qn+1
L
Qn+1
H
H
H
↑
H
H
L
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
3 / 15
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
8. Limiting values
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
-0.5
-50
-0.5
-
Max
+6.5
-
Unit
V
VCC
IIK
supply voltage
input clamping current
input voltage
VI < 0 V
mA
V
VI
[1]
+6.5
±50
IOK
VO
output clamping current
output voltage
VO > VCC or VO < 0 V
Active mode
mA
[1]
[1]
-0.5
-0.5
-
VCC + 0.5 V
Power-down mode; VCC = 0 V
VO = 0 V to VCC
+6.5
±50
100
-
V
IO
output current
mA
mA
mA
mW
°C
ICC
IGND
Ptot
Tstg
supply current
-
ground current
-100
-
total power dissipation
storage temperature
Tamb = -40 °C to +125 °C
[2]
300
+150
-65
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP8 packages: above 55 °C the value of Ptot derates linearly with 2.5 mW/K.
For VSSOP8 packages: above 110 °C the value of Ptot derates linearly with 8.0 mW/K.
9. Recommended operating conditions
Table 7. Operating conditions
Symbol Parameter
Conditions
Min
Max
5.5
Unit
V
VCC
VI
supply voltage
input voltage
output voltage
1.65
0
0
5.5
V
VO
Active mode
VCC
5.5
V
Power-down mode; VCC = 0 V
0
V
Tamb
ambient temperature
-40
-
+125
20
°C
ns/V
ns/V
Δt/ΔV
input transition rise and fall rate
VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 5.5 V
-
10
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
4 / 15
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
10. Static characteristics
Table 8. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Tamb = -40 °C to +85 °C
Tamb
=
Unit
-40 °C to +125 °C
Min
Typ [1]
Max
Min
Max
VIH
HIGH-level
input voltage
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
VI = VIH or VIL
0.65VCC
-
-
-
-
-
-
-
-
-
0.65VCC
-
V
V
V
V
V
V
V
V
1.7
-
1.7
-
2.0
-
-
2.0
-
-
0.7VCC
0.7VCC
VIL
LOW-level
input voltage
-
-
-
-
0.35VCC
0.7
-
-
-
-
0.35VCC
0.7
0.8
0.8
0.3VCC
0.3VCC
VOH
HIGH-level
output voltage
IO = -100 μA;
VCC - 0.1
-
-
VCC - 0.1
-
V
VCC = 1.65 V to 5.5 V
IO = -4 mA; VCC = 1.65 V
IO = -8 mA; VCC = 2.3 V
IO = -12 mA; VCC = 2.7 V
IO = -24 mA; VCC = 3.0 V
IO = -32 mA; VCC = 4.5 V
VI = VIH or VIL
1.2
1.9
2.2
2.3
3.8
1.54
2.15
2.50
2.62
4.11
-
-
-
-
-
0.95
1.7
1.9
2.0
3.4
-
-
-
-
-
V
V
V
V
V
VOL
LOW-level
output voltage
IO = 100 μA;
-
-
0.10
-
0.10
V
VCC = 1.65 V to 5.5 V
IO = 4 mA; VCC = 1.65 V
IO = 8 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
IO = 32 mA; VCC = 4.5 V
-
-
-
-
-
-
0.07
0.12
0.17
0.33
0.39
±0.1
0.45
0.30
0.40
0.55
0.55
±1
-
-
-
-
-
-
0.70
0.45
0.60
0.80
0.80
±1
V
V
V
V
V
II
input leakage
current
VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
μA
IOFF
ICC
ΔICC
CI
power-off
leakage current
VI or VO = 5.5 V; VCC = 0 V
-
-
-
-
±0.1
0.1
5
±2
4
-
-
-
-
±2
4
μA
μA
μA
pF
supply current VI = 5.5 V or GND;
VCC = 1.65 V to 5.5 V; IO = 0 A
additional
per pin; VI = VCC - 0.6 V;
500
-
500
-
supply current IO = 0 A; VCC = 2.3 V to 5.5 V
input
4.0
capacitance
[1] All typical values are measured at Tamb = 25 °C.
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
5 / 15
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
11. Dynamic characteristics
Table 9. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7.
Symbol Parameter Conditions Tamb = -40 °C to +85 °C
Tamb
=
Unit
-40 °C to +125 °C
Min
Typ [1]
Max
Min
Max
tpd
propagation delay CP to Q, Q; see Fig. 5
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
[2]
[2]
[2]
1.5
1.0
1.0
1.0
1.0
6.0
3.5
3.5
3.5
2.5
13.4
7.1
7.1
5.9
4.1
1.5
1.0
1.0
1.0
1.0
13.4
7.1
7.1
5.9
4.1
ns
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
SD to Q, Q; see Fig. 6
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.5
1.0
1.0
1.0
1.0
6.0
3.5
3.5
3.0
2.5
12.9
7.0
7.0
5.9
4.1
1.5
1.0
1.0
1.0
1.0
12.9
7.0
7.0
5.9
4.1
ns
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
RD to Q, Q; see Fig. 6
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.5
1.0
1.0
1.0
1.0
5.0
3.5
3.5
3.0
2.5
12.9
7.0
7.0
5.9
4.1
1.5
1.0
1.0
1.0
1.0
12.9
7.0
7.0
5.9
4.1
ns
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
tW
pulse width
CP HIGH or LOW; see Fig. 5
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
6.2
2.7
2.7
2.7
2.0
-
-
-
-
-
-
6.2
2.7
2.7
2.7
2.0
-
-
-
-
-
ns
ns
ns
ns
ns
-
-
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
SD and RD LOW; see Fig. 6
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.3
-
6.2
2.7
2.7
2.7
2.0
-
-
-
-
-
-
6.2
2.7
2.7
2.7
2.0
-
-
-
-
-
ns
ns
ns
ns
ns
-
-
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
SD or RD; see Fig. 6
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.6
-
trec
recovery time
1.9
1.4
-
-
-
-
-
-
1.9
1.4
-
-
-
-
-
ns
ns
ns
ns
ns
-
1.3
-
-3.0
-
1.3
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
+1.2
1.0
+1.2
1.0
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
6 / 15
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
Symbol Parameter
Conditions
Tamb = -40 °C to +85 °C
Tamb
=
Unit
-40 °C to +125 °C
Min
Typ [1]
Max
Min
Max
tsu
set-up time
D to CP; see Fig. 5
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
2.9
1.7
1.7
1.3
1.1
-
-
-
-
-
-
2.9
1.7
1.7
1.3
1.1
-
-
-
-
-
ns
ns
ns
ns
ns
-
-
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
D to CP; see Fig. 5
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
0.5
-
th
hold time
1.5
1.0
1.0
1.0
1.0
-
-
-
-
-
-
1.5
1.0
1.0
1.0
1.0
-
-
-
-
-
ns
ns
ns
ns
ns
-
-
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
CP; see Fig. 5
0.6
-
fmax
maximum
frequency
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
80
175
175
175
200
-
-
-
-
-
-
-
-
-
80
175
175
175
200
-
-
-
-
-
-
-
MHz
MHz
MHz
MHz
MHz
pF
-
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
280
-
CPD
power dissipation VI = GND to VCC; VCC = 3.3 V [3]
capacitance
15
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLH and tPHL
.
[3] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
7 / 15
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
11.1. Waveforms and test circuit
t
W
V
I
V
CP input
M
GND
1/f
max
V
I
V
D input
M
GND
t
t
h
h
t
t
su
su
t
t
PLH
PHL
V
OH
V
Q output
Q output
M
V
OL
V
OH
V
M
V
OL
t
t
PHL
PLH
mnb141
Measurement points are given in Table 10.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 5. The clock input (CP) to output (Q, Q) propagation delays, the clock pulse width, the D to CP set-up time,
the CP to D hold time and the CP maximum frequency
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
8 / 15
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
V
I
V
M
CP input
GND
t
t
rec
rec
V
I
V
M
SD input
RD input
GND
t
t
W
W
V
I
V
M
GND
t
t
PHL
PLH
V
OH
Q output
Q output
V
V
M
V
OL
V
OH
M
V
OL
t
t
PLH
PHL
mnb142
Measurement points are given in Table 10.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 6. The set (SD) and reset (RD) input to output (Q, Q) propagation delays, the set and reset pulse widths and
the RD to CP recovery time
Table 10. Measurement points
Supply voltage
VCC
Input
Output
VM
VM
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
0.5 × VCC
0.5 × VCC
1.5 V
0.5 × VCC
0.5 × VCC
1.5 V
3.0 V to 3.6 V
4.5 V to 5.5 V
1.5 V
1.5 V
0.5 × VCC
0.5 × VCC
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
9 / 15
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
V
EXT
V
CC
R
L
V
V
O
I
G
DUT
R
T
C
L
R
L
mna616
Test data is given in Table 11.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 7. Test circuit for measuring switching times
Table 11. Test data
Supply voltage
VCC
Input
VI
Load
CL
VEXT
tr, tf
RL
tPLH, tPHL
open
tPZH, tPHZ
GND
tPZL, tPLZ
2VCC
2VCC
6 V
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VCC
VCC
2.7 V
2.7 V
VCC
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
30 pF
30 pF
50 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
500 Ω
open
GND
open
GND
3.0 V to 3.6 V
4.5 V to 5.5 V
open
GND
6 V
open
GND
2VCC
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
10 / 15
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
12. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
SOT505-2
D
E
A
X
c
H
v
M
y
A
E
Z
5
8
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
detail X
1
4
e
w
M
b
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
A
A
A
b
c
D
E
e
H
E
L
L
p
UNIT
v
w
y
Z
θ
1
2
3
p
max.
0.15
0.00
0.95
0.75
0.38
0.22
0.18
0.08
3.1
2.9
3.1
2.9
4.1
3.9
0.47
0.33
0.70
0.35
8°
0°
mm
1.1
0.65
0.5
0.2
0.13
0.1
0.25
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-01-16
SOT505-2
- - -
Fig. 8. Package outline SOT505-2 (TSSOP8)
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
11 / 15
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
D
E
A
X
c
y
H
E
v
A
Z
5
8
Q
A
2
A
A
(A )
3
1
pin 1 index
θ
L
p
detail X
1
4
L
e
w
b
p
0
5 mm
scale
Dimensions (mm are the original dimensions)
A
(1)
(2)
(1)
Unit
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
max
mm nom
min
0.15 0.85
0.00 0.60
0.27 0.23 2.1 2.4
0.17 0.08 1.9 2.2
3.2
3.0
0.40 0.21
0.15 0.19
0.4
8°
0°
1
0.12
0.5
0.4
0.2 0.08 0.1
0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
sot765-1_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
07-06-02
16-05-31
SOT765-1
MO-187
Fig. 9. Package outline SOT765-1 (VSSOP8)
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
12 / 15
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
13. Abbreviations
Table 12. Abbreviations
Acronym
Description
CMOS
DUT
ESD
HBM
MIL
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Military
MM
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 13. Revision history
Document ID
Release date
20181003
Data sheet status
Change notice Supersedes
- 74LVC2G74_Q100 v.2
74LVC2G74_Q100 v.3
Modifications:
Product data sheet
•
•
The format of this data sheet has been redesigned to comply with the identity guidelines
of Nexperia.
Legal texts have been adapted to the new company name where appropriate.
74LVC2G74_Q100 v.2
Modifications:
20161214
Table 8: The maximum limits for leakage current and supply current have changed.
20121224 Product data sheet
Product data sheet
-
74LVC2G74_Q100 v.1
•
74LVC2G74_Q100 v.1
-
-
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
13 / 15
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
15. Legal information
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status Product
Definition
[1][2]
status [3]
Applications — Applications that are described herein for any of these
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Disclaimers
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
14 / 15
Nexperia
74LVC2G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Marking..........................................................................2
5. Functional diagram.......................................................2
6. Pinning information......................................................3
6.1. Pinning.........................................................................3
6.2. Pin description.............................................................3
7. Functional description................................................. 3
8. Limiting values............................................................. 4
9. Recommended operating conditions..........................4
10. Static characteristics..................................................5
11. Dynamic characteristics.............................................6
11.1. Waveforms and test circuit........................................ 8
12. Package outline........................................................ 11
13. Abbreviations............................................................13
14. Revision history........................................................13
15. Legal information......................................................14
© Nexperia B.V. 2018. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 3 October 2018
©
74LVC2G74_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 3 — 3 October 2018
15 / 15
相关型号:
74LVC2G74GD,125
74LVC2G74 - Single D-type flip-flop with set and reset; positive edge trigger SON 8-Pin
NXP
74LVC2G74GF,115
74LVC2G74 - Single D-type flip-flop with set and reset; positive edge trigger SON 8-Pin
NXP
74LVC2G74GM,125
74LVC2G74 - Single D-type flip-flop with set and reset; positive edge trigger QFN 8-Pin
NXP
74LVC2G74GT,115
74LVC2G74 - Single D-type flip-flop with set and reset; positive edge trigger SON 8-Pin
NXP
©2020 ICPDF网 联系我们和版权申明