74LVC4T3144PW-Q100 [NEXPERIA]

4-bit dual supply buffer/line driver; 3-stateProduction;
74LVC4T3144PW-Q100
型号: 74LVC4T3144PW-Q100
厂家: Nexperia    Nexperia
描述:

4-bit dual supply buffer/line driver; 3-stateProduction

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74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
Rev. 1 — 14 August 2017  
Product data sheet  
1 General description  
The 74LVC4T3144-Q100 is a 4-bit, dual-supply level translating buffer with 3-state  
outputs. It features four data inputs (An and B4), four data outputs (YBn and YA4), and  
an output enable input (OE). The device is configured to translate three inputs from  
VCC(A) to VCC(B) and one input from VCC(B) to VCC(A). OE, An and YA4 are referenced to  
VCC(A) and YBn and B4 are referenced to VCC(B). A HIGH on OE causes the outputs to  
assume a high-impedance OFF-state.  
The device is fully specified for partial power-down applications using IOFF. The IOFF  
circuitry disables outputs, preventing any damaging backflow current through the device  
when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND  
level, all outputs are in the high-impedance OFF-state.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2 Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
Wide supply voltage range:  
VCC(A): 1.2 V to 5.5 V  
VCC(B): 1.2 V to 5.5 V  
High noise immunity  
Complies with JEDEC standards:  
JESD8-11A (1.4 V to 1.6 V)  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8C (3.0 V to 3.6 V)  
JESD12-6 (4.5 V to 5.5 V)  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F Class 3A exceeds 4000 V  
CDM JESD22-C101E exceeds 1000 V  
Maximum data rates:  
200 Mbps (3.3 V to 5.0 V translation)  
140 Mbps (translate to 3.3 V))  
100 Mbps (translate to 2.5 V)  
75 Mbps (translate to 1.8 V)  
60 Mbps (translate to 1.5 V)  
Suspend mode  
 
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
Latch-up performance exceeds 100 mA per JESD 78B Class II  
±24 mA output drive (VCC = 3.0 V)  
Inputs accept voltages up to 5.5 V  
Low power consumption: 30 μA maximum ICC  
IOFF circuitry provides partial Power-down mode operation  
3 Ordering information  
Table 1.ꢀOrdering information  
Type number  
Package  
Temperature  
range  
Name  
Description  
Version  
74LVC4T3144PW-Q100 -40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1  
body width 4.4 mm  
4 Functional diagram  
YB1  
YB2  
YB3  
B4  
V
V
CC(B)  
CC(A)  
OE  
A1  
A2  
A3  
YA4  
aaa-027040  
Figure 1.ꢀ Logic symbol  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
2 / 27  
 
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
5 Pinning information  
5.1 Pinning  
74LVC4T3144-Q100  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
V
OE  
CC(A)  
A1  
V
CC(B)  
A2  
A3  
YB1  
YB2  
YB3  
n.c.  
B4  
YA4  
GND  
GND  
8
aaa-027041  
Figure 2.ꢀ Pin configuration SOT402-1 (TSSOP14)  
5.2 Pin description  
Table 2.ꢀPin description  
Symbol  
VCC(A)  
A1, A2, A3  
YA4  
Pin  
Description  
1
supply voltage A (An inputs, YA4 output and OE input are referenced to VCC(A)  
)
2, 3, 4  
data input  
5
data output  
ground (0 V)  
data input  
GND  
6, 7  
8
B4  
n.c.  
9
not connected  
data output  
YB3, YB2, YB1 10, 11, 12  
VCC(B)  
OE  
13  
14  
supply voltage B (YBn outputs and B4 input are referenced to VCC(B)  
)
output enable input (active LOW)  
6 Functional description  
Table 3.ꢀFunction table [1]  
Supply voltage  
VCC(A), VCC(B)  
1.2 V to 5.5 V  
1.2 V to 5.5 V  
1.2 V to 5.5 V  
GND[3]  
Control  
OE[2]  
Input  
An, B4[2]  
Output  
YBn, YA4[2]  
L
L
L
L
H
X
X
H
Z
Z
H
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.  
[2] The An inputs, YA4 output and OE input are referenced to VCC(A); The YBn outputs and B4 input are referenced to VCC(B)  
.
[3] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode.  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
3 / 27  
 
 
 
 
 
 
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
7 Limiting values  
Table 4.ꢀLimiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC(A)  
VCC(B)  
IIK  
Parameter  
Conditions  
Min  
-0.5  
-0.5  
-50  
-0.5  
-50  
-0.5  
-0.5  
-
Max  
+6.5  
+6.5  
-
Unit  
V
supply voltage A  
supply voltage B  
input clamping current  
input voltage  
V
VI < 0 V  
mA  
V
[1]  
VI  
+6.5  
-
IOK  
output clamping current  
output voltage  
VO < 0 V  
mA  
V
[1] [2] [3]  
VO  
Active mode  
VCCO + 0.5  
+6.5  
±50  
[1]  
[2]  
Suspend or 3-state mode  
VO = 0 V to VCCO  
ICC(A) or ICC(B); per VCC pin  
per GND pin  
V
IO  
output current  
mA  
mA  
mA  
°C  
mW  
ICC  
IGND  
Tstg  
Ptot  
supply current  
-
100  
ground current  
-100  
-65  
-
-
storage temperature  
total power dissipation  
+150  
500  
[4]  
Tamb = -40 °C to +125 °C  
[1] The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] VCCO is the supply voltage associated with the output port.  
[3] VCCO + 0.5 V should not exceed 6.5 V.  
[4] For TSSOP14 package: Ptot derates linearly at 7.0 mW/K above 75 °C.  
8 Recommended operating conditions  
Table 5.ꢀRecommended operating conditions  
Symbol  
VCC(A)  
VCC(B)  
VI  
Parameter  
Conditions  
Min  
Max  
5.5  
5.5  
5.5  
VCCO  
5.5  
+125  
20  
Unit  
V
supply voltage A  
supply voltage B  
input voltage  
1.2  
1.2  
V
0
0
0
-40  
-
V
[1]  
[2]  
VO  
output voltage  
Active mode  
V
Suspend or 3-state mode  
V
Tamb  
ambient temperature  
°C  
Δt/ΔV  
input transition rise and fall rate VCCI = 1.2 V  
VCCI = 1.4 V to 1.95 V  
ns/V  
ns/V  
ns/V  
ns/V  
ns/V  
-
20  
VCCI = 2.3 V to 2.7 V  
VCCI = 3 V to 3.6 V  
VCCI = 4.5 V to 5.5 V  
-
20  
-
10  
-
5
[1] VCCO is the supply voltage associated with the output port.  
[2] VCCI is the supply voltage associated with the input port.  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
4 / 27  
 
 
 
 
 
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
9 Static characteristics  
Table 6.ꢀTypical static characteristics at Tamb = 25 °C  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
[1]  
VOH  
HIGH-level output voltage  
YBn, YA4; VI = VIH or VIL  
IO = -3 mA; VCCO = 1.2 V  
YBn, YA4; VI = VIH or VIL  
IO = 3 mA; VCCO = 1.2 V  
-
1.09  
-
V
VOL  
LOW-level output voltage  
[1]  
[2]  
-
-
0.07  
-
-
V
II  
input leakage current  
An, B4 and OE input; VI = 0 V to 5.5 V;  
VCCI = 1.2 V to 5.5 V  
±1  
μA  
[1]  
IOZ  
OFF-state output current  
YBn, YA4; VO = 0 V or VCCO  
;
-
-
±1  
μA  
VCCO = 1.2 V to 5.5 V  
[1]  
[1]  
YBn, YA4; suspend mode; VO = 0 V or VCCO  
VCC(A) = 5.5 V; VCC(B) = 0 V  
;
;
-
-
-
-
-
-
±1  
±1  
±1  
μA  
μA  
μA  
YBn, YA4; suspend mode; VO = 0 V or VCCO  
VCC(A) = 0 V; VCC(B) = 5.5 V  
IOFF  
power-off leakage current  
A port; VI or VO = 0 V to 5.5 V; VCC(A) = 0 V;  
VCC(B) = 1.2 V to 5.5 V  
B port; VI or VO = 0 V to 5.5 V; VCC(B) = 0 V;  
VCC(A) = 1.2 V to 5.5 V  
-
-
-
-
3
±1  
-
μA  
pF  
pF  
CI  
input capacitance  
output capacitance  
An, B4 and OE input; VI = 0 V or 3.3 V;  
VCC(A) = 3.3 V; VCC(B) = 3.3 V  
CO  
YBn, YA4 output; VO = 0 V or 3.3 V;  
OE input = 3.3 V; VCC(A) = 3.3 V;  
VCC(B) = 3.3 V  
6.5  
-
[1] VCCO is the supply voltage associated with the output port.  
[2] VCCI is the supply voltage associated with the input port.  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
5 / 27  
 
 
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
Table 7.ꢀStatic characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C  
Unit  
Min  
Max  
Min  
Max  
[1]  
VIH  
HIGH-level  
data input  
input voltage  
VCCI = 1.2 V  
0.8VCCI  
0.65VCCI  
1.7  
-
-
-
-
-
0.8VCCI  
0.65VCCI  
1.7  
-
-
-
-
-
V
V
V
V
V
VCCI = 1.4 V to 1.95 V  
VCCI = 2.3 V to 2.7 V  
VCCI = 3.0 V to 3.6 V  
VCCI = 4.5 V to 5.5 V  
OE input  
2.0  
2.0  
0.7VCCI  
0.7VCCI  
VCCI = 1.2 V  
0.8VCC(A)  
0.65VCC(A)  
1.7  
-
-
-
-
-
0.8VCC(A)  
0.65VCC(A)  
1.7  
-
-
-
-
-
V
V
V
V
V
VCCI = 1.4 V to 1.95 V  
VCCI = 2.3 V to 2.7 V  
VCCI = 3.0 V to 3.6 V  
VCCI = 4.5 V to 5.5 V  
data input  
2.0  
2.0  
0.7VCC(A)  
0.7VCC(A)  
[1]  
VIL  
LOW-level  
input voltage  
VCCI = 1.2 V  
-
-
-
-
-
0.2VCCI  
0.35VCCI  
0.7  
-
-
-
-
-
0.2VCCI  
0.35VCCI  
0.7  
V
V
V
V
V
VCCI = 1.4 V to 1.95 V  
VCCI = 2.3 V to 2.7 V  
VCCI = 3.0 V to 3.6 V  
VCCI = 4.5 V to 5.5 V  
OE input  
0.8  
0.8  
0.3VCCI  
0.3VCCI  
VCCI = 1.2 V  
-
-
-
-
-
0.2VCC(A)  
0.35VCC(A)  
0.7  
-
-
-
-
-
0.2VCC(A)  
0.35VCC(A)  
0.7  
V
V
V
V
V
VCCI = 1.4 V to 1.95 V  
VCCI = 2.3 V to 2.7 V  
VCCI = 3.0 V to 3.6 V  
VCCI = 4.5 V to 5.5 V  
0.8  
0.8  
0.3VCC(A)  
0.3VCC(A)  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
6 / 27  
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C  
Unit  
Min  
Max  
Min  
Max  
VOH  
HIGH-level  
VI = VIH  
[2]  
output voltage  
IO = -100 μA;  
VCCO - 0.1  
-
VCCO - 0.1  
-
V
VCCO = 1.2 V to 4.5 V  
IO = -6 mA; VCCO = 1.4 V  
IO = -8 mA; VCCO = 1.65 V  
IO = -12 mA; VCCO = 2.3 V  
IO = -24 mA; VCCO = 3.0 V  
IO = -24 mA; VCCO = 4.5 V  
IO = -32 mA; VCCO = 4.5 V  
1.0  
1.2  
-
-
-
-
-
-
1.0  
1.2  
-
-
-
-
-
-
V
V
V
V
V
V
1.9  
1.9  
2.4  
2.4  
3.85  
3.8  
3.85  
3.8  
[2]  
VOL  
LOW-level  
VI = VIL  
output voltage  
IO = 100 μA;  
-
0.1  
-
0.1  
V
VCCO = 1.2 V to 4.5 V  
IO = 6 mA; VCCO = 1.4 V  
IO = 8 mA; VCCO = 1.65 V  
IO = 12 mA; VCCO = 2.3 V  
IO = 24 mA; VCCO = 3.0 V  
IO = 24 mA; VCCO = 4.5 V  
IO = 32 mA; VCCO = 4.5 V  
-
-
-
-
-
-
-
0.3  
0.45  
0.3  
-
-
-
-
-
-
-
0.3  
0.45  
0.3  
V
V
V
0.55  
0.50  
0.55  
±2  
0.55  
0.50  
0.55  
±10  
V
V
V
II  
input leakage VI = 0 V to 5.5 V;  
μA  
current  
VCCI = 1.2 V to 5.5 V  
[2]  
IOZ  
OFF-state  
VO = 0 V or VCCO  
;
-
±2  
-
±10  
μA  
output current VCCO = 1.2 V to 5.5 V  
[2]  
[2]  
suspend mode; VO = 0 V or VCCO  
VCC(A) = 5.5 V; VCC(B) = 0 V  
;
;
-
-
-
-
±2  
±2  
±2  
±2  
-
-
-
-
±10  
±10  
±10  
±10  
μA  
μA  
μA  
μA  
suspend mode; VO = 0 V or VCCO  
VCC(A) = 0 V; VCC(B) = 5.5 V  
IOFF  
power-off  
leakage  
current  
A port; VI or VO = 0 V to 5.5 V;  
VCC(A) = 0 V; VCC(B) = 1.2 V to 5.5 V  
B port; VI or VO = 0 V to 5.5 V;  
VCC(B) = 0 V; VCC(A) = 1.2 V to 5.5 V  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
7 / 27  
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C  
Unit  
Min  
Max  
Min  
Max  
[1]  
ICC  
supply current A port; VI = 0 V or VCCI; IO = 0 A  
VCC(A), VCC(B) = 1.2 V to 5.5 V  
VCC(A) = 5.5 V; VCC(B) = 0 V  
-
-
15  
15  
-
-
-
20  
20  
-
μA  
μA  
μA  
VCC(A) = 0 V; VCC(B) = 5.5 V  
-2  
-4  
B port; VI = 0 V or VCCI; IO = 0 A  
VCC(A), VCC(B) = 1.2 V to 5.5 V  
VCC(B) = 0 V; VCC(A) = 5.5 V  
-
-2  
-
15  
-
-
-4  
-
20  
-
μA  
μA  
μA  
VCC(B) = 5.5 V; VCC(A) = 0 V  
15  
20  
A plus B port (ICC(A) + ICC(B));  
IO = 0 A; VI = 0 V or VCCI  
VCC(A), VCC(B) = 1.2 V to 5.5 V  
-
-
25  
50  
-
-
30  
75  
μA  
μA  
ΔICC  
additional  
per input;  
supply current VCC(A), VCC(B) = 3.0 V to 5.5 V  
OE input; OE input at VCC(A)  
-
0.6 V; A port at VCC(A) or GND;  
B port = open  
A port; A port at VCC(A) - 0.6 V;  
B port = open  
-
-
50  
50  
-
-
75  
75  
μA  
μA  
B port; B port at VCC(B) - 0.6 V;  
A port = open  
[1] VCCI is the supply voltage associated with the input port.  
[2] VCCO is the supply voltage associated with the output port.  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
8 / 27  
 
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
10 Dynamic characteristics  
Table 8.ꢀTypical dynamic characteristics at VCC(A) = 1.2 V and Tamb = 25 °C [1]  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 5; for waveforms see Figure 3 and Figure 4.  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
1.2 V  
15.6  
15.6  
8.7  
1.5 V  
11.6  
14.5  
8.7  
1.8 V  
2.5 V  
7.8  
3.3 V  
6.9  
5.0 V  
6.3  
tpd  
tdis  
ten  
propagation delay  
An to YBn  
B4 to YA4  
OE to YA4  
OE to YBn  
OE to YA4  
OE to YBn  
9.8  
14.0  
8.7  
ns  
ns  
ns  
ns  
ns  
ns  
13.5  
8.7  
13.3  
8.7  
13.8  
8.7  
disable time  
enable time  
11.9  
17.5  
18.3  
9.2  
8.7  
7.4  
7.7  
6.8  
17.5  
13.6  
17.5  
11.5  
17.5  
9.5  
17.5  
8.8  
17.5  
8.5  
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH  
.
Table 9.ꢀTypical dynamic characteristics at VCC(B) = 1.2 V and Tamb = 25 °C [1]  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 5; for waveforms see Figure 3 and Figure 4.  
Symbol Parameter  
Conditions  
VCC(A)  
Unit  
1.2 V  
15.6  
15.6  
8.7  
1.5 V  
14.5  
11.6  
6.1  
1.8 V  
2.5 V  
13.5  
7.8  
3.3 V  
13.3  
6.9  
5.0 V  
13.1  
6.3  
tpd  
tdis  
ten  
propagation delay  
An to YBn  
B4 to YA4  
OE to YA4  
OE to YBn  
OE to YA4  
OE to YBn  
14.0  
9.8  
ns  
ns  
ns  
ns  
ns  
ns  
disable time  
enable time  
5.5  
3.9  
4.1  
2.9  
11.9  
17.5  
18.3  
10.5  
11.6  
17.0  
9.9  
9.2  
8.9  
8.4  
9.0  
5.7  
4.6  
3.8  
16.4  
15.8  
15.6  
15.4  
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH  
.
Table 10.ꢀTypical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 °C [1] [2]  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
VCC(A) and VCC(B)  
Unit  
1.2 V  
0.5  
1.5 V  
0.5  
1.8 V  
0.5  
2.5 V  
0.7  
3.3 V  
5.0 V  
1.3  
CPD  
power dissipation inputs An, B4  
0.9  
12  
pF  
pF  
capacitance  
outputs YBn,  
12  
12  
12  
12  
12  
YA4  
[1] CPD is used to determine the dynamic power dissipation (PD in μW).  
PD = CPD × VCC2 x fi x N + Σ(CL x VCC2 x fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
Σ(CL x VCC2 x fo) = sum of the outputs.  
[2] fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω.  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
9 / 27  
 
 
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
Table 11.ꢀDynamic characteristics for temperature range -40 °C to +85 °C [1]  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 5; for waveforms see Figure 3 and Figure 4.  
Symbol Parameter Conditions  
VCC(B)  
Unit  
1.5 V±0.1 V 1.8 V±0.15 V 2.5 V±0.2 V 3.3 V±0.3 V 5.0 V±0.5 V  
Min Max Min Max Min Max Min Max Min Max  
VCC(A) = 1.5 V ± 0.1 V  
tpd  
tdis  
ten  
propagation  
delay  
An to YBn  
B4 to YA4  
OE to YA4  
OE to YBn  
OE to YA4  
OE to YBn  
1.7  
1.7  
1.3  
1.5  
2.1  
2.1  
20.7  
20.7  
11.6  
14.4  
21.8  
22.2  
1.6  
1.6  
1.3  
1.6  
2.1  
1.8  
17.1  
19.8  
11.6  
13.2  
21.8  
18.4  
1.3  
1.6  
1.3  
1.3  
2.1  
1.5  
12.9  
19.0  
11.6  
10.4  
21.8  
14.2  
1.1  
1.5  
1.3  
1.5  
2.1  
1.3  
11.1  
18.5  
11.6  
10.7  
21.8  
12.5  
1.0  
1.5  
1.3  
1.2  
2.1  
1.2  
9.5 ns  
18.3 ns  
11.6 ns  
9.4 ns  
21.8 ns  
11.4 ns  
disable time  
enable time  
VCC(A) = 1.8 V ± 0.15 V  
tpd  
tdis  
ten  
propagation  
delay  
An to YBn  
B4 to YA4  
OE to YA4  
OE to YBn  
OE to YA4  
OE to YBn  
1.6  
1.6  
1.4  
1.4  
1.8  
2.0  
19.8  
17.1  
10.1  
13.7  
17.2  
21.4  
1.4  
1.4  
1.4  
1.5  
1.8  
1.7  
16.2  
16.2  
10.1  
12.3  
17.2  
17.4  
1.2  
1.3  
1.4  
1.2  
1.8  
1.4  
11.9  
15.3  
10.1  
9.5  
1.0  
1.2  
1.4  
1.4  
1.8  
1.2  
10.2  
14.9  
10.1  
9.7  
0.9  
1.2  
1.4  
1.1  
1.8  
1.1  
8.5 ns  
14.5 ns  
10.1 ns  
8.2 ns  
17.2 ns  
9.8 ns  
disable time  
enable time  
17.2  
12.9  
17.2  
11.1  
VCC(A) = 2.5 V ± 0.2 V  
tpd  
tdis  
ten  
propagation  
delay  
An to YBn  
B4 to YA4  
OE to YA4  
OE to YBn  
OE to YA4  
OE to YBn  
1.6  
1.3  
0.9  
1.3  
1.4  
2.0  
19.0  
12.9  
7.2  
1.3  
1.2  
0.9  
1.4  
1.4  
1.6  
15.3  
11.9  
7.2  
1.0  
1.0  
0.9  
1.1  
1.4  
1.3  
11.0  
11.0  
7.2  
0.9  
0.9  
0.9  
1.3  
1.4  
1.2  
9.1  
10.6  
7.2  
0.7  
0.9  
0.9  
1.0  
1.4  
1.0  
7.2 ns  
10.2 ns  
7.2 ns  
6.9 ns  
11.7 ns  
8.2 ns  
disable time  
12.8  
11.7  
20.8  
11.3  
11.7  
16.6  
8.4  
8.5  
enable time  
11.7  
11.9  
11.7  
9.9  
VCC(A) = 3.3 V ± 0.3 V  
tpd  
tdis  
ten  
propagation  
delay  
An to YBn  
B4 to YA4  
OE to YA4  
OE to YBn  
OE to YA4  
OE to YBn  
1.5  
1.1  
1.1  
1.2  
1.2  
2.0  
18.5  
11.1  
7.2  
1.2  
1.0  
1.1  
1.3  
1.2  
1.7  
14.9  
10.2  
7.2  
0.9  
0.9  
1.1  
1.0  
1.2  
1.4  
10.6  
9.1  
0.8  
0.8  
1.1  
1.2  
1.2  
1.2  
8.5  
8.5  
7.2  
8.0  
9.3  
9.4  
0.7  
0.7  
1.1  
0.9  
1.2  
1.0  
6.6 ns  
8.1 ns  
7.2 ns  
6.3 ns  
9.3 ns  
7.5 ns  
disable time  
7.2  
12.3  
9.3  
10.9  
9.3  
8.0  
enable time  
9.3  
20.4  
16.5  
11.5  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
10 / 27  
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
Symbol Parameter Conditions  
VCC(B)  
Unit  
1.5 V±0.1 V 1.8 V±0.15 V 2.5 V±0.2 V 3.3 V±0.3 V 5.0 V±0.5 V  
Min Max Min Max Min Max Min Max Min Max  
VCC(A) = 5.0 V ± 0.5 V  
tpd  
tdis  
ten  
propagation  
delay  
An to YBn  
B4 to YA4  
OE to YA4  
OE to YBn  
OE to YA4  
OE to YBn  
1.5  
1.0  
0.7  
1.2  
1.1  
2.0  
18.3  
9.5  
1.2  
0.9  
0.7  
1.3  
1.1  
1.7  
14.5  
8.5  
0.9  
0.7  
0.7  
0.9  
1.1  
1.4  
10.2  
7.2  
0.7  
0.7  
0.7  
1.2  
1.1  
1.2  
8.1  
6.6  
5.3  
7.6  
7.0  
9.2  
0.6  
0.6  
0.7  
0.8  
1.1  
1.0  
6.3 ns  
6.3 ns  
5.3 ns  
5.8 ns  
7.0 ns  
7.2 ns  
disable time  
5.3  
5.3  
5.3  
12.0  
7.0  
10.5  
7.0  
7.6  
enable time  
7.0  
20.5  
16.4  
11.4  
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH  
.
Table 12.ꢀDynamic characteristics for temperature range -40 °C to +125 °C [1]  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 5; for waveforms see Figure 3 and Figure 4.  
Symbol Parameter Conditions  
VCC(B)  
Unit  
1.5 V±0.1 V 1.8 V±0.15 V 2.5 V±0.2 V 3.3 V±0.3 V 5.0 V±0.5 V  
Min Max Min Max Min Max Min Max Min Max  
VCC(A) = 1.5 V ± 0.1 V  
tpd  
tdis  
ten  
propagation  
delay  
An to YBn  
B4 to YA4  
OE to YA4  
OE to YBn  
OE to YA4  
OE to YBn  
1.7  
1.7  
1.3  
1.5  
2.1  
2.1  
22.0  
22.0  
12.8  
15.8  
23.2  
23.6  
1.6  
1.6  
1.3  
1.6  
2.1  
1.8  
18.3  
21.0  
12.8  
14.5  
23.2  
19.6  
1.3  
1.6  
1.3  
1.3  
2.1  
1.5  
14.0  
20.1  
12.8  
11.5  
23.2  
15.4  
1.1  
1.5  
1.3  
1.5  
2.1  
1.3  
12.2  
19.5  
12.8  
11.1  
23.2  
13.7  
1.0  
1.5  
1.3  
1.2  
2.1  
1.2  
10.5 ns  
19.4 ns  
12.8 ns  
9.7 ns  
23.2 ns  
12.6 ns  
disable time  
enable time  
VCC(A) = 1.8 V ± 0.15 V  
tpd  
tdis  
ten  
propagation  
delay  
An to YBn  
B4 to YA4  
OE to YA4  
OE to YBn  
OE to YA4  
OE to YBn  
1.6  
1.6  
1.4  
1.4  
1.8  
2.0  
21.0  
18.3  
11.2  
15.2  
18.4  
22.7  
1.4  
1.4  
1.4  
1.5  
1.8  
1.7  
17.4  
17.4  
11.2  
13.5  
18.4  
18.7  
1.2  
1.3  
1.4  
1.2  
1.8  
1.4  
13.0  
16.4  
11.2  
10.5  
18.4  
14.1  
1.0  
1.2  
1.4  
1.4  
1.8  
1.2  
11.2  
16.0  
11.2  
10.0  
18.4  
12.2  
0.9  
1.2  
1.4  
1.1  
1.8  
1.1  
9.3 ns  
15.6 ns  
11.2 ns  
8.5 ns  
18.4 ns  
10.8 ns  
disable time  
enable time  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
11 / 27  
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
Symbol Parameter Conditions  
VCC(B)  
Unit  
1.5 V±0.1 V 1.8 V±0.15 V 2.5 V±0.2 V 3.3 V±0.3 V 5.0 V±0.5 V  
Min Max Min Max Min Max Min Max Min Max  
VCC(A) = 2.5 V ± 0.2 V  
tpd  
tdis  
ten  
propagation  
delay  
An to YBn  
B4 to YA4  
OE to YA4  
OE to YBn  
OE to YA4  
OE to YBn  
1.6  
1.3  
0.9  
1.3  
1.4  
2.0  
20.1  
14.0  
8.0  
1.3  
1.2  
0.9  
1.4  
1.4  
1.6  
16.4  
13.0  
8.0  
1.0  
1.0  
0.9  
1.1  
1.4  
1.3  
11.9  
11.9  
8.0  
0.9  
0.9  
0.9  
1.3  
1.4  
1.2  
9.9  
11.5  
8.0  
0.7  
0.9  
0.9  
1.0  
1.4  
1.0  
7.9 ns  
11.1 ns  
8.0 ns  
7.5 ns  
12.7 ns  
9.0 ns  
disable time  
14.0  
12.7  
22.0  
12.5  
12.7  
17.9  
9.3  
9.3  
enable time  
12.7  
13.0  
12.7  
10.8  
VCC(A) = 3.3 V ± 0.3 V  
tpd  
tdis  
ten  
propagation  
delay  
An to YBn  
B4 to YA4  
OE to YA4  
OE to YBn  
OE to YA4  
OE to YBn  
1.5  
1.1  
1.1  
1.2  
1.2  
2.0  
19.5  
12.2  
7.8  
1.2  
1.0  
1.1  
1.3  
1.2  
1.7  
16.0  
11.2  
7.8  
0.9  
0.9  
1.1  
1.0  
1.2  
1.4  
11.5  
9.9  
0.8  
0.8  
1.1  
1.2  
1.2  
1.2  
9.3  
9.3  
0.7  
0.7  
1.1  
0.9  
1.2  
1.0  
7.3 ns  
8.8 ns  
7.8 ns  
6.5 ns  
10.1 ns  
8.3 ns  
disable time  
7.8  
7.8  
13.6  
10.1  
21.6  
12.1  
10.1  
17.5  
8.8  
8.3  
enable time  
10.1  
12.6  
10.1  
10.3  
VCC(A) = 5.0 V ± 0.5 V  
tpd  
tdis  
ten  
propagation  
delay  
An to YBn  
B4 to YA4  
OE to YA4  
OE to YBn  
OE to YA4  
OE to YBn  
1.5  
1.0  
0.7  
1.2  
1.1  
2.0  
19.4  
10.5  
5.7  
1.2  
0.9  
0.7  
1.3  
1.1  
1.7  
15.6  
9.3  
0.9  
0.7  
0.7  
0.9  
1.1  
1.4  
11.1  
7.9  
0.7  
0.7  
0.7  
1.2  
1.1  
1.2  
8.8  
7.3  
0.6  
0.6  
0.7  
0.8  
1.1  
1.0  
6.8 ns  
6.8 ns  
5.7 ns  
6.0 ns  
7.7 ns  
7.9 ns  
disable time  
5.7  
5.7  
5.7  
13.3  
7.7  
11.7  
7.7  
8.4  
7.9  
enable time  
7.7  
7.7  
21.7  
17.4  
12.5  
10.1  
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH  
.
10.1 Waveforms and test circuit  
V
I
An, B4 input  
GND  
V
V
M
M
t
t
PHL  
PLH  
V
OH  
V
V
YBn, YA4 output  
M
M
V
OL  
aaa-027042  
Measurement points are given in Table 13.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Figure 3.ꢀ The data input (An, B4) to output (YBn, YA4) propagation delay times  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
12 / 27  
 
 
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
V
I
OE input  
V
M
t
GND  
t
PLZ  
PZL  
V
CCO  
output  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PHZ  
PZH  
V
OH  
V
Y
output  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
outputs  
enabled  
outputs  
enabled  
outputs  
disabled  
001aai474  
Measurement points are given in Table 13.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Figure 4.ꢀ Enable and disable times  
Table 13.ꢀMeasurement points  
Supply voltage  
VCC(A), VCC(B)  
1.2 V to 1.6 V  
Input [1]  
Output [2]  
VM  
VM  
VX  
VY  
0.5VCCI  
0.5VCCI  
0.5VCCI  
0.5VCCO  
0.5VCCO  
0.5VCCO  
VOL + 0.1 V  
VOH - 0.1 V  
VOH - 0.15 V  
VOH - 0.3 V  
1.65 V to 2.7 V  
3.0 V to 5.5 V  
VOL + 0.15 V  
VOL + 0.3 V  
[1] VCCI is the supply voltage associated with the input port.  
[2] VCCO is the supply voltage associated with the output port.  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
13 / 27  
 
 
 
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
EXT  
R
V
CC  
L
V
V
O
I
G
DUT  
R
T
C
L
R
L
001aae331  
Test data is given in Table 14.  
RL = Load resistance.  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance.  
VEXT = External voltage for measuring switching times.  
Figure 5.ꢀ Test circuit for measuring switching times  
Table 14.ꢀTest data  
Supply voltage Input  
Load  
CL  
VEXT  
tPLH, tPHL tPZH, tPHZ tPZL, tPLZ  
[1]  
[3]  
VCC(A), VCC(B)  
VI  
Δt/ΔV [2]  
RL  
1.2 V to 5.5 V  
VCCI  
≤ 1.0 ns/V  
15 pF  
2 kΩ  
open  
GND  
2 x VCCO  
[1] VCCI is the supply voltage associated with the input port.  
[2] dV/dt ≥ 1.0 V/ns.  
[3] VCCO is the supply voltage associated with the output port.  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
14 / 27  
 
 
 
 
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
10.2 Typical propagation delay characteristics  
aaa-027043  
aaa-027044  
18  
18  
15  
12  
10  
7
(1)  
t
t
PLHHL  
(ns)  
PHL  
(ns)  
15  
12  
10  
7
(1)  
(2)  
(3)  
(2)  
(3)  
(4)  
(5)  
(4)  
(5)  
(6)  
(6)  
4
4
5
15  
25  
35  
45  
(pF)  
55  
5
15  
25  
35  
45  
C (pF)  
L
55  
C
L
a. HIGH to LOW propagation delay (An to YBn)  
b. LOW to HIGH propagation delay (An to YBn)  
aaa-027045  
aaa-027046  
18  
16  
14  
12  
10  
8
18  
16  
14  
12  
10  
8
t
t
PLH  
(ns)  
PHL  
(1)  
(2)  
(3)  
(6)  
(4)  
(5)  
(ns)  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
5
15  
25  
35  
45  
(pF)  
55  
5
15  
25  
35  
45  
C (pF)  
L
55  
C
L
c. HIGH to LOW propagation delay (B4 to YA4)  
d. LOW to HIGH propagation delay (B4 to YA4)  
(1) VCC(B) = 1.2 V  
(2) VCC(B) = 1.5 V  
(3) VCC(B) = 1.8 V  
(4) VCC(B) = 2.5 V  
(5) VCC(B) = 3.3 V  
(6) VCC(B) = 5.0 V  
Figure 6.ꢀ Typical propagation delay versus load capacitance; Tamb = 25 °C; VCC(A) = 1.2 V  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
15 / 27  
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
aaa-027047  
aaa-027048  
18  
18  
14  
10  
6
(1)  
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
(2)  
14  
10  
6
(2)  
(3)  
(4)  
(3)  
(4)  
(5)  
(6)  
(5)  
(6)  
2
2
5
15  
25  
35  
45  
(pF)  
55  
5
15  
25  
35  
45  
C (pF)  
L
55  
C
L
a. HIGH to LOW propagation delay (An to YBn)  
b. LOW to HIGH propagation delay (An to YBn)  
aaa-027049  
aaa-027050  
14  
12  
10  
8
14  
12  
10  
8
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
(5)  
(2)  
(3)  
(6)  
(4)  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
6
6
5
15  
25  
35  
45  
(pF)  
55  
5
15  
25  
35  
45  
C (pF)  
L
55  
C
L
c. HIGH to LOW propagation delay (B4 to YA4)  
d. LOW to HIGH propagation delay (B4 to YA4)  
(1) VCC(B) = 1.2 V  
(2) VCC(B) = 1.5 V  
(3) VCC(B) = 1.8 V  
(4) VCC(B) = 2.5 V  
(5) VCC(B) = 3.3 V  
(6) VCC(B) = 5.0 V  
Figure 7.ꢀ Typical propagation delay versus load capacitance; Tamb = 25 °C; VCC(A) = 1.5 V  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
16 / 27  
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
aaa-027051  
aaa-027052  
18  
18  
14  
10  
6
(1)  
t
t
PLH  
(ns)  
PLHHL  
(ns)  
14  
10  
6
(1)  
(2)  
(3)  
(4)  
(2)  
(3)  
(4)  
(5)  
(6)  
(5)  
(6)  
2
2
5
15  
25  
35  
45  
(pF)  
55  
5
15  
25  
35  
45  
C (pF)  
L
55  
C
L
a. HIGH to LOW propagation delay (An to YBn)  
b. LOW to HIGH propagation delay (An to YBn)  
aaa-027053  
aaa-027054  
12  
10  
8
12  
10  
8
t
t
PLHHL  
(ns)  
PHL  
(ns)  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
6
6
4
4
5
15  
25  
35  
45  
(pF)  
55  
5
15  
25  
35  
45  
C (pF)  
L
55  
C
L
c. HIGH to LOW propagation delay (B4 to YA4)  
d. LOW to HIGH propagation delay (B4 to YA4)  
(1) VCC(B) = 1.2 V  
(2) VCC(B) = 1.5 V  
(3) VCC(B) = 1.8 V  
(4) VCC(B) = 2.5 V  
(5) VCC(B) = 3.3 V  
(6) VCC(B) = 5.0 V  
Figure 8.ꢀ Typical propagation delay versus load capacitance; Tamb = 25 °C; VCC(A) = 1.8 V  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
17 / 27  
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
aaa-027055  
aaa-027056  
18  
18  
14  
10  
6
t
t
PLH  
(ns)  
PLHHL  
(1)  
(ns)  
14  
10  
6
(1)  
(2)  
(3)  
(2)  
(3)  
(4)  
(4)  
(5)  
(6)  
(5)  
(6)  
2
2
5
15  
25  
35  
45  
(pF)  
55  
5
15  
25  
35  
45  
C (pF)  
L
55  
C
L
a. HIGH to LOW propagation delay (An to YBn)  
b. LOW to HIGH propagation delay (An to YBn)  
aaa-027057  
aaa-027058  
10  
8
10  
8
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
6
6
4
4
2
2
5
15  
25  
35  
45  
(pF)  
55  
5
15  
25  
35  
45  
C (pF)  
L
55  
C
L
c. HIGH to LOW propagation delay (B4 to YA4)  
d. LOW to HIGH propagation delay (B4 to YA4)  
(1) VCC(B) = 1.2 V  
(2) VCC(B) = 1.5 V  
(3) VCC(B) = 1.8 V  
(4) VCC(B) = 2.5 V  
(5) VCC(B) = 3.3 V  
(6) VCC(B) = 5.0 V  
Figure 9.ꢀ Typical propagation delay versus load capacitance; Tamb = 25 °C; VCC(A) = 2.5 V  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
18 / 27  
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
aaa-027059  
aaa-027060  
18  
18  
14  
10  
6
t
t
PLH  
(ns)  
PLHHL  
(1)  
(ns)  
14  
10  
6
(1)  
(2)  
(3)  
(2)  
(3)  
(4)  
(4)  
(5)  
(6)  
(5)  
(6)  
2
2
5
15  
25  
35  
45  
(pF)  
55  
5
15  
25  
35  
45  
C (pF)  
L
55  
C
L
a. HIGH to LOW propagation delay (An to YBn)  
b. LOW to HIGH propagation delay (An to YBn)  
aaa-027061  
aaa-027062  
8
7
6
5
4
3
2
8
7
6
5
4
3
2
t
t
PLHHL  
(ns)  
PHL  
(ns)  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
5
15  
25  
35  
45  
(pF)  
55  
5
15  
25  
35  
45  
C (pF)  
L
55  
C
L
c. HIGH to LOW propagation delay (B4 to YA4)  
d. LOW to HIGH propagation delay (B4 to YA4)  
(1) VCC(B) = 1.2 V  
(2) VCC(B) = 1.5 V  
(3) VCC(B) = 1.8 V  
(4) VCC(B) = 2.5 V  
(5) VCC(B) = 3.3 V  
(6) VCC(B) = 5.0 V  
Figure 10.ꢀ Typical propagation delay versus load capacitance; Tamb = 25 °C; VCC(A) = 3.3 V  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
19 / 27  
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
aaa-027063  
aaa-027064  
18  
18  
14  
10  
6
t
t
PLH  
(ns)  
PHL  
(1)  
(ns)  
14  
10  
6
(1)  
(2)  
(3)  
(2)  
(3)  
(4)  
(5)  
(6)  
(4)  
(5)  
(6)  
2
2
5
15  
25  
35  
45  
(pF)  
55  
5
15  
25  
35  
45  
C (pF)  
L
55  
C
L
a. HIGH to LOW propagation delay (An to YBn)  
b. LOW to HIGH propagation delay (An to YBn)  
aaa-027065  
aaa-027066  
8
7
6
5
4
3
2
8
7
6
5
4
3
2
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
(2)  
(3)  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(4)  
(5)  
(6)  
5
15  
25  
35  
45  
(pF)  
55  
5
15  
25  
35  
45  
C (pF)  
L
55  
C
L
c. HIGH to LOW propagation delay (B4 to YA4)  
d. LOW to HIGH propagation delay (B4 to YA4)  
(1) VCC(B) = 1.2 V  
(2) VCC(B) = 1.5 V  
(3) VCC(B) = 1.8 V  
(4) VCC(B) = 2.5 V  
(5) VCC(B) = 3.3 V  
(6) VCC(B) = 5.0 V  
Figure 11.ꢀ Typical propagation delay versus load capacitance; Tamb = 25 °C; VCC(A) = 5 V  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
20 / 27  
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
11 Application information  
11.1 Unidirectional logic level-shifting application  
The circuit given in Figure 12 is an example of the 74LVC4T3144-Q100 being used in an  
unidirectional logic level-shifting application.  
1.8 V  
5.0 V  
V
V
CC(B)  
CC(A)  
system-1  
74LVC4T3144  
system-2  
A1  
A2  
YB1  
YB2  
YB3  
B4  
A3  
YA4  
OE  
aaa-027067  
Figure 12.ꢀ Unidirectional logic level-shifting application  
Table 15.ꢀDescription unidirectional logic level-shifting application  
Name  
VCC(A)  
VCC(B)  
A1, A2, A3  
YA4  
Description  
supply voltage of system-1 (1.2 V to 5.5 V)  
supply voltage of system-2 (1.2 V to 5.5 V)  
input level depends on VCC(A) voltage  
output level depends on VCC(A) voltage  
output level depends on VCC(B) voltage  
input level depends on VCC(B) voltage  
input level depends on VCC(A) voltage  
device GND  
YB1, YB2, YB3  
B4  
OE  
GND  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
21 / 27  
 
 
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
11.2 Power-up considerations  
The device is designed such that no special power-up sequence is required other than  
GND being applied first.  
Table 16.ꢀTypical total supply current (ICC(A) + ICC(B)  
)
VCC(A)  
VCC(B)  
0 V  
0
Unit  
1.2 V  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
1
1.5 V  
< 1  
1.8 V  
2.5 V  
< 1  
3.3 V  
< 1  
5.0 V  
< 1  
1
0 V  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
μA  
μA  
μA  
μA  
μA  
μA  
μA  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
5.0 V  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
22 / 27  
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
12 Package outline  
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm  
SOT402-1  
D
E
A
X
c
y
H
v
M
A
E
Z
8
14  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
7
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
5.1  
4.9  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.72  
0.38  
mm  
1.1  
0.65  
1
0.2  
0.13  
0.1  
0.25  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT402-1  
MO-153  
Figure 13.ꢀ Package outline SOT402-1 (TSSOP14)  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
23 / 27  
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
13 Abbreviations  
Table 17.ꢀAbbreviations  
Acronym  
CDM  
Description  
Charged Device Model  
Device Under Test  
DUT  
ESD  
ElectroStatic Discharge  
Human Body Model  
HBM  
14 Revision history  
Table 18.ꢀRevision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
74LVC4T3144_Q100 v.1 20170814  
Product data sheet  
-
-
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
24 / 27  
 
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
15 Legal information  
15.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Definition  
Objective [short] data sheet  
Development  
This document contains data from the objective specification for product  
development.  
Preliminary [short] data sheet  
Product [short] data sheet  
Qualification  
Production  
This document contains data from the preliminary specification.  
This document contains the product specification.  
[1] Please consult the most recently issued document before initiating or completing a design.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple  
devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.  
or warranty that such applications will be suitable for the specified use  
without further testing or modification. Customers are responsible for the  
15.2 Definitions  
design and operation of their applications and products using Nexperia  
products, and Nexperia accepts no liability for any assistance with  
Draft — The document is a draft version only. The content is still under  
applications or customer product design. It is customer’s sole responsibility  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
customer’s applications and products planned, as well as for the planned  
warranties as to the accuracy or completeness of information included herein  
application and use of customer’s third party customer(s). Customers should  
and shall have no liability for the consequences of use of such information.  
provide appropriate design and operating safeguards to minimize the risks  
to determine whether the Nexperia product is suitable and fit for the  
associated with their applications and products. Nexperia does not accept  
Short data sheet — A short data sheet is an extract from a full data sheet  
any liability related to any default, damage, costs or problem which is based  
with the same product type number(s) and title. A short data sheet is  
on any weakness or default in the customer’s applications or products, or  
intended for quick reference only and should not be relied upon to contain  
the application or use by customer’s third party customer(s). Customer is  
detailed and full information. For detailed and full information see the  
responsible for doing all necessary testing for the customer’s applications  
relevant full data sheet, which is available on request via the local Nexperia  
and products using Nexperia products in order to avoid a default of the  
sales office. In case of any inconsistency or conflict with the short data sheet,  
applications and the products or of the application or use by customer’s third  
the full data sheet shall prevail.  
party customer(s). Nexperia does not accept any liability in this respect.  
Product specification — The information and data provided in a Product  
Limiting values — Stress above one or more limiting values (as defined in  
data sheet shall define the specification of the product as agreed between  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
Nexperia and its customer, unless Nexperia and customer have explicitly  
damage to the device. Limiting values are stress ratings only and (proper)  
agreed otherwise in writing. In no event however, shall an agreement be  
operation of the device at these or any other conditions above those  
valid in which the Nexperia product is deemed to offer functions and qualities  
beyond those described in the Product data sheet.  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
15.3 Disclaimers  
Terms and conditions of commercial sale — Nexperia products are  
sold subject to the general terms and conditions of commercial sale, as  
Limited warranty and liability — Information in this document is believed  
published at http://www.nexperia.com/profile/terms, unless otherwise agreed  
to be accurate and reliable. However, Nexperia does not give any  
in a valid written individual agreement. In case an individual agreement is  
representations or warranties, expressed or implied, as to the accuracy  
concluded only the terms and conditions of the respective agreement shall  
or completeness of such information and shall have no liability for the  
apply. Nexperia hereby expressly objects to applying the customer’s general  
consequences of use of such information. Nexperia takes no responsibility  
terms and conditions with regard to the purchase of Nexperia products by  
for the content in this document if provided by an information source outside  
customer.  
of Nexperia. In no event shall Nexperia be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation -  
lost profits, lost savings, business interruption, costs related to the removal  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or  
or replacement of any products or rework charges) whether or not such  
the grant, conveyance or implication of any license under any copyrights,  
damages are based on tort (including negligence), warranty, breach of  
patents or other industrial or intellectual property rights.  
contract or any other legal theory. Notwithstanding any damages that  
customer might incur for any reason whatsoever, Nexperia's aggregate and  
Suitability for use in automotive applications — This Nexperia product  
cumulative liability towards customer for the products described herein shall  
has been qualified for use in automotive applications. Unless otherwise  
be limited in accordance with the Terms and conditions of commercial sale of  
agreed in writing, the product is not designed, authorized or warranted to  
Nexperia.  
be suitable for use in life support, life-critical or safety-critical systems or  
equipment, nor in applications where failure or malfunction of an Nexperia  
product can reasonably be expected to result in personal injury, death or  
Right to make changes — Nexperia reserves the right to make changes  
to information published in this document, including without limitation  
severe property or environmental damage. Nexperia and its suppliers accept  
specifications and product descriptions, at any time and without notice. This  
no liability for inclusion and/or use of Nexperia products in such equipment or  
document supersedes and replaces all information supplied prior to the  
applications and therefore such inclusion and/or use is at the customer's own  
publication hereof.  
risk.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
25 / 27  
 
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
15.4 Trademarks  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
74LVC4T3144_Q100  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2017. All rights reserved.  
Product data sheet  
Rev. 1 — 14 August 2017  
26 / 27  
Nexperia  
74LVC4T3144-Q100  
4-bit dual supply buffer/line driver; 3-state  
Contents  
1
General description ............................................ 1  
2
3
4
5
5.1  
5.2  
6
7
8
Features and benefits .........................................1  
Ordering information .......................................... 2  
Functional diagram .............................................2  
Pinning information ............................................ 3  
Pinning ...............................................................3  
Pin description ...................................................3  
Functional description ........................................3  
Limiting values ....................................................4  
Recommended operating conditions ................4  
Static characteristics ..........................................5  
Dynamic characteristics .....................................9  
Waveforms and test circuit .............................. 12  
Typical propagation delay characteristics ........ 15  
Application information ....................................21  
Unidirectional logic level-shifting application ....21  
Power-up considerations ................................. 22  
Package outline .................................................23  
Abbreviations .................................................... 24  
Revision history ................................................ 24  
Legal information ..............................................25  
9
10  
10.1  
10.2  
11  
11.1  
11.2  
12  
13  
14  
15  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section 'Legal information'.  
© Nexperia B.V. 2017.  
All rights reserved.  
For more information, please visit: http://www.nexperia.com  
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Date of release: 14 August 2017  
Document identifier: 74LVC4T3144_Q100  

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