HEF4104BT-Q100 [NEXPERIA]
Quad low-to-high voltage translator with 3-state outputsProduction;型号: | HEF4104BT-Q100 |
厂家: | Nexperia |
描述: | Quad low-to-high voltage translator with 3-state outputsProduction 驱动 光电二极管 逻辑集成电路 |
文件: | 总12页 (文件大小:219K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HEF4104B-Q100
Quad low-to-high voltage translator with 3-state outputs
Rev. 2 — 14 December 2021
Product data sheet
1. General description
The HEF4104B-Q100 is a quad low-to-high voltage translator with complementary 3-state
outputs (Bn and Bn). A LOW on the output enable input (OE) causes the outputs to assume a
high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting
resistors to interface inputs to voltages in excess of VDD
.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 3) and is suitable for use in automotive applications.
2. Features and benefits
•
Automotive product qualification in accordance with AEC-Q100 (Grade 3)
Specified from -40 °C to +85 °C
•
•
•
•
•
•
•
•
•
•
Wide supply voltage range from 3.0 V to 15.0 V
CMOS low power dissipation
High noise immunity
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Inputs and outputs are protected against electrostatic effects
Complies with JEDEC standard JESD 13-B
ESD protection:
•
•
•
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
HEF4104BT-Q100
-40 °C to +85 °C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
Nexperia
HEF4104B-Q100
Quad low-to-high voltage translator with 3-state outputs
4. Functional diagram
V
V
DD(A)
16
DD(B)
1
3
2
B0
B0
B1
B1
B2
B2
B3
B3
4
A0
LEVEL
CONVERTER
A0
A1
A2
A3
OE
B0
B0
B1
B1
B2
B2
B3
B3
5
6
A1
A2
7
LEVEL
CONVERTER
11
LEVEL
CONVERTER
10
9
LEVEL
CONVERTER
12
15
A3
13
14
LEVEL
CONVERTER
OE
LEVEL
CONVERTER
8
001aag264
V
V
V
DD(B)
001aag262
SS
DD(A)
Fig. 1. Logic symbol
Fig. 2. Logic diagram
5. Pinning information
5.1. Pinning
HEF4104B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
V
DD(A)
DD(B)
B0
OE
B3
B3
A3
A2
B2
B2
B0
A0
A1
B1
B1
V
SS
001aag263
Fig. 3. Pin configuration for SOT109-1 (SO16)
©
HEF4104B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 14 December 2021
2 / 12
Nexperia
HEF4104B-Q100
Quad low-to-high voltage translator with 3-state outputs
5.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
VDD(B)
1
supply voltage port B
complementary data output
data output
B0, B1, B2, B3
B0, B1, B2, B3
A0, A1, A2, A3
VSS
2, 7, 9, 14
3, 6, 10, 13
4, 5, 11, 12
data input
8
common negative supply voltage (0 V)
output enable input
supply voltage port A
OE
15
16
VDD(A)
6. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
Control
Output
Bn
OE
H
Bn
An
Z
An
L
Z
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol
VDD(A)
VDD(B)
IIK
Parameter
Conditions
Min
Max
+18
+18
±10
Unit
V
supply voltage A
supply voltage B
input clamping current
input voltage
port A; VDD(A) ≤ VDD(B)
port B; VDD(B) ≥ VDD(A)
VI < -0.5 V or VI > VDD(A) + 0.5 V
-0.5
-0.5
V
-
mA
VI
-0.5
VDD(A) + 0.5 V
IOK
output clamping current
input/output current
supply current
VO < -0.5 V or VO > VDD(B) + 0.5 V
-
±10
±10
50
mA
II/O
-
-
mA
mA
°C
IDD
[1]
Tstg
Tamb
Ptot
storage temperature
ambient temperature
total power dissipation
power dissipation
-65
-40
-
+150
+85
500
100
°C
Tamb = -40 °C to +85 °C
per output
mW
mW
P
-
[1] IDD is the combined current of IDD(A) and IDD(B)
.
©
HEF4104B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 14 December 2021
3 / 12
Nexperia
HEF4104B-Q100
Quad low-to-high voltage translator with 3-state outputs
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol
VDD(A)
VDD(B)
VI
Parameter
Conditions
Min
Typ
Max
≤ VDD(B)
15
Unit
V
supply voltage A
supply voltage B
input voltage
3
-
-
-
-
-
-
-
≥ VDD(A)
V
0
VDD(A)
+85
V
Tamb
ambient temperature
input transition rise and fall rate
in free air
-40
°C
Δt/ΔV
VDD(A) = 5 V
VDD(A) = 10 V
VDD(A) = 15 V
-
-
-
3.75
μs/V
μs/V
μs/V
0.5
0.08
9. Static characteristics
Table 6. Static characteristics
VDD(A) = VDD(B); VSS = 0 V; VI = VSS or VDD(A); unless otherwise specified.
Symbol Parameter
Conditions
VDD [1]
Tamb = -40 °C Tamb = +25 °C Tamb = +85 °C Unit
Min
Max
-
Min
Max
-
Min
Max
VIH
HIGH-level input
voltage
|IO| < 1 μA
5 V
3.5
3.5
3.5
-
-
V
V
V
V
V
V
V
V
V
V
V
V
10 V
15 V
5 V
7.0
-
7.0
-
7.0
11.0
-
11.0
-
11.0
-
VIL
LOW-level input voltage |IO| < 1 μA
-
1.5
3.0
4.0
-
-
1.5
3.0
4.0
-
-
1.5
3.0
4.0
-
10 V
15 V
5 V
-
-
-
-
-
-
VOH
VOL
IOH
HIGH-level output
voltage
|IO| < 1 μA
|IO| < 1 μA
4.95
4.95
4.95
10 V
15 V
5 V
9.95
-
9.95
-
9.95
-
14.95
-
14.95
-
14.95
-
LOW-level output
voltage
-
0.05
0.05
0.05
-1.7
-0.52
-1.3
-3.6
-
-
0.05
0.05
0.05
-1.4
-0.44
-1.1
-3.0
-
-
0.05
0.05
0.05
10 V
15 V
5 V
-
-
-
-
-
-
HIGH-level output
current
VO = 2.5 V
VO = 4.6 V
VO = 9.5 V
VO = 13.5 V
VO = 0.4 V
VO = 0.5 V
VO = 1.5 V
-
-
-
-1.1 mA
-0.36 mA
-0.9 mA
-2.4 mA
5 V
-
-
-
10 V
15 V
5 V
-
-
-
-
-
-
IOL
LOW-level output
current
0.52
0.44
0.36
-
-
-
mA
mA
mA
10 V
15 V
15 V
5 V
1.3
-
1.1
-
0.9
3.6
-
3.0
-
2.4
II
input leakage current
supply current
-
-
-
-
-
-
±0.3
20
40
80
1.6
-1.6
-
-
-
-
-
-
±0.3
20
40
80
1.6
-1.6
-
-
-
-
-
-
±1.0 μA
150 μA
300 μA
600 μA
12.0 μA
-12.0 μA
IDD
all valid input
combinations;
IO = 0 A
[2]
10 V
15 V
IOZ
OFF-state output
current
HIGH; VO = VDD(B) 15 V
LOW; VO = VSS 15 V
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HEF4104B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 14 December 2021
4 / 12
Nexperia
HEF4104B-Q100
Quad low-to-high voltage translator with 3-state outputs
Symbol Parameter
Conditions
VDD [1]
Tamb = -40 °C Tamb = +25 °C Tamb = +85 °C Unit
Min
Max
Min
Max
Min
Max
CI
input capacitance
digital inputs
-
-
-
-
7.5
-
-
pF
[1] VDD is the same as VDD(A) and VDD(B)
.
[2] IDD is the combined current of IDD(A) and IDD(B)
.
001aag265
15
V
DD(B)
(V)
operating area
10
5
0
0
5
10
15
V
(V)
DD(A)
The shaded area shows the permissible operating range.
Fig. 4. VDD(B) as a function of VDD(A)
10. Dynamic characteristics
Table 7. Dynamic characteristics
Tamb = 25 °C unless otherwise specified; for test circuit see Fig. 7.
Symbol Parameter
Conditions
Extrapolation formula[1] Min
Typ
Max Unit
tPHL
tPLH
tTHL
tTLH
HIGH to LOW
propagation delay
An to Bn, Bn; see Fig. 5
VDD(A) = VDD(B) = 5 V
VDD(A) = VDD(B) = 10 V
VDD(A) = VDD(B) = 15 V
An to Bn, Bn; see Fig. 5
VDD(A) = VDD(B) = 5 V
VDD(A) = VDD(B) = 10 V
VDD(A) = VDD(B) = 15 V
143 ns + (0.55 ns/pF)CL
69 ns + (0.23 ns/pF)CL
57 ns + (0.16 ns/pF)CL
-
-
-
170
80
340 ns
160 ns
135 ns
65
LOW to HIGH
propagation delay
143 ns + (0.55 ns/pF)CL
69 ns + (0.23 ns/pF)CL
62 ns + (0.16 ns/pF)CL
-
-
-
170
80
340 ns
160 ns
140 ns
70
HIGH to LOW output Bn or Bn; see Fig. 6
transition time
VDD(A) = VDD(B) = 5 V
10 ns + (1.00 ns/pF)CL
9 ns + (0.42 ns/pF)CL
6 ns + (0.28 ns/pF)CL
-
-
-
60
30
20
120 ns
60 ns
40 ns
VDD(A) = VDD(B) = 10 V
VDD(A) = VDD(B) = 15 V
LOW to HIGH output Bn or Bn; see Fig. 6
transition time
VDD(A) = VDD(B) = 5 V
10 ns + (1.00 ns/pF)CL
9 ns + (0.42 ns/pF)CL
6 ns + (0.28 ns/pF)CL
-
-
-
60
30
20
120 ns
60 ns
40 ns
VDD(A) = VDD(B) = 10 V
VDD(A) = VDD(B) = 15 V
©
HEF4104B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 14 December 2021
5 / 12
Nexperia
HEF4104B-Q100
Quad low-to-high voltage translator with 3-state outputs
Symbol Parameter
Conditions
Extrapolation formula[1] Min
Typ
Max Unit
tPHZ
tPLZ
tPZH
tPZL
HIGH to OFF-state
propagation delay
OE to Bn, Bn; see Fig. 6
VDD(A) = VDD(B) = 5 V
VDD(A) = VDD(B) = 10 V
VDD(A) = VDD(B) = 15 V
OE to Bn, Bn; see Fig. 6
VDD(A) = VDD(B) = 5 V
VDD(A) = VDD(B) = 10 V
VDD(A) = VDD(B) = 15 V
OE to Bn, Bn; see Fig. 6
VDD(A) = VDD(B) = 5 V
VDD(A) = VDD(B) = 10 V
VDD(A) = VDD(B) = 15 V
OE to Bn, Bn; see Fig. 6
VDD(A) = VDD(B) = 5 V
VDD(A) = VDD(B) = 10 V
VDD(A) = VDD(B) = 15 V
-
-
-
70
55
60
135 ns
110 ns
120 ns
LOW to OFF-state
propagation delay
-
-
-
70
55
55
135 ns
105 ns
110 ns
OFF-state to HIGH
propagation delay
-
-
-
195
95
395 ns
195 ns
165 ns
80
OFF-state to LOW
propagation delay
-
-
-
195
95
395 ns
190 ns
160 ns
80
[1] Typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF).
Table 8. Dynamic power dissipation
VDD(A) = VDD(B); VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C.
Symbol Parameter
PD dynamic power
dissipation
VDD [1] Typical formula (μW)
where
2
5 V
PD = 3000 × fi + Σ(fo × CL) × VDD
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
Σ(fo × CL) = sum of the outputs;
VDD = supply voltage in V.
2
2
10 V
15 V
PD = 12200 × fi + Σ(fo × CL) × VDD
PD = 31000 × fi + Σ(fo × CL) × VDD
[1] VDD is the same as VDD(A) and VDD(B)
.
©
HEF4104B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 14 December 2021
6 / 12
Nexperia
HEF4104B-Q100
Quad low-to-high voltage translator with 3-state outputs
10.1. Waveforms and test circuit
V
I
An input
V
M
0 V
t
t
PLH
PHL
V
OH
V
Y
Bn output
V
M
V
X
V
OL
t
t
TLH
THL
t
t
PHL
PLH
V
OH
V
Y
t
Bn output
V
X
V
OL
t
TLH
THL
001aaj783
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 5. Data input (An) to data output (Bn, Bn) propagation delays and output transition times
V
I
OE input
V
M
V
SS
t
t
PLZ
PZL
V
OH
V
Y
output
LOW-to-OFF
OFF-to-LOW
V
X
V
OL
t
t
PHZ
PZH
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
X
V
OL
outputs on
outputs off
outputs on
001aaj782
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 6. Enable and disable times
Table 9. Measurement points
Input
Output
VM
VI
VM
VX
VY
VSS or VDD(A)
0.5VDD(A)
0.5VDD(B)
0.1VDD(B)
0.9VDD(B)
©
HEF4104B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 14 December 2021
7 / 12
Nexperia
HEF4104B-Q100
Quad low-to-high voltage translator with 3-state outputs
t
W
V
I
90 %
90 %
negative
pulse
V
V
V
M
M
10 %
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
90 %
positive
pulse
V
M
M
10 %
10 %
0 V
t
W
001aaj781
a. Input waveforms
V
EXT
V
DD
R
L
V
V
O
I
G
DUT
R
T
C
L
001aaj915
b. Test circuit
Test data given in Table 10.
Definitions for test circuit:
CL = Load capacitance including jig and probe capacitance
RL = Load resistance
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator
Fig. 7. Test circuit for measuring switching times
Table 10. Test data
Supplies
Input
tr, tf
Load
RL
VEXT
VDD(A) = VDD(B)
5 V to 15 V
CL
tPHL, tPLH
open
tPZL, tPLZ
tPZH, tPHZ
≤ 20 ns
1 kΩ
50 pF
VDD(B)
VSS
©
HEF4104B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 14 December 2021
8 / 12
Nexperia
HEF4104B-Q100
Quad low-to-high voltage translator with 3-state outputs
11. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.0100
0.0075
0.010 0.057
0.004 0.049
0.019
0.014
0.39
0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig. 8. Package outline SOT109-1 (SO16)
©
HEF4104B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 14 December 2021
9 / 12
Nexperia
HEF4104B-Q100
Quad low-to-high voltage translator with 3-state outputs
12. Abbreviations
Table 11. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Military
ESD
HBM
MIL
MM
Machine Model
13. Revision history
Table 12. Revision history
Document ID
Release date
20211214
Data sheet status
Change notice
Supersedes
HEF4104B_Q100 v.2
Modifications:
Product data sheet
-
HEF4104B_Q100 v.1
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Section 1 and Section 2 updated.
Section 12 added.
HEF4104B_Q100 v.1
20140324
Product data sheet
-
-
©
HEF4104B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 14 December 2021
10 / 12
Nexperia
HEF4104B-Q100
Quad low-to-high voltage translator with 3-state outputs
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
14. Legal information
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status Product
Definition
[1][2]
status [3]
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
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©
HEF4104B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 14 December 2021
11 / 12
Nexperia
HEF4104B-Q100
Quad low-to-high voltage translator with 3-state outputs
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................2
5.1. Pinning.........................................................................2
5.2. Pin description.............................................................3
6. Functional description................................................. 3
7. Limiting values............................................................. 3
8. Recommended operating conditions..........................4
9. Static characteristics....................................................4
10. Dynamic characteristics............................................ 5
10.1. Waveforms and test circuit........................................ 7
11. Package outline.......................................................... 9
12. Abbreviations............................................................10
13. Revision history........................................................10
14. Legal information......................................................11
© Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 14 December 2021
©
HEF4104B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 2 — 14 December 2021
12 / 12
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