PBSS4360PAS [NEXPERIA]
60 V, 3 A NPN low VCEsat (BISS) transistorProduction;
| 型号： | PBSS4360PAS |
| 厂家： | 
Nexperia |
| 描述： | 60 V, 3 A NPN low VCEsat (BISS) transistorProduction |
| 文件： | 总15页 (文件大小：1055K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
1 July 2023
Product data sheet
1. General description
NPN low VCEsat transistor, encapsulated in an ultra thin DFN2020D-3 (SOT1061D) leadless small
Surface-Mounted Device (SMD) plastic package with medium power capability and visible and
soldarable side pads.
PNP complement: PBSS5360PAS
2. Features and benefits
•
Low collector-emitter saturation voltage VCEsat
•
•
•
•
•
•
•
•
High collector current capability IC and ICM
High collector current gain (hFE) at high IC
High efficiency due to less heat generation
High temperature applications up to 175 °C
Reduced Printed-Circuit Board (PCB) area requirements
Leadless small SMD plastic package with soldarable side pads
Exposed heat sink for excellent thermal and electrical conductivity
Suitable for Automatic Optical Inspection (AOI) of solder joint
3. Applications
•
•
•
•
•
Loadswitch
Battery-driven devices
Power management
Charging circuits
Power switches (e.g. motors, fans)
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCEO
collector-emitter
voltage
open base
-
-
60
V
IC
collector current
-
-
-
-
3
A
ICM
peak collector current single pulse; tp ≤ 1 ms
-
6
A
RCEsat
collector-emitter
saturation resistance
IC = 3 A; IB = 300 mA; pulsed; tp ≤
300 µs; δ ≤ 0.02; Tamb = 25 °C
73
108
mΩ
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
5. Pinning information
Table 2. Pinning information
Pin
1
Symbol
Description
base
Simplified outline
Graphic symbol
B
E
C
3
2
emitter
C
3
collector
B
1
2
E
sym021
Transparent top view
DFN2020D-3 (SOT1061D)
6. Ordering information
Table 3. Ordering information
Type number
Package
Name
Description
Version
PBSS4360PAS
DFN2020D-3 plastic, leadless thermal enhanced ultra thin small outline SOT1061D
package with side-wettable flanks (SWF); no leads; 3
terminals; 1.3 mm pitch; 2 mm x 2 mm x 0.65 mm body
7. Marking
Table 4. Marking codes
Type number
Marking code
E9
PBSS4360PAS
©
PBSS4360PAS
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
2 / 15
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VCBO
VCEO
VEBO
IC
Parameter
Conditions
Min
Max
80
Unit
V
collector-base voltage
open emitter
-
collector-emitter voltage open base
-
60
V
emitter-base voltage
collector current
open collector
-
7
V
-
3
A
ICM
peak collector current
base current
single pulse; tp ≤ 1 ms
-
6
A
IB
-
500
1
mA
A
IBM
peak base current
total power dissipation
-
Ptot
Tamb ≤ 25 °C
[1]
-
0.6
1.2
1.5
2.5
175
175
175
W
W
W
W
°C
°C
°C
[2] [3]
[4]
-
-
[5] [6]
-
Tj
junction temperature
ambient temperature
storage temperature
-
Tamb
Tstg
-55
-65
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.
[4] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2.
[5] Device mounted on a ceramic PCB, Al2O3, standard footprint.
[6] Device mounted on an FR4 PCB, 4-layer copper, tin-plated and mounting pad for collector 1 cm2.
aaa-013298
3
(1) + (2)
P
tot
(W)
2
1
0
(3)
(4) + (5)
(6)
-75
25
125
225
T
(°C)
amb
(1) Ceramic PCB, single-sided copper, standard footprint
(2) FR4 PCB, 4-layer copper, 1 cm2
(3) FR4 PCB, single-sided copper, 6 cm2
(4) FR4 PCB, single-sided copper, 1 cm2
(5) FR4 PCB, 4-layer copper, standard footprint
(6) FR4 PCB, single-sided copper, standard footprint
Fig. 1. Power derating curves
©
PBSS4360PAS
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
3 / 15
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
250
125
100
60
Unit
K/W
K/W
K/W
K/W
Rth(j-a)
thermal resistance from in free air
junction to ambient
[1]
-
-
-
-
-
-
-
-
[2] [3]
[4]
[5] [6]
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.
[4] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2.
[5] Device mounted on a ceramic PCB, Al2O3, standard footprint.
[6] Device mounted on a FR4 PCB, 4-layer copper, tin-plated and mounting pad for collector 1 cm2.
006aab979
3
10
Z
th(j-a)
(K/W)
duty cycle = 1
0.75
0.5
0.33
2
10
0.2
0.1
0.05
10
0.02
0.01
1
0
- 1
10
- 5
- 4
- 3
- 2
- 1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, standard footprint
Fig. 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
006aab980
3
10
Z
th(j-a)
(K/W)
duty cycle = 1
2
10
0.75
0.5
0.33
0.2
0.1
10
0.05
0.02
0.01
1
0
- 1
10
- 5
- 4
- 3
- 2
- 1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, mounting pad for collector 1 cm2
Fig. 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
©
PBSS4360PAS
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
4 / 15
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
006aac000
3
10
Z
th(j-a)
(K/W)
duty cycle = 1
2
10
0.75
0.5
0.33
0.2
10
0.1
0.05
1
0.02
0
0.01
- 1
10
- 5
- 4
- 3
- 2
- 1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, mounting pad for collector 6 cm2
Fig. 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
aaa-013299
3
10
Z
th(j-a)
(K/W)
duty cycle = 1
2
10
0.75
0.50
0.33
0.20
0.10
0.05
10
0.02
0.01
0
1
-1
10
-5
-4
-3
-2
10
-1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, 4-layer copper, standard footprint
Fig. 5. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
aaa-013300
2
10
duty cycle = 1
0.75
Z
th(j-a)
(K/W)
0.50
0.20
0.33
10
0.10
0.02
0.05
0.01
0
1
-1
10
-5
-4
10
-3
-2
-1
10
2
3
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, 4-layer copper, mounting pad for collector 1 cm2
Fig. 6. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
©
PBSS4360PAS
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
5 / 15
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
006aab982
2
10
duty cycle = 1
Z
0.75
0.5
th(j-a)
(K/W)
0.33
0.2
10
0.1
0.05
0.02
0.01
1
0
- 1
10
- 5
- 4
- 3
- 2
- 1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
Ceramic PCB, Al2O3, standard footprint
Fig. 7. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
©
PBSS4360PAS
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
6 / 15
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
10. Characteristics
Table 7. Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
100
50
Unit
nA
ICBO
collector-base cut-off
current
VCB = 64 V; IE = 0 A; Tamb = 25 °C
VCB = 64 V; IE = 0 A; Tj = 150 °C
VEB = 5.6 V; IC = 0 A; Tamb = 25 °C
-
-
-
-
-
-
µA
IEBO
ICES
hFE
emitter-base cut-off
current
100
nA
collector-emitter cut-off VCE = 48 V; VBE = 0 V; Tamb = 25 °C
current
-
-
100
nA
DC current gain
VCE = 5 V; IC = 0.05 A; pulsed; tp ≤
300 µs; δ ≤ 0.02; Tamb = 25 °C
200
200
200
125
75
-
380
360
330
220
140
45
-
VCE = 5 V; IC = 0.5 A; pulsed; tp ≤
300 µs; δ ≤ 0.02; Tamb = 25 °C
-
VCE = 5 V; IC = 1 A; pulsed; tp ≤ 300 µs;
δ ≤ 0.02; Tamb = 25 °C
-
VCE = 5 V; IC = 2 A; pulsed; tp ≤ 300 µs;
δ ≤ 0.02; Tamb = 25 °C
-
VCE = 5 V; IC = 3 A; tp ≤ 300 µs; δ ≤
0.02; Tamb = 25 °C
-
VCEsat
collector-emitter
saturation voltage
IC = 0.5 A; IB = 50 mA; pulsed; tp ≤
300 µs; δ ≤ 0.02; Tamb = 25 °C
60
110
210
mV
mV
mV
IC = 1 A; IB = 100 mA; pulsed; tp ≤
300 µs; δ ≤ 0.02; Tamb = 25 °C
-
80
IC = 2 A; IB = 200 mA; pulsed; tp ≤
300 µs; δ ≤ 0.02; Tamb = 25 °C
-
150
IC = 3 A; IB = 300 mA; pulsed; tp ≤
300 µs; δ ≤ 0.02; Tamb = 25 °C
-
-
220
73
325
108
mV
mΩ
RCEsat
VBEsat
VBEon
collector-emitter
saturation resistance
base-emitter saturation IC = 2 A; IB = 100 mA; pulsed; tp ≤
-
-
0.9
1.1
V
V
voltage
300 µs; δ ≤ 0.02; Tamb = 25 °C
base-emitter turn-on
voltage
VCE = 5 V; IC = 1 A; pulsed; tp ≤ 300 µs;
δ ≤ 0.02; Tamb = 25 °C
0.75
0.95
td
tr
delay time
IC = 2 A; IBon = 0.1 A; IBoff = -0.1 A;
Tamb = 25 °C
-
11
-
-
-
-
-
-
-
ns
rise time
-
130
141
200
110
310
160
ns
ton
ts
turn-on time
storage time
fall time
-
ns
-
ns
tf
-
ns
toff
fT
turn-off time
transition frequency
-
ns
VCE = 10 V; IC = 100 mA; f = 100 MHz;
Tamb = 25 °C
75
MHz
Cc
collector capacitance
VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz;
Tamb = 25 °C
-
11
14
pF
©
PBSS4360PAS
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
7 / 15
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
aaa-019922
aaa-019923
3.0
600
I
= 27 mA
21.6 mA
16.2 mA
B
24.3 mA
18.9 mA
I
(1)
(2)
C
(A)
h
FE
2.4
13.5 mA
8.1 mA
400
200
0
1.8
1.2
0.6
0
10.8 mA
5.4 mA
(3)
2.7 mA
-1
2
3
4
0
0.5
1.0
1.5
2.0
10
1
10
10
10
10
(mA)
V
(V)
I
C
CE
Tamb = 25 °C
VCE = 2 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig. 9. Collector current as a function of collector-
emitter voltage; typical values
Fig. 8. DC current gain as a function of collector
current; typical values
aaa-019924
aaa-019925
1.2
1.2
V
BEsat
(V)
V
BE
(V)
(1)
0.9
(1)
(2)
(3)
0.8
(2)
(3)
0.6
0.3
0
0.4
0
-1
10
2
3
4
-1
-10
2
3
4
1
10
10
10
10
(mA)
-1
-10
-10
-10
-10
I (mA)
C
I
C
VCE = 2 V
IC/IB = 20
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 10. Base-emitter voltage as a function of collector Fig. 11. Base-emitter saturation voltage as a function of
current; typical values
collector current; typical values
©
PBSS4360PAS
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
8 / 15
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
aaa-019926
aaa-019927
1
1
V
CEsat
(V)
V
CEsat
(V)
-1
-2
-3
10
(1)
(2)
-1
10
(1)
10
10
(3)
(2)
(3)
-2
10
-1
2
3
4
-1
2
3
4
10
1
10
10
10
10
(mA)
10
1
10
10
10
10
I (mA)
C
I
C
IC/IB = 20
Tamb = 25 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig. 12. Collector-emitter saturation voltage as a
function of collector current; typical values
Fig. 13. Collector-emitter saturation voltage as a
function of collector current; typical values
aaa-019928
aaa-019929
3
2
10
10
R
CEsat
(Ω)
R
CEsat
(Ω)
2
10
10
1
10
(1)
(2)
(3)
(1)
(2)
(3)
1
-1
10
-1
10
10
-2
-2
10
-1
2
3
4
-1
2
3
4
10
1
10
10
10
10
(mA)
10
1
10
10
10
10
I (mA)
C
I
C
IC/IB = 20
Tamb = 25 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig. 14. Collector-emitter saturation resistance as a
function of collector current; typical values
Fig. 15. Collector-emitter saturation resistance as a
function of collector current; typical values
©
PBSS4360PAS
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
9 / 15
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
11. Test information
I
B
input pulse
90 %
(idealized waveform)
I
(100 %)
Bon
10 %
I
Boff
output pulse
(idealized waveform)
I
C
90 %
I
(100 %)
C
10 %
t
t
t
f
t
t
r
s
d
t
t
off
on
006aaa003
Fig. 16. Switching time definition
V
V
CC
BB
R
B
R
C
V
o
(probe)
450 Ω
(probe)
450 Ω
oscilloscope
oscilloscope
R2
V
I
DUT
R1
mlb826
Fig. 17. Test circuit for switching times
©
PBSS4360PAS
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Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
10 / 15
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
12. Package outline
0.65
max
1.3
0.45
0.35
0.35
0.25
0.04
max
1
2
2.1
1.9
1.1
0.9
0.3
0.2
3
1.6
1.4
2.1
1.9
Dimensions in mm
14-03-18
Fig. 18. Package outline DFN2020D-3 (SOT1061D)
©
PBSS4360PAS
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Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
11 / 15
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
13. Soldering
Footprint information for reflow soldering of DFN2020D-3 package
SOT1061D
2.1
1.7
1.3
0.4 (2x)
0.3 (2x)
0.5 (2x)
0.5 (2x) 0.6 (2x) 0.7 (2x)
0.25
1.1
0.35
0.3
0.25
2.5 2.3
0.25
1
1.1 1.2
0.35
0.35
0.35
0.3
0.4
0.5
1.5
1.6
1.7
occupied area
solder resist
solder paste
solder lands
Dimensions in mm
14-03-05
14-03-12
Issue date
sot1061d_fr
Fig. 19. Reflow soldering footprint for DFN2020D-3 (SOT1061D)
©
PBSS4360PAS
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
12 / 15
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
14. Revision history
Table 8. Revision history
Data sheet ID
PBSS4360PAS v.3
Modifications:
Release date
20230701
Data sheet status
Change notice
Supersedes
Product data sheet
-
PBSS4360PAS v.2
•
Product changed to non automotive. Please refer to the automotive product(s) with -Q.
PBSS4360PAS v.2
PBSS4360PAS v.1
20220318
20151016
Product data sheet
Product data sheet
-
-
PBSS4360PAS v.1
-
©
PBSS4360PAS
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
13 / 15
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
15. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
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©
PBSS4360PAS
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
14 / 15
Nexperia
PBSS4360PAS
60 V, 3 A NPN low VCEsat transistor
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking..........................................................................2
8. Limiting values............................................................. 3
9. Thermal characteristics............................................... 4
10. Characteristics............................................................7
11. Test information........................................................10
12. Package outline........................................................ 11
13. Soldering................................................................... 12
14. Revision history........................................................13
15. Legal information......................................................14
© Nexperia B.V. 2023. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 1 July 2023
©
PBSS4360PAS
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
1 July 2023
15 / 15
相关型号：
PBSS4440D/T1
TRANSISTOR 4000 mA, 40 V, NPN, Si, SMALL SIGNAL TRANSISTOR, PLASTIC, SC-74, 6 PIN, BIP General Purpose Small Signal
NXP
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