PBSS4480X [NEXPERIA]
80 V, 4 A NPN low VCEsat (BISS) transistorProduction;
| 型号： | PBSS4480X |
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Nexperia |
| 描述： | 80 V, 4 A NPN low VCEsat (BISS) transistorProduction 开关 晶体管 |
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DISCRETE SEMICONDUCTORS
DATA SHEET
ook, halfpage
PBSS4480X
80 V, 4 A
NPN low VCEsat (BISS) transistor
Product data sheet
2004 Oct 25
Supersedes data of 2004 Aug 5
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low VCEsat (BISS) transistor
PBSS4480X
FEATURES
QUICK REFERENCE DATA
• High hFE and low VCEsat at high current operation
• High collector current capability: IC maximum 4 A
• High efficiency leading to less heat generation.
SYMBOL
VCEO
IC
PARAMETER
MAX.
UNIT
collector-emitter voltage 80
V
A
A
collector current (DC)
peak collector current
4
ICM
10
54
APPLICATIONS
RCEsat
equivalent
mΩ
on-resistance
• Medium power peripheral drivers; e.g. fan, motor
• Strobe flash units for DSC and mobile phones
• Inverter applications; e.g. TFT displays
• Power switch for LAN and ADSL systems
• Medium power DC-to-DC conversion
• Battery chargers.
PINNING
PIN
DESCRIPTION
1
2
3
emitter
collector
base
DESCRIPTION
NPN low VCEsat transistor in a SOT89 (SC-62) plastic
package.
PNP complement: PBSS5480X.
2
1
MARKING
3
TYPE NUMBER
PBSS4480X
MARKING CODE(1)
*1Y
sym042
3
2
1
Note
1. * = p: made in Hong Kong.
* = t: made in Malaysia.
* = W: made in China.
Fig.1 Simplified outline (SOT89) and symbol.
ORDERING INFORMATION
PACKAGE
DESCRIPTION
TYPE NUMBER
NAME
VERSION
PBSS4480X
−
plastic surface mounted package; collector pad for good heat
transfer; 3 leads
SOT89
2004 Oct 25
2
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low VCEsat (BISS) transistor
PBSS4480X
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
VCBO
PARAMETER
collector-base voltage
CONDITIONS
open emitter
MIN.
MAX.
80
UNIT
−
−
−
−
−
−
−
−
V
V
V
A
A
A
A
A
VCEO
VEBO
IC
collector-emitter voltage
emitter-base voltage
collector current (DC)
repetitive peak collector current
peak collector current
base current (DC)
open base
80
5
open collector
note 4
4
ICRM
ICM
IB
tp ≤ 10 ms; δ ≤ 0.1
t = 1 ms or limited by Tj(max)
6
10
1
IBM
peak base current
t ≤ 300 μs
Tamb ≤ 25 °C
notes 1 and 2
note 2
2
Ptot
total power dissipation
−
−
−
−
−
−
2.5
W
550
1
mW
W
note 3
note 4
1.4
W
note 5
1.6
W
Tj
junction temperature
ambient temperature
storage temperature
150
+150
+150
°C
°C
°C
Tamb
Tstg
−65
−65
Notes
1. Operated under pulsed conditions; pulse width tp ≤ 10 ms; duty cycle δ ≤ 0.2.
2. Device mounted on a printed-circuit board, single-sided copper, tin-plated and standard footprint.
3. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 1 cm2.
4. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 6 cm2.
5. Device mounted on a 7 cm2 ceramic printed-circuit board, 1 cm2 single-sided copper and tin-plated. For other
mounting conditions, see “Thermal considerations for SOT89 in the General Part of associated Handbook”.
2004 Oct 25
3
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low VCEsat (BISS) transistor
PBSS4480X
001aaa229
1600
(1)
(2)
P
(mW)
tot
1200
800
400
0
(3)
−50
0
50
100
150
T
200
(°C)
amb
(1) FR4 PCB; 6 cm2 mounting pad for collector.
(2) FR4 PCB; 1 cm2 mounting pad for collector.
(3) FR4; standard footprint.
Fig.2 Power derating curves.
2004 Oct 25
4
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low VCEsat (BISS) transistor
PBSS4480X
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
CONDITIONS
VALUE
UNIT
thermal resistance from junction in free air
to ambient
notes 1 and 2
50
225
125
90
K/W
K/W
K/W
K/W
K/W
K/W
note 2
note 3
note 4
note 5
80
Rth(j-s)
thermal resistance from junction
to soldering point
16
Notes
1. Operated under pulsed conditions; pulse width tp ≤ 10 ms; duty cycle δ ≤ 0.2.
2. Device mounted on a printed-circuit board, single-sided copper, tin-plated and standard footprint.
3. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 1 cm2.
4. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 6 cm2.
5. Device mounted on a 7 cm2 ceramic printed-circuit board, 1 cm2 single-sided copper and tin-plated. For other
mounting conditions, see “Thermal considerations for SOT89 in the General Part of associated Handbook”.
006aaa232
3
10
Z
th
(1)
(K/W)
(2)
(3)
(4)
(5)
2
10
(6)
(7)
(8)
(9)
10
(10)
1
−1
10
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
Mounted on FR4 printed-circuit board; standard footprint.
(1) δ = 1.
(3) δ = 0.5.
(5) δ = 0.2.
(6) δ = 0.1.
(7) δ = 0.05.
(8) δ = 0.02.
(9) δ = 0.01.
(10) δ = 0.
(2) δ = 0.75.
(4) δ = 0.33.
Fig.3 Transient thermal impedance as a function of pulse time; typical values.
2004 Oct 25
5
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low VCEsat (BISS) transistor
PBSS4480X
006aaa233
3
10
Z
th
(K/W)
(1)
2
10
(2)
(4)
(3)
(5)
(6)
(7)
10
(8)
(9)
1
(10)
−1
10
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
Mounted on FR4 printed-circuit board; mounting pad for collector 1 cm2.
(1) δ = 1.
(3) δ = 0.5.
(5) δ = 0.2.
(6) δ = 0.1.
(7) δ = 0.05.
(8) δ = 0.02.
(9) δ = 0.01.
(10) δ = 0.
(2) δ = 0.75.
(4) δ = 0.33.
Fig.4 Transient thermal impedance as a function of pulse time; typical values.
006aaa234
3
10
Z
th
(K/W)
2
(1)
(3)
10
(2)
(4)
(5)
(6)
10
(7)
(8)
(9)
1
(10)
−1
10
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
Mounted on FR4 printed-circuit board; mounting pad for collector 6 cm2.
(1) δ = 1.
(3) δ = 0.5.
(5) δ = 0.2.
(6) δ = 0.1.
(7) δ = 0.05.
(8) δ = 0.02.
(9) δ = 0.01.
(10) δ = 0.
(2) δ = 0.75.
(4) δ = 0.33.
Fig.5 Transient thermal impedance as a function of pulse time; typical values.
6
2004 Oct 25
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low VCEsat (BISS) transistor
PBSS4480X
CHARACTERISTICS
Tamb = 25 °C unless otherwise specified.
SYMBOL
ICBO
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
100
UNIT
nA
collector-base cut-off current
VCB = 80 V; IE = 0 A
−
−
−
−
VCB = 80 V; IE = 0 A;
50
μA
Tj = 150 °C
ICES
IEBO
hFE
collector-emitter cut-off current VCE = 80 V; VBE = 0 V
−
−
−
−
100
100
−
nA
nA
−
emitter-base cut-off current
DC current gain
VEB = 5 V; IC = 0 A
VCE = 2 V; IC = 0.5 A
250
400
400
270
140
25
VCE = 2 V; IC = 1 A; note 1 250
VCE = 2 V; IC = 2 A; note 1 175
VCE = 2 V; IC = 4 A; note 1 80
−
−
−
−
−
−
VCEsat
collector-emitter saturation
voltage
IC = 0.5 A; IB = 50 mA
IC = 1 A; IB = 50 mA
IC = 2 A; IB = 40 mA
−
−
−
−
40
80
160
230
mV
mV
mV
mV
55
110
170
IC = 4 A; IB = 200 mA;
note 1
IC = 5 A; IB = 500 mA;
note 1
−
−
200
40
270
54
mV
RCEsat
VBEsat
equivalent on-resistance
IC = 5 A; IB = 500 mA;
note 1
mΩ
base-emitter saturation voltage IC = 0.5 A; IB = 50 mA
IC = 1 A; IB = 50 mA
−
−
−
0.78
0.79
0.82
0.85
0.9
V
V
V
IC = 1 A; IB = 100 mA;
note 1
0.95
IC = 4 A; IB = 400 mA;
note 1
−
0.95
1.05
V
VBEon
fT
base-emitter turn-on voltage
transition frequency
IC = 2 A; VCE = 2 V
−
0.78
150
0.85
V
IC = 100 mA; VCE = 10 V;
f = 100 MHz
120
−
MHz
Cc
collector capacitance
IE = ie = 0 A; VCB = 10 V;
f = 1 MHz
−
35
50
pF
Note
1. Pulse test: tp ≤ 300 μs; δ ≤ 0.02.
2004 Oct 25
7
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low VCEsat (BISS) transistor
PBSS4480X
001aaa734
001aab057
1000
1.2
h
FE
(1)
(2)
V
(V)
BE
800
0.8
(1)
(2)
600
400
200
0
(3)
(3)
0.4
0
10
−1
2
3
4
-1
2
3
4
10
1
10
10
10
10
(mA)
1
10
10
10
10
I (mA)
C
I
C
VCE = 2 V.
(1) amb = −55 °C.
VCE = 2 V.
T
(1) Tamb = 100 °C.
(2) Tamb = 25 °C.
(3) Tamb = −55 °C.
(2) Tamb = 25 °C.
(3) Tamb = 100 °C.
Fig.6 DC current gain as a function of collector
current; typical values.
Fig.7 Base-emitter voltage as a function of
collector current; typical values.
001aaa737
001aaab059
3
10
1
V
V
CEsat
CEsat
(V)
(mV)
2
-1
-2
-3
10
10
(1)
(2)
(3)
(1)
(2)
10
10
10
(3)
1
10
−1
2
3
4
-1
2
3
4
1
10
10
10
10
(mA)
10
1
10
10
10
10
(mA)
C
I
I
C
IC/IB = 20.
(1) Tamb = 100 °C.
(2) Tamb = 25 °C.
(3) Tamb = −55 °C.
(1) IC/IB = 100.
(2) IC/IB = 50.
(3) IC/IB = 10.
Fig.8 Collector-emitter saturation voltage as a
function of collector current; typical values.
Fig.9 Collector-emitter saturation voltage as a
function of collector current; typical values.
2004 Oct 25
8
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low VCEsat (BISS) transistor
PBSS4480X
001aaa738
001aaa736
3
10
1.2
R
CEsat
(Ω)
V
BEsat
(V)
2
10
(1)
(2)
(3)
0.8
0.4
0
10
1
−1
10
(1)
(3)
(2)
2
−2
10
−1
3
4
−1
2
3
4
10
1
10
10
10
10
(mA)
10
1
10
10
10
10
(mA)
I
I
C
C
IC/IB = 20.
(1) Tamb = 100 °C.
(2) amb = 25 °C.
(3) Tamb = −55 °C.
IC/IB = 20.
(1) Tamb = −55 °C.
(2) Tamb = 25 °C.
(3) Tamb = 100 °C.
T
Fig.10 Base-emitter saturation voltage as a
Fig.11 Equivalent on-resistance as a function of
collector current; typical values.
function of collector current; typical values.
001aaa733
001aab321
10
1.2
(4) (3)
(2) (1)
I
C
(A)
V
BEon
(V)
8
6
4
2
0
(5)
(6)
0.8
0.4
0
(7)
(8)
(9)
(10)
−1
2
3
4
0
0.4
0.8
1.2
1.6
2
10
1
10
10
10
10
I (mA)
C
V
(V)
CE
(1) IB = 190 mA.
(2) IB = 171 mA.
(5) IB = 114 mA.
(6) IB = 95 mA.
(9) IB = 38 mA.
(10) IB = 19 mA.
(3)
I
B = 152 mA.
(7)
IB = 76 mA.
(4) IB = 133 mA.
(8) IB = 57 mA.
Tamb = 25 °C.
Fig.12 Collector current as a function of
collector-emitter voltage; typical values.
Fig.13 Base-emitter turn-on voltage as a function
of collector current; typical values.
2004 Oct 25
9
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low VCEsat (BISS) transistor
PBSS4480X
Reference mounting conditions
32 mm
handbook, halfpage
32 mm
10 mm
2.5 mm
40
1 mm
mm
40 mm
10 mm
3 mm
2.5 mm
1 mm
2.5 mm
0.5 mm
1 mm
0.5 mm
5 mm
5 mm
3.96 mm
1.6 mm
3.96 mm
1.6 mm
001aaa234
MLE322
Fig.14 FR4, standard footprint.
Fig.15 FR4, mounting pad for collector 1 cm2.
32 mm
30 mm
20
mm
40
mm
2.5 mm
1 mm
0.5 mm
5 mm
3.96 mm
1.6 mm
001aaa235
Fig.16 FR4, mounting pad for collector 6 cm2.
2004 Oct 25
10
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low VCEsat (BISS) transistor
PBSS4480X
PACKAGE OUTLINE
Plastic surface-mounted package; collector pad for good heat transfer; 3 leads
SOT89
B
A
D
b
p3
E
H
E
L
p
1
2
3
c
b
p2
w
M
b
p1
e
1
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
b
b
b
c
D
E
e
e
H
E
L
p
w
p1
p2
p3
1
1.6
1.4
0.48
0.35
0.53
0.40
1.8
1.4
0.44
0.23
4.6
4.4
2.6
2.4
4.25
3.75
1.2
0.8
mm
3.0
1.5
0.13
REFERENCES
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
JEDEC
JEITA
04-08-03
06-03-16
SOT89
TO-243
SC-62
2004 Oct 25
11
NXP Semiconductors
Product data sheet
80 V, 4 A
NPN low VCEsat (BISS) transistor
PBSS4480X
DATA SHEET STATUS
DOCUMENT
STATUS(1)
PRODUCT
STATUS(2)
DEFINITION
Objective data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary data sheet
Product data sheet
Qualification
Production
This document contains data from the preliminary specification.
This document contains the product specification.
Notes
1. Please consult the most recently issued document before initiating or completing a design.
2. The product status of device(s) described in this document may have changed since this document was published
and may differ in case of multiple devices. The latest product status information is available on the Internet at
URL http://www.nxp.com.
DISCLAIMERS
above those given in the Characteristics sections of this
document is not implied. Exposure to limiting values for
extended periods may affect device reliability.
General ⎯ Information in this document is believed to be
accurate and reliable. However, NXP Semiconductors
does not give any representations or warranties,
expressed or implied, as to the accuracy or completeness
of such information and shall have no liability for the
consequences of use of such information.
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Quick reference data ⎯ The Quick reference data is an
extract of the product data given in the Limiting values and
Characteristics sections of this document, and as such is
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Applications ⎯ Applications that are described herein for
any of these products are for illustrative purposes only.
NXP Semiconductors makes no representation or
warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values ⎯ Stress above one or more limiting
values (as defined in the Absolute Maximum Ratings
System of IEC 60134) may cause permanent damage to
the device. Limiting values are stress ratings only and
operation of the device at these or any other conditions
2004 Oct 25
12
NXP Semiconductors
Customer notification
This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal
definitions and disclaimers. No changes were made to the technical content, except for package outline
drawings which were updated to the latest version.
Contact information
For additional information please visit: http://www.nxp.com
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© NXP B.V. 2009
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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R75/02/pp13
Date of release: 2004 Oct 25
Document order number: 9397 750 13924
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