NJW1329FH3 [NJRC]
Consumer Circuit, PQFP52, LQFP-52;
| 型号： | NJW1329FH3 |
| 厂家： | 
NEW JAPAN RADIO |
| 描述： | Consumer Circuit, PQFP52, LQFP-52 商用集成电路 |
| 文件： | 总18页 (文件大小：191K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NJW1329
Multi Input Wide Band Video Interface with I2C Control
GENERAL DESCRIPTION
PACKAGE OUTLINE
NJW1329 is a multi input wide band video interface IC with
I2C control. Also the NJW1329 includes 7-input 2 channel
video switch for CVBS, 3-input 1 channel video switch for
Component Video Signal, 2 channel 75-ohm driver for CVBS
and 1 channel 75-ohm driver for Component Video Signal.
NJW1329 is suitable for video equipment that has multi input
and multi output.
NJW1329FH3
FEATURES
● Operating Voltage Dual Supply V+ +3.0 to +3.45V, V- -3.0 to –5.5V
● 7-input 2 channel video switch for CVBS
● 3-input 1 channel video switch for Component Video Signal
● 2 channel 75-ohm driver for CVBS
● 1 channel 75-ohm driver for Component Video Signal
● 1 channel LOS (Loss Of Signal) detector for each CVBS and Component Video Signal
● I2C BUS control
● LQFP52-H3
PIN CONFIGURATION
39
38
37
36
35
34
33
32
31
30
29
28
27
VIN7
VIN6
VIN5
VIN4
VIN3
VIN2
VIN1
PRIN3
PRIN2
PRIN1
40
41
42
43
44
45
46
47
48
49
50
51
52
26
25
24
23
22
21
20
19
18
17
16
15
14
BIASPR1
PBIN3
PBIN2
PBIN1
BIASPB1
YIN3
BIASV1
V+
V-
YIN2
VOUT_LOS
VIN_LOS
VLOS
YIN1
BIASY1
V-
1
2
3
4
5
6
7
8
9
10
11
12
13
Ver.1
- 1 -
NJW1329
BLOCK DIAGRAM
V LOS detect
Y LOS detect
VOUT_LOS
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
6dB
6dB
75Ω
75Ω
VOUT1
VOUT2
YOUT_LOS
YOUT
YIN1
YIN2
YIN3
6dB
6dB
6dB
75Ω
75Ω
75Ω
PBIN1
PBIN2
PBIN3
PBOUT
PRIN1
PRIN2
PRIN3
PROUT
BIAS
I2C BUS
- 2 -
NJW1329
ABSOLUTE MAXIMUM RATINGS
(Ta=25ºC)
PARAMETER
Supply Voltage
Supply Voltage
Power Dissipation
Operating Temperature Range
Storage Temperature Range
SYMBOL
V+
RATINGS
3.5
UNIT
V
V
mW
ºC
ºC
V-
-6.0
Pd
Topr
Tstr
1800NOTE)
-20 to +75
-40 to +125
(Note) At on a board of EIA/JDAC specification. ( 114.3 x 76.2 x 1.6mm Two layers,FR-4)
RECOMMEND OPERATING VOLTAGE
(Ta=25ºC)
PARAMETER
Operating Voltage 1
Operating Voltage 2
SYMBOL
Vopr1
Vopr2
TEST CONDITION
V+ - GND
V- - GND
MIN.
3.0
-5.5
TYP. MAX. UNIT
3.3
3.45
-3.0
V
V
-3.3
ELECTRICAL CHARACTERISTICS
● Power Supply Characteristics
(TEST CONDITION: Ta=25ºC, V+ = 3.3V, VDD= 0V, V- = -5.0V VSS= -5.0V all controls unless otherwise specified)
● DC CHARACTERISTICS
PARAMETER
SYMBOL
TEST CONDITION
MIN.
-
TYP. MAX. UNIT
Operating Current1
ICC
IEE
V+, No Signal
V-, No Signal
V+, Power Save Mode
45
70
-
mA
mA
Operating Current2
Operating Current
at power save mode 1
Operating Current
at power save mode 2
-70
-45
Isave1
Isave2
-
1.0
4.0
-
mA
mA
V-, Power Save Mode
-4.0
-1.0
● AC CHARACTERISTICS
PARAMETER
Maximum Output
Voltage
SYMBOL
TEST CONDITION
MIN.
TYP. MAX. UNIT
VOM
Gv
Input sine signal voltage (100kHz), THD=1%
3.8
-
-
6.5
-
Vp-p
dB
Voltage Gain
Input sine signal (100kHz, 1.0Vp-p)
5.5
6.0
0.0
Frequency
Characteristic 1
Input sine signal (12MHz/100kHz, 1.0Vp-p)
V input terminal
Gf1
-3.0
dB
Frequency
Characteristic 2
Frequency
Input sine signal (100MHz/100kHz, 1.0Vp-p)
Y/PB/PR input terminal
Input sine signal (150MHz/100kHz, 100mVp-p)
Y/PB/PR input terminal
Gf2
Gf3
-
-
-3.0
-3.0
-
-
dB
dB
Characteristic 3
Cross Talk
between Input
terminals
CT
Input sine signal (3.58MHz, 1.0Vp-p)
-
-60
-50
dB
Differential Gain
DG
DP
Input Video signal (1.0Vp-p, 10step)
Input Video signal (1.0Vp-p, 10step)
-
-
0.5
0.5
-
-
%
Differential Phase
deg
Signal Detective
Voltage
Output/output
voltage difference
on mute mode
mVp-p
Vdet
dVDo
SNv
Input Square pulse (16kHz, 4.7µs)
On mute mode
-
-0.4
-
200
-
-
0.4
-
V
Input White Video signal (1.0Vp-p, 100%)
for V/Y/PB/PR input terminal
S/N ratio
75
dB
- 3 -
NJW1329
● AC CHARACTERISTICS
PARAMETER
Switch Change
Over Voltage
(H level)
Switch Change
Over Voltage
(L level)
Maximum inflow
current on Switch
ON
Maximum inflow
current on Switch
OFF
SYMBOL
TEST CONDITION
MIN.
TYP. MAX. UNIT
V+
1.0
120
8
VthH
VthL
IthH
IthL
2.0
-
-
-
-
V
V
0
-
V=3.3V
V=0.3V
uA
uA
-
POWER SAVE CONTROL
NJW1329 performs Power Save mode with PS terminal.
PS TERMINAL VOLTAGE
OPERATION
<VthL
>VthH
Power Save Mode, enable I2C control for Power Save
Normal Mode, disenable I2C control for Power Save
SIGNAL DETECTION
NJW1329 detects a signal that is larger than Signal Detective Voltage (SDV).
INPUT SIGNAL VOLTAGE
Vdet > VIN
LOS_OUT
CONDITION
H
L
Signal is smaller than SDV
Signal is larger than SDV
Vdet < VIN
NOTE) If you input a signal except for video signal with sync, there is the case that output of LOS_OUT
terminal is not stable.
- 4 -
NJW1329
TIMING on the I2C BUS (SDA, SCL)
SDA
tBUF
tr
tf
tr
tf
tHD:STA
tSP
tSU:DAT
SCL
tHD:STA
tSU:STA
tSU:STO
tLOW
tHIGH
tHD:DAT
S
S
Sr
P
CHARACTERISTICS OF I/O STAGES FOR I2C BUS (SDA, SCL)
I2C BUS Load Conditions
STANDARD MODE: Pull up resistance 4kΩ (Connected to V+), Load capacitance 200pF (Connected to GND)
HIGH-SPEED MODE: Pull up resistance 4kΩ (Connected to V+), Load capacitance 50pF (Connected to GND)
STANDARD MODE
HIGH-SPEED MODE
UNIT
PARAMETER
Low Level Input Voltage
SYMBOL
MIN. TYP. MAX. MIN. TYP. MAX.
VIL
VIH
VOL
0.0
0.7V+
0
-
-
-
0.3V+
5.5
0.0
0.7V+
0
-
-
-
0.3V+
5.5
V
V
V
High Level Input Voltage
Low Level Output Voltage (3mA at SDA pin)
0.4
Input current each I/O pin with an input voltage between 0.1V+
and 0.9V+
Ii
-10
-
10
-10
-
10
µA
- 5 -
NJW1329
CHARACTERISTICS OF BUS LINES (SDA, SCL) FOR I2C BUS DEVICES
STANDARD MODE
HIGH-SPEED MODE
PARAMETER
SYMBOL
UNIT
MIN. TYP. MAX. MIN. TYP. MAX.
SCL clock frequency
fSCL
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tr
-
4.0
4.7
4.0
4.7
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
100
-
0.6
1.3
0.6
0.6
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
400
kHz
µs
µs
µs
µs
µs
ns
ns
ns
µs
µs
pF
V
HOLD time
-
-
Low period of the SCL clock
High period of the SCL clock
Set-up time for a repeated START condition
Data Hold Time NOTE)
-
-
-
-
-
-
-
-
Data set-up Time
250
-
-
100
-
-
Rise time of both SDA and SCL signals
Fall time of both SDA and SCL signals
Set-up time for STOP condition
Bus free time between a STOP and START condition
Capacitive load for each bus line
Noise margin at the Low level
Noise margin at the High level
1000
300
tf
-
300
-
300
tSU:STO
tBUF
4.0
4.7
-
-
0.6
1.3
-
-
-
-
Cb
400
400
VnL
0.5
1
-
-
0.5
-
VnH
1
-
V
Cb ; total capacitance of one bus line in pF
NOTE) Data hold time: tHD:DAT
Please hold the Data Hold Time (tHD:DAT) to 300ns or more to avoid status of unstable at SCL falling edge.
- 6 -
NJW1329
DEFINTION OF I2C REGISTER
You can send and transmit address by I2C REGISTER with SDA input and SCL input.
• I2C BUS FORMAT
MSB
LSB
MSB
LSB
MSB
LSB
S
Slave Address
8bit
A
Select Address
8bit
A
Data
8bit
A
P
1bit
1bit
1bit
1bit 1bit
S: Starting term
A: Acknowledge bit
P: Ending term
• SLAVE ADDRESS
Slave Address
Hex
MSB
LSB
-
1
0
0
1
0
1
1
0
96(h)
NJW1329 is not suitable for read mode.
•CONTROL REGISTER TABLE
The auto increment function cycles the select address as follows.
00H → 01H → 00H
BIT
No.
D7
D6
D5
-
D4
-
D3
D2
-
D1
D0
-
Power
Save
00H
01H
VOUT1 Select
VOUT2 Select
YOUT/PBOUT/
PROUT Select
-
-
-
CONTROL REGISTER INITIAL VALUE
BIT
No.
D7
0
D6
0
D5
D4
0
D3
0
D2
0
D1
D0
0
00H
01H
0
0
0
0
0
0
0
0
0
0
- 7 -
NJW1329
INSTRUCTION CODE
a)
BIT
No.
D7
D6
D5
D4
D3
D2
D1
D0
-
Power
Save
00H
VOUT1 Select
VOUT2 Select
•VOUT1 SIGNAL SELECT TABLE
VOUT1 Select
VOUT1
D7
0
D6
0
D5
0
Mute*
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
*Default Value
•VOUT2 SIGNAL SELECT TABLE
VOUT2 Select
VOUT2
D4
0
D3
0
D2
0
Mute*
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
*Default Value
•POWER SAVE SELECT TABLE
Power Save
Power Save
D1
0
Power Save Mode*
Normal Mode
1
*Default Value
Please connect the PS terminal with GND when you control the Power Save with I2C.
- 8 -
NJW1329
INSTRUCTION CODE
b)
BIT
No.
D7
D6
D5
-
D4
-
D3
-
D2
-
D1
D0
-
YOUT/PBOUT/
PROUT Select
01H
-
•YOUT/PBOUT/PROUT SIGNAL SELECT TABLE
YOUT/PBOUT/
PROUT Select
YOUT
PBOUT
PROUT
D7
D6
0
0
0
1
1
Mute*
YIN1
YIN2
YIN3
Mute*
PBIN1
PBIN2
PBIN3
Mute*
PRIN1
PRIN2
PRIN3
1
0
1
*Default Value
- 9 -
NJW1329
APPLICATION NOTE
Please input the recommendation voltage on each power supply terminal.
When impressing the voltage of the recommendation outside, there is a possibility to destroying by latch up of the inner
device.
When not making IC move, please use a power save mode. Or please don't input the voltage on any power supply
terminals.
•Power supply sequence
When input V- (-5V) first, V+ (3.3V) power supply terminal will be the negative voltage. There is a possibility that a
regulator of V+ power supply doesn't move in that case.
When V-power supply is impressed at the state that a regulator of V+ power supply doesn't move, an excessive electric
current flows to IC. And the worst in case of is destroyed.
Please input V+ power supply and V- power supply at the same time. Or please input V+ power supply first.
Please turn off V-power supply first at the time at power supply off. Or please turn off V+ power supply and V- power
supply at the same time.
After the inner reset pulse stood up in High from Low, please do the timing to which IIC is sent. (Figure 1 referring)
The inner reset pulse is when V- terminal was about-2.5V in ambient temperature at time to stand up in High from Low.
Therefore time of the reset pulse is proportional to the rising rate of the V- power supply.
The above fluctuates by variability of the temperature and variability of a device.
Therefore please send IIC after it'll be by V- power supply less than –3.0 V.
Power Supply
V+ = 3.3V
GND,VDD = 0V
Inner reset pulse: Reset at Low period
IIC receive
V- = -5V
Time
(Figure 1)
- 10 -
NJW1329
TERMINAL DESCRIPTION
No.
SYMBOL
FUNCTION
EQUIVALENT CIRCUIT
VOLATGE
Input for CVBS
46
45
44
43
42
41
40
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
0V
V+
180Ω
25kΩ
500Ω
250Ω
V-
Input for
16
17
18
20
21
22
24
25
26
YIN1
YIN2
YIN3
PBIN1
PBIN2
PBIN3
PRIN1
PRIN2
PRIN3
0V
V+
component video
200Ω
25kΩ
720Ω
200Ω
V-
- 11 -
NJW1329
No.
47
SYMBOL
FUNCTION
EQUIVALENT CIRCUIT
VOLATGE
Bias voltage for
CVBS
V+
BIASV1
0V
180Ω
25kΩ
500Ω
250Ω
V-
V+
Bias voltage for
15
19
20
BIASY1
BIASPB1
BIASPR1
0V
component vided
200Ω
25kΩ
720Ω
200Ω
V-
- 12 -
NJW1329
No.
SYMBOL
FUNCTION
EQUIVALENT CIRCUIT
VOLATGE
Positive power
supply
13
34
39
48
V+
3.3V
Negative power
supply
7
V-
-5V
14
27
35
49
Ground
5
2
GND
VDD
0V
0V
Power supply for
logical circuit
I2C Clock Input
V+
3
SCL
-
4kΩ
GND
V-
I2C Data Input
V+
4
SDA
-
4kΩ
GND
V-
- 13 -
NJW1329
No.
11
SYMBOL
FUNCTION
EQUIVALENT CIRCUIT
VOLATGE
V+
Power Save
PS
0V
VDD
80kΩ
80kΩ
80kΩ
80kΩ
50kΩ
50kΩ
GND
V-
V+
Y Output
33
YOUT
0V
For 75Ω Drive
850Ω
800Ω
V-
Pb Output
Pr Output
31
29
PBOUT
PROUT
0V
V+
For 75Ω Drive
8Ω
850Ω
800Ω
8Ω
V-
V Output
38
36
VOUT1
VOUT2
0V
V+
For 75Ω Drive
2.4kΩ
2.4kΩ
V-
- 14 -
NJW1329
No.
SYMBOL
FUNCTION
EQUIVALENT CIRCUIT
VOLATGE
V+
Bias voltage for
32
30
28
BIASY2
BIASPB2
BIASPR2
0V
component video
850Ω
800Ω
V-
V+
Bias voltage for
CVBS
37
BIASV2
0V
2.4kΩ
2.4kΩ
V-
V+
VLOS Output
YLOS Output
1
6
VLOSOUT
YLOSOUT
-
1kΩ
4kΩ
8kΩ
GND
V-
V LOS
Detect Filter
Y LOS
V+
8
52
YLOS
VLOS
-
1kΩ
1kΩ
Detect Filter
250Ω
250Ω
V-
- 15 -
NJW1329
No.
SYMBOL
FUNCTION
EQUIVALENT CIRCUIT
VOLATGE
V+
Y Input for LOS
9
51
YIN_LOS
VIN_LOS
1.4V
V Input for LOS
250Ω
700Ω
V-
V+
Y output for LOS
V output for LOS
YOUT_LOS
VOUT_LOS
10
50
0V
25Ω
400Ω
25Ω
V-
- 16 -
NJW1329
TEST CIRCUIT
V- V+
+
+
+
+
39
38
37
36
35
34
33
32
31
30
29
28
27
75Ω
10uF
+
50Ω
50Ω
75Ω
40
41
42
43
44
45
46
47
48
49
50
51
52
26
25
24
23
22
21
20
19
18
17
16
15
14
VIN7
VIN6
VIN5
VIN4
VIN3
VIN2
VIN1
PRIN3
PRIN2
PRIN1
+
10uF
10uF
+
50Ω
75Ω
50Ω
50Ω
75Ω
+
10uF
10uF
+
75Ω
50Ω
50Ω
75Ω
+
10uF
75Ω
50Ω
BIASPR1
PBIN3
+
10uF
10uF
+
75Ω
50Ω
50Ω
75Ω
+
10uF
10uF
+
75Ω
50Ω
50Ω
75Ω
PBIN2
+
10uF
10uF
+
75Ω
50Ω
PBIN1
+
10uF
75Ω
BIASV1
V+
BIASPB1
YIN3
75Ω
10uF
+
50Ω
75Ω
47uF+
+
0.1uF
10uF
+
50Ω
75Ω
V-
YIN2
YIN1
10uF
47uF
0.1uF
0.1uF
+
50Ω
VOUT_LOS
VIN_LOS
VLOS
+
BIASY1
V-
0.1uF
50kΩ
0.1uF
+
47uF
1
2
3
4
5
6
7
8
9
10
11
12
13
+
0.1uF
+
5V
5V
- 17 -
NJW1329
APPLICATION CIRCUIT
V- V+
+
+
+
+
39
38
37
36
35
34
33
32
31
30
29
28
27
75Ω
75Ω
75Ω
10uF
+
40
41
42
43
44
45
46
47
48
49
50
51
52
26
25
24
23
22
21
20
19
18
17
16
15
14
VIN7
VIN6
VIN5
VIN4
VIN3
VIN2
VIN1
PRIN3
PRIN2
PRIN1
+
10uF
10uF
75Ω
75Ω
75Ω
75Ω
75Ω
75Ω
75Ω
+
+
10uF
10uF
+
+
10uF
BIASPR1
PBIN3
+
75Ω
75Ω
75Ω
10uF
10uF
+
+
10uF
10uF
+
PBIN2
+
10uF
10uF
+
PBIN1
+
10uF
BIASV1
V+
BIASPB1
YIN3
75Ω
75Ω
75Ω
10uF
+
47uF+
+
0.1uF
10uF
+
V-
YIN2
YIN1
10uF
47uF
0.1uF
0.1uF
+
VOUT_LOS
VIN_LOS
VLOS
+
BIASY1
V-
0.1uF
50kΩ
0.1uF
+
47uF
1
2
3
4
5
6
7
8
9
10
11
12
13
+
0.1uF
+
5V
5V
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
- 18 -
相关型号：
NJW1351WE4
Video Amplifier, 1 Channel(s), 1 Func, BICMOS, PBGA9, 1.4 X 1.5 MM, 0.45 MM PITCH, WPCSP-9
NJRC
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