LM4954 [NSC]
HIgh Voltage 3 Watt Audio Power Amplifier; 高压3瓦音频功率放大器
| 型号： | LM4954 |
| 厂家： | 
National Semiconductor |
| 描述： | HIgh Voltage 3 Watt Audio Power Amplifier |
| 文件： | 总16页 (文件大小：972K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
June 2005
LM4954
High Voltage 3 Watt Audio Power Amplifier
General Description
Key Specifications
The LM4954 is an audio power amplifier primarily designed
for demanding applications in mobile phones and other por-
table communication device applications. It is capable of
delivering 2.4 Watts of continuous average power to an 8Ω
BTL load with less than 1% THD+N from a 7VDC power
supply.
j
Wide Power Supply
Voltage Range
2.7 ≤ VDD ≤ 9V
2.4W (typ)
j
j
j
j
Output Power: VDD = 7V, 1% THD+N
Quiescent power supply current
PSRR: VDD = 5V and 3V at 217Hz
Shutdown power supply current
3mA (typ)
80dB (typ)
Boomer audio power amplifiers are designed specifically to
provide high quality output power with a minimal number of
external components. The LM4954 does not require output
coupling capacitors or bootstrap capacitors, and therefore is
ideally suited for lower-power portable applications where
minimal space and power consumption are primary require-
ments.
0.01µA (typ)
Features
n No output coupling capacitors, snubber networks or
bootstrap capacitors required
n Unity gain stable
n Externally configurable gain
n Ultra low current active low shutdown mode
n BTL output can drive capacitive loads up to 100pF
n “Click and pop” suppression circuitry
n 2.7V - 9.0V operation
The LM4954 features a low-power consumption global shut-
down mode which is achieved by driving the shutdown pin
with logic low. Additionally, the LM4954 features an internal
thermal shutdown protection mechanism.
The LM4954 contains advanced pop & click circuitry which
eliminates noises that would otherwise occur during turn-on
and turn-off transitions.
n Available in space-saving microSMD package
The LM4954 is unity-gain stable and can be configured by
external gain-setting resistors.
Applications
n Mobile Phones
n PDAs
Typical Application
20129111
FIGURE 1. Typical Audio Amplifier Application Circuit
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2005 National Semiconductor Corporation
DS201291
www.national.com
Connection Diagrams
9 Bump micro SMD
9 Bump micro SMD Marking
20129191
Top View
X - Date Code
T - Die Traceability
G - Boomer Family
F2 - LM4954TL
20129186
Top View
Order Number LM4954TL, LM4954TLX
See NS package Number TLA0911A
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2
Absolute Maximum Ratings (Notes 1, 2)
Thermal Resistance
θJA (microSMD) (Note 10)
Soldering Information
180˚C/W
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
See AN-112 “microSMD Wafers
Level Chip Scale Package.”
Supply Voltage (Note 1)
Storage Temperature
Input Voltage
9.5V
−65˚C to +150˚C
−0.3V to VDD +0.3V
Internally Limited
2000V
Operating Ratings (Notes 1, 2)
Temperature Range
Power Dissipation (Note 3)
ESD Susceptibility (Note 4)
ESD Susceptibility (Note 5)
Junction Temperature
TMIN ≤ TA ≤ TMAX
−40˚C ≤ TA ≤ 85˚C
2.7V ≤ VDD ≤ 9V
200V
Supply Voltage
150˚C
Electrical Characteristics VDD = 7V (Notes 1, 2)
The following specifications apply for VDD = 7V, AV-BTL = 6dB, and RL = 8Ω unless otherwise specified. Limits apply for TA
=
25˚C.
LM4954
Typical
Units
(Limits)
Symbol
Parameter
Conditions
Limit
(Note 6)
3
(Notes 7, 8)
IDD
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, RL = 8Ω BTL
5
1
mA (max)
µA (max)
mV (max)
W (min)
W
ISD
VSD = GND (Note 9)
0.01
10
VOS
Output Offset Voltage
25
2.2
THD+N = 1% (max); f = 1kHz
THD+N = 10% (max); f = 1kHz
PO = 1Wrms; f = 1kHz
AV-BTL = 6dB
2.4
Po
Output Power (Note 11)
3.0
0.1
0.4
%
%
THD+N
Total Harmonic Distortion + Noise
PO = 1Wrms; f = 1kHz
AV-BTL = 26dB
VRipple = 200mVsine p-p,
CB = 2.2µF, Input terminated
with 10Ω to GND
fRipple = 217Hz, Input Referred
VRipple = 200mVsine p-p,
CB = 2.2µF, Input terminated
with 10Ω to ground
71
71
54
55
dB (min)
dB (min)
PSRR
Power Supply Rejection Ratio
fRipple = 1kHz, Input Referred
VSDIH
VSDIL
TWU
Shutdown High Input Voltage
Shutdown Low Input Voltage
Wake-up Time
1.2
0.4
V (min)
V (max)
ms
CB = 2.2µF
130
20
A-Wtg, AV-BTL = 6dB
Input terminated with 10Ω to GND,
Output Referred
µVRMS
∈
Output Noise
OUT
A-Wtg, AV-BTL = 26dB
Input terminated with 10Ω to GND,
Output Referred
100
75
µVRMS
RPD
Pull Down Resistor on Shutdown
kΩ
3
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Electrical Characteristics VDD = 5V (Notes 1, 2)
The following specifications apply for VDD = 5V, AV-BTL = 6dB, and RL = 8Ω unless otherwise specified. Limits apply for TA
=
25˚C.
LM4954
Units
(Limits)
Symbol
IDD
Parameter
Conditions
Typical
(Note 6)
2.7
Limit
(Notes 7, 8)
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, RL = 8Ω BTL
5
1
mA (max)
µA (max)
mV (max)
W (min)
%
ISD
VSD = GND (Note 9)
0.01
8
VOS
Po
Output Offset Voltage
25
1.1
Output Power
THD+N = 1% (max); f = 1kHz
PO = 600mWrms; f = 1kHz
Vripple = 200mVsine p-p,
CB = 2.2µF, Input terminated
with 10Ω to GND
fRipple = 217Hz, Input Referred
Vripple = 200mVsine p-p,
CB = 2.2µF, Input terminated
with 10Ω to GND
1.2
THD+N
Total Harmonic Distortion + Noise
0.1
80
80
63
dB (min)
dB
PSRR
Power Supply Rejection Ratio
fRipple = 1kHz, Input Referred
VSDIH
VSDIL
TWU
Shutdown High Input Voltage
Shutdown Low Input Voltage
Wake-up Time
1.2
0.4
V (min)
V (max)
ms
CB = 2.2µF
130
20
A-Wtg, Input terminated with 10Ω
to GND,
∈
Output Noise
µVRMS
OUT
Output referred
RPD
Pul Down Resistor on Shutdown
75
kΩ
Electrical Characteristics VDD = 3V (Notes 1, 2)
The following specifications apply for VDD = 3V, AV-BTL = 6dB, and RL = 8Ω unless otherwise specified. Limits apply for TA
=
25˚C.
LM4954
Units
(Limits)
Symbol
IDD
Parameter
Conditions
Typical
(Note 6)
2.5
Limit
(Notes 7, 8)
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, RL = 8Ω BTL
5
1
mA (max)
µA (max)
mV (max)
mW (min)
%
ISD
VSD = GND (Note 9)
0.01
5
VOS
Po
Output Offset Voltage
25
360
Output Power
THD+N = 1% (max); f = 1kHz
Po = 100mWrms; f = 1kHz
Vripple = 200mVsine p-p,
CB = 2.2µF, Input teiminated
with 10Ω to GND,
fRipple = 217Hz, Input referred
Vripple = 200mVsine p-p,
CB = 2.2µF, Input teiminated
with 10Ω to GND,
380
THD+N
Total Harmonic Distortion + Noise
0.18
80
80
63
dB (min)
dB
PSRR
Power Supply Rejection Ratio
fRipple = 1kHz, Input referred
VSDIH
VSDIL
TWU
Shutdown High Input Voltage
Shutdown Low Input Voltage
Wake-Up Time
1.2
0.4
V (min)
V (max)
ms
CB = 2.2µF
130
20
A-Wtg, Input terminated with 10Ω
to GND,
∈
Output Noise
µVRMS
OUT
Output referred
RPD
Pull Down Resistor on Shutdown
75
kΩ
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4
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
, θ , and the ambient temperature T . The maximum
A
JMAX JA
allowable power dissipation is P
= (T
– T ) / θ or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4954, see power
DMAX
JMAX A JA
derating curves for additional information.
Note 4: Human body model, 100pF discharged through a 1.5kΩ resistor.
Note 5: Machine Model, 220pF – 240pF discharged through all pins.
Note 6: Typical specifications are specified at 25˚C and represent the parametric norm.
Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 9: Shutdown current is measured in a normal room environment. Exposure to direct sunlight in the TL package will increase I by a minimum of 2µA.
SD
Note 10: All bumps have the same thermal resistance and contribute equally when used to lower thermal resistance. The θ in the Thermal Resistance section
JA
is for the ITL package without any heat spreading planes on the PCB.
2
2
Note 11: The demo board shown has 1.1in (710mm ) heat spreading planes on the two internal layers and the bottom layer. The bottom internal layer is electrically
while the top internal and bottom layers are electrically GND. Thermal performance for the demo board is found on the Power Derating graph in the Typical
V
DD
Performance Characteristics section. 7V operation requires heat spreading planes for the thermal stability.
External Components Description
(Figure 1)
Components
Functional Description
1.
Ri
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a
high pass filter with Ci at fC = 1/(2π RiCi).
2.
Ci
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a
highpass filter with Ri at fc = 1/(2π RiCi). Refer to the section, Proper Selection of External Components,
for an explanation of how to determine the value of Ci.
3.
4.
Rf
Feedback resistance which sets the closed-loop gain in conjunction with Ri. AVD = 2 * (Rf/Ri).
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing
section for information concerning proper placement and selection of the supply bypass capacitor.
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB.
CS
5.
CB
5
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Typical Performance Characteristics
THD+N vs Output Power
VDD = 7V, RL = 8Ω, AV = 6dB,
f = 1kHz, 80kHz BW
THD+N vs Frequency
VDD = 7V, RL = 8Ω, AV = 6dB,
POUT = 600mW, 80kHz BW
20129163
20129134
20129135
20129132
THD+N vs Output Power
VDD = 7V, RL = 8Ω, AV = 26dB,
f = 1kHz, 80kHz BW
THD+N vs Frequency
VDD = 7V, RL = 8Ω, AV = 26dB,
POUT = 600mW, 80kHz BW
20129164
THD+N vs Output Power
VDD = 5V, RL = 4Ω, AV = 6dB,
f = 1kHz, 80kHz BW
THD+N vs Frequency
VDD = 5V, RL = 4Ω, AV = 6dB,
POUT = 100mW, 80kHz BW
20129155
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Typical Performance Characteristics (Continued)
THD+N vs Output Power
VDD = 5V, RL = 8Ω, AV = 6dB,
f = 1kHz, 80kHz BW
THD+N vs Frequency
VDD = 5V, RL = 8Ω, AV = 6dB,
POUT = 100mW, 80kHz BW
20129162
20129133
20129130
20129131
THD+N vs Output Power
VDD = 3V, RL = 4Ω, AV = 6dB,
f = 1kHz, 80kHz BW
THD+N vs Frequency
VDD = 3V, RL = 4Ω, AV = 6dB,
POUT = 100mW, 80kHz BW
20129136
THD+N vs Output Power
VDD = 3V, RL = 8Ω, AV = 6dB,
f = 1kHz, 80kHz BW
THD+N vs Frequency
VDD = 3V, RL = 8Ω, AV = 6dB,
POUT = 100mW, 80kHz BW
20129153
7
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Typical Performance Characteristics (Continued)
THD+N vs Differential Gain
VDD = 7V, RL = 8Ω,
POUT = 600mW, 80kHz BW
PSRR vs Frequency
VDD = 7V, VRIPPLE = 200mVP-P
Input Terminated, 80kHz BW
20129171
20129128
PSRR vs Frequency
PSRR vs Frequency
VDD = 5V, VRIPPLE = 200mVP-P
Input Terminated, 80kHz BW
VDD = 3V, VRIPPLE = 200mVP-P
Input Terminated, 80kHz BW
20129127
20129126
Output Power vs Supply Voltage
Output Power vs Supply Voltage
RL = 4Ω, AV = 6dB, 80kHz BW
RL = 8Ω, AV = 6dB, 80kHz BW
20129124
20129125
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Typical Performance Characteristics (Continued)
Power Dissipation vs Output Power
VDD = 7V, AV = 6dB,
Power Dissipation vs Output Power
VDD = 5V, AV = 6dB,
THD+N ≤ 1%, 80kHz BW
THD+N ≤ 1%, 80kHz BW
20129123
20129120
Power Dissipation vs Output Power
VDD = 3V, AV = 6dB,
Power Derating – 9 bump µSMD
PDMAX = 1.26W, VDD = 7V,
RL = 8Ω (Notes 10, 11)
THD+N ≤ 1%, 80kHz BW
20129112
20129192
Shutdown Threshold vs Supply Voltage
Supply Current vs Supply Voltage
RL = 8Ω, AV = 6dB, 80kHz BW
RL = 8Ω
20129169
20129129
9
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duced supply voltage, higher load impedance, or reduced
ambient temperature. Internal power dissipation is a function
of output power. Refer to the Typical Performance Charac-
teristics curves for power dissipation information for differ-
ent output powers and output loading.
Application Information
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4954 has two operational
amplifiers internally, allowing for a few different amplifier
configurations. The first amplifier’s gain is externally config-
urable, while the second amplifier is internally fixed in a
unity-gain, inverting configuration. The closed-loop gain of
the first amplifier is set by selecting the ratio of Rf to Ri while
the second amplifier’s gain is fixed by the two internal 20kΩ
resistors. Figure 1 shows that the output of amplifier one
serves as the input to amplifier two which results in both
amplifiers producing signals identical in magnitude, but out
of phase by 180˚. Consequently, the differential gain for the
IC is
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for
low noise performance and high power supply rejection. The
capacitor location on both the bypass and power supply pins
should be as close to the device as possible. Typical appli-
cations employ a 5V regulator with 10µF tantalum or elec-
trolytic capacitor and a ceramic bypass capacitor which aid
in supply stability. This does not eliminate the need for
bypassing the supply nodes of the LM4954. The selection of
a bypass capacitor, especially CB, is dependent upon PSRR
requirements, click and pop performance (as explained in
the section, Proper Selection of External Components),
system cost, and size constraints.
AVD = 2 *(Rf/Ri)
By driving the load differentially through outputs Vo1 and
Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is
different from the classical single-ended amplifier configura-
tion where one side of the load is connected to ground.
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the
LM4954 contains a shutdown pin to externally turn off the
amplifier’s bias circuitry. This shutdown feature turns the
amplifier off when a logic low is placed on the shutdown pin.
By switching the shutdown pin to ground, the LM4954 supply
current draw will be minimized in idle mode. While the device
will be disabled with shutdown pin voltages less than
0.4VDC, the idle current may be greater than the typical
value of 0.01µA. (Idle current is measured with the shutdown
pin tied to ground). The LM4954 has an internal 75kΩ pull-
down resistor. If the shutdown pin is left floating the IC will
automatically enter shutdown mode.
A bridge amplifier design has a few distinct advantages over
the single-ended configuration, as it provides differential
drive to the load, thus doubling output swing for a specified
supply voltage. Four times the output power is possible as
compared to a single-ended amplifier under the same con-
ditions. This increase in attainable output power assumes
that the amplifier is not current limited or clipped. In order to
choose an amplifier’s closed-loop gain without causing ex-
cessive clipping, please refer to the Audio Power Amplifier
Design section.
A bridge configuration, such as the one used in LM4954,
also creates a second advantage over single-ended amplifi-
ers. Since the differential outputs, Vo1 and Vo2, are biased
at half-supply, no net DC voltage exists across the load. This
eliminates the need for an output coupling capacitor which is
required in a single supply, single-ended amplifier configura-
tion. Without an output coupling capacitor, the half-supply
bias across the load would result in both increased internal
IC power dissipation and also possible loudspeaker damage.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications us-
ing integrated power amplifiers is critical to optimize device
and system performance. While the LM4954 is tolerant of
external component combinations, consideration to compo-
nent values must be used to maximize overall system qual-
ity.
The LM4954 is unity-gain stable which gives the designer
maximum system flexibility. The LM4954 should be used in
low gain configurations to minimize THD+N values, and
maximize the signal to noise ratio. Low gain configurations
require large input signals to obtain a given output power.
Input signals equal to or greater than 1 Vrms are available
from sources such as audio codecs. Please refer to the
section, Audio Power Amplifier Design, for a more com-
plete explanation of proper gain selection.
POWER DISSIPATION
Power dissipation is a major concern when designing a
successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power
delivered to the load by a bridge amplifier is an increase in
internal power dissipation. Since the LM4954 has two opera-
tional amplifiers in one package, the maximum internal
power dissipation is four times that of a single-ended ampli-
fier. The maximum power dissipation for a given application
can be derived from the power dissipation graphs or from
Equation 1.
Besides gain, one of the major considerations is the closed-
loop bandwidth of the amplifier. To a large extent, the band-
width is dictated by the choice of external components
shown in Figure 1. The input coupling capacitor, Ci, forms a
first order high pass filter which limits low frequency re-
sponse. This value should be chosen based on needed
frequency response for a few distinct reasons.
PDMAX = 4*(VDD)2/(2π2RL)
It is critical that the maximum junction temperature (TJMAX
(1)
)
of 150˚C is not exceeded. TJMAX can be determined from the
power derating curves by using PDMAX and the PC board foil
area. By adding additional copper foil, the thermal resistance
of the application can be reduced from the free air value,
resulting in higher PDMAX. Additional copper foil can be
added to any of the leads connected to the LM4954. It is
especially effective when connected to VDD, GND, and the
output pins. Refer to the application information on the
LM4954 reference design board for an example of good heat
sinking. If TJMAX still exceeds 150˚C, then additional
changes must be made. These changes can include re-
Selection Of Input Capacitor Size
Large input capacitors are both expensive and space hungry
for portable designs. Clearly, a certain sized capacitor is
needed to couple in low frequencies without severe attenu-
ation. But in many cases the speakers used in portable
systems, whether internal or external, have little ability to
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10
AUDIO POWER AMPLIFIER DESIGN
Application Information (Continued)
reproduce signals below 100Hz to 150Hz. Thus, using a
large input capacitor may not increase actual system perfor-
mance.
A designer must first determine the minimum supply rail to
obtain the specified output power. By extrapolating from the
Output Power vs Supply Voltage graphs in the Typical Per-
formance Characteristics section, the supply rail can be
easily found.
In addition to system cost and size, click and pop perfor-
mance is affected by the size of the input coupling capacitor,
Ci. A larger input coupling capacitor requires more charge to
reach its quiescent DC voltage (nominally 1/2VDD). This
charge comes from the output via the feedback and is apt to
create pops upon device enable. Thus, by minimizing the
capacitor size based on necessary low frequency response,
turn-on pops can be minimized.
At this time, the designer must make sure that the power
supply choice along with the output impedance does not
violate the conditions explained in the Power Dissipation
section.
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equa-
tion 2.
Besides minimizing the input capacitor size, careful consid-
eration should be paid to the bypass capacitor value. Choos-
ing CB equal to 2.2µF along with a small value of Ci (in the
range of 0.1µF to 0.39µF), should produce a virtually click-
less and popless shutdown function. While the device will
function properly, (no oscillations or motorboating), with CB
equal to 0.1µF.
(2)
AVD = (Rf/Ri) 2
20129108
FIGURE 2. HIGHER GAIN AUDIO AMPLIFIER
taken when calculating the -3dB frequency in that an incor-
rect combination of RF and CF will cause rolloff before
20kHz. A typical combination of feedback resistor and ca-
pacitor that will not produce audio band high frequency rolloff
is RF = 20kΩ and CF = 25pf. These components result in a
-3dB point of approximately 320 kHz. To calculate the value
of the capacitor for a given -3dB point, use Equation 3 below:
The LM4954 is unity-gain stable and requires no external
components besides gain-setting resistors, an input coupling
capacitor, and proper supply bypassing in the typical appli-
cation. However, if a closed-loop differential gain of greater
than 10 is required, a feedback capacitor (CF) may be
needed as shown in Figure 2 to bandwidth limit the amplifier.
This feedback capacitor creates a low pass filter that elimi-
nates possible high frequency oscillations. Care should be
CF = 1/(2πf3dBRF) (F)
(3)
11
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Application Information (Continued)
20129109
FIGURE 3. DIFFERENTIAL AMPLIFIER CONFIGURATION FOR LM4954
20129110
FIGURE 4. REFERENCE DESIGN BOARD SCHEMATIC
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Application Information (Continued)
LM4954 micro SMD BOARD ARTWORK (Note 10)
Composite View
Silk Screen
Internal Layer 1, GND
Bottom Layer
20129115
20129118
20129116
20129114
Top Layer
20129119
Internal Layer 2, VDD
20129117
13
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Application Information (Continued)
TABLE 1. Mono LM4954 Reference Design Boards Bill of Materials
Designator
Value
20kΩ
Tolerance
1%
Part Description
Comment
Ri
RF
Ci
1/10W, 1% 0805 Resistor
1/10W, 1% 0805 Resistor
Ceramic 1206 Capacitor, 10%
20kΩ
1%
0.39µF
10%
CF
CS
CB
Part not used
2.2µF
2.2µF
10%
10%
16V Tantalum 1210 Capacitor
16V Tantalum 1210 Capacitor
0.100” 1x2 header, vertical
mount
Input, Output,
Vdd/GND
J1, J3, J4
J2
0.100” 1x3 header, vertical
mount
Shutdown control
PCB LAYOUT GUIDELINES
Single-Point Power / Ground Connections
This section provides practical guidelines for mixed signal
PCB layout that involves various digital/analog power and
ground traces. Designers should note that these are only
"rule-of-thumb" recommendations and the actual results will
depend heavily on the final layout.
The analog power traces should be connected to the digital
traces through a single point (link). A "Pi-filter" can be helpful
in minimizing high frequency noise coupling between the
analog and digital sections. It is further recommended to put
digital and analog power traces over the corresponding digi-
tal and analog ground traces to minimize noise coupling.
GENERAL MIXED SIGNAL LAYOUT
RECOMMENDATIONS
Placement of Digital and Analog Components
All digital components and high-speed digital signals traces
should be located as far away as possible from analog
components and circuit traces.
Power and Ground Circuits
For a two layer mixed signal design, it is important to isolate
the digital power and ground trace paths from the analog
power and ground trace paths. Star trace routing techniques
(bringing individual traces back to a central point rather than
daisy chaining traces together in a serial manner) can have
a major impact on low level signal performance. Star trace
routing refers to using individual traces to feed power and
ground to each circuit or even device. This technique re-
quires a greater amount of design time but will not increase
the final price of the board. The only extra parts required may
be some jumpers.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces
parallel to each other (side-by-side) on the same PCB layer.
When traces must cross over each other do it at 90 degrees.
Running digital and analog traces at 90 degrees to each
other from the top to the bottom side as much as possible will
minimize capacitive noise coupling and cross talk.
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Revision History
Rev
Date
Description
Added curves 71 and 72. Edited Note 10. Changed
Av = 26dB to 6dB under 7V EC table. Edited
SHUTDOWN FUNCTION under the Application
section.
1.1
4/29/05
1.2
1.3
6/08/05
6/15/05
Removed all the LLP pkg references. Changed
TLA09XXX into TLA0911A. Changed X1 and X2
measurements.
Fixed some typos.
Initial WEB release.
1.4
1.5
6/20/05
6/22/05
Replaced curve 20129170 with 20129192.
Split Note 10 and added Note 11. Re-released to the
WEB.
15
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Physical Dimensions inches (millimeters) unless otherwise noted
9-Bump micro SMD
Order Number LM4954TL, LM4954TLX
NS Package Number TLA0911A
X1 = 1.488 0.03 X2 = 1.488 0.03 X3 = 0.60 0.075
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