LMC6482IMWA [NSC]
DUAL OP-AMP, 3000uV OFFSET-MAX, 1.5MHz BAND WIDTH, UUC, WAFER;
| 型号： | LMC6482IMWA |
| 厂家： | 
National Semiconductor |
| 描述： | DUAL OP-AMP, 3000uV OFFSET-MAX, 1.5MHz BAND WIDTH, UUC, WAFER 放大器 |
| 文件： | 总26页 (文件大小：1527K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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September 2003
LMC6482
CMOS Dual Rail-To-Rail Input and Output Operational
Amplifier
General Description
Features
The LMC6482 provides a common-mode range that extends
to both supply rails. This rail-to-rail performance combined
with excellent accuracy, due to a high CMRR, makes it
unique among rail-to-rail input amplifiers.
(Typical unless otherwise noted)
n Rail-to-Rail Input Common-Mode Voltage Range
(Guaranteed Over Temperature)
n Rail-to-Rail Output Swing (within 20mV of supply rail,
100kΩ load)
n Guaranteed 3V, 5V and 15V Performance
n Excellent CMRR and PSRR: 82dB
n Ultra Low Input Current: 20fA
It is ideal for systems, such as data acquisition, that require
a large input signal range. The LMC6482 is also an excellent
upgrade for circuits using limited common-mode range am-
plifiers such as the TLC272 and TLC277.
Maximum dynamic signal range is assured in low voltage
and single supply systems by the LMC6482’s rail-to-rail out-
put swing. The LMC6482’s rail-to-rail output swing is guar-
anteed for loads down to 600Ω.
n High Voltage Gain (RL = 500kΩ): 130dB
n Specified for 2kΩ and 600Ω loads
n Available in MSOP Package
Guaranteed low voltage characteristics and low power dis-
sipation make the LMC6482 especially well-suited for
battery-operated systems.
Applications
n Data Acquisition Systems
n Transducer Amplifiers
n Hand-held Analytic Instruments
n Medical Instrumentation
n Active Filter, Peak Detector, Sample and Hold, pH
Meter, Current Source
LMC6482 is also available in MSOP package which is al-
most half the size of a SO-8 device.
See the LMC6484 data sheet for a Quad CMOS operational
amplifier with these same features.
n Improved Replacement for TLC272, TLC277
3V Single Supply Buffer Circuit
Rail-To-Rail Input
Rail-To-Rail Output
01171303
01171301
01171302
Connection Diagram
01171304
© 2004 National Semiconductor Corporation
DS011713
www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Junction Temperature (Note 4)
150˚C
Operating Ratings (Note 1)
Supply Voltage
3.0V ≤ V+ ≤ 15.5V
ESD Tolerance (Note 2)
Differential Input Voltage
Voltage at Input/Output Pin
Supply Voltage (V+ − V−)
Current at Input Pin (Note 12)
Current at Output Pin
(Notes 3, 8)
1.5kV
Supply Voltage
(V+) +0.3V, (V−) −0.3V
16V
Junction Temperature Range
LMC6482AM
−55˚C ≤ TJ ≤
+125˚C
LMC6482AI, LMC6482I
−40˚C ≤ TJ ≤ +85˚C
5mA
Thermal Resistance (θJA
)
N Package, 8-Pin Molded DIP
M Package, 8-Pin Surface
90˚C/W
30mA
40mA
Current at Power Supply Pin
Lead Temperature
Mount
MSOP package, 8-Pin Mini SO
155˚C/W
194˚C/W
(Soldering, 10 sec.)
260˚C
Storage Temperature Range
−65˚C to +150˚C
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2 and RL 1M. Boldface
>
limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Typ
LMC6482AI LMC6482I LMC6482M Units
(Note 5)
Limit
(Note 6)
0.750
Limit
(Note 6)
3.0
Limit
(Note 6)
3.0
VOS
Input Offset Voltage
0.11
1.0
mV
max
1.35
3.7
3.8
TCVOS Input Offset Voltage
Average Drift
µV/˚C
IB
Input Current
(Note 13)
0.02
0.01
3
4.0
2.0
4.0
2.0
10.0
5.0
pA
max
pA
IOS
CIN
RIN
Input Offset Current
(Note 13)
max
pF
Common-Mode
Input Capacitance
Input Resistance
>
10
TeraΩ
dB
CMRR Common Mode
Rejection Ratio
0V ≤ VCM ≤ 15.0V
V+ = 15V
82
70
67
65
62
65
60
min
0V ≤ VCM ≤ 5.0V
V+ = 5V
5V ≤ V+ ≤ 15V, V− = 0V
82
82
70
65
65
67
62
60
+PSRR Positive Power Supply
Rejection Ratio
70
65
65
dB
min
dB
VO = 2.5V
67
62
60
−PSRR Negative Power Supply
Rejection Ratio
−5V ≤ V− ≤ −15V, V+ = 0V
VO = −2.5V
V+ = 5V and 15V
82
70
65
65
67
62
60
min
V
VCM
Input Common-Mode
Voltage Range
V− − 0.3
V+ + 0.3V
666
− 0.25
− 0.25
− 0.25
For CMRR ≥ 50dB
0
0
0
max
V
V+ + 0.25
V+
V+ + 0.25
V+
V+ + 0.25
V+
min
V/mV
min
V/mV
min
V/mV
min
V/mV
AV
Large Signal
Voltage Gain
RL = 2kΩ
Sourcing
Sinking
140
84
120
72
120
60
(Notes 7, 13)
75
35
35
35
20
20
18
RL = 600Ω
Sourcing
Sinking
300
80
50
50
(Notes 7, 13)
48
30
25
35
20
15
15
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2
DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2 and RL 1M. Boldface
>
limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Typ
LMC6482AI LMC6482I LMC6482M Units
(Note 5)
Limit
(Note 6)
13
Limit
(Note 6)
10
Limit
(Note 6)
8
min
V
VO
Output Swing
V+ = 5V
RL = 2kΩ to V+/2
4.9
0.1
4.7
0.3
14.7
0.16
14.1
0.5
20
4.8
4.8
4.8
4.7
4.7
4.7
min
V
0.18
0.24
4.5
0.18
0.24
4.5
0.18
0.24
4.5
max
V
V+ = 5V
RL = 600Ω to V+/2
4.24
0.5
4.24
0.5
4.24
0.5
min
V
0.65
14.4
14.2
0.32
0.45
13.4
13.0
1.0
0.65
14.4
14.2
0.32
0.45
13.4
13.0
1.0
0.65
14.4
14.2
0.32
0.45
13.4
13.0
1.0
max
V
V+ = 15V
RL = 2kΩ to V+/2
min
V
max
V
V+ = 15V
RL = 600Ω to V+/2
min
V
1.3
1.3
1.3
max
mA
min
mA
min
mA
min
mA
min
mA
max
mA
max
ISC
ISC
IS
Output Short Circuit
Current
V+ = 5V
Sourcing, VO = 0V
Sinking, VO = 5V
Sourcing, VO = 0V
16
16
16
12
12
10
15
11
11
11
9.5
9.5
8.0
Output Short Circuit
Current
V+ = 15V
30
28
28
28
22
22
20
Sinking, VO = 12V
(Note 8)
30
30
30
30
24
24
22
Supply Current
Both Amplifiers
V+ = +5V, VO = V+/2
Both Amplifiers
V+ = 15V, VO = V+/2
1.0
1.3
1.4
1.4
1.4
1.8
1.8
1.9
1.6
1.6
1.6
1.9
1.9
2.0
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2, and RL 1M. Boldface
>
limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Typ
LMC6482AI LMC6482I LMC6482M Units
(Note 5)
Limit
(Note 6)
1.0
Limit
(Note 6)
0.9
Limit
(Note 6)
0.9
SR
Slew Rate
(Note 9)
1.3
V/µs
min
MHz
Deg
dB
0.7
0.63
0.54
GBW
φm
Gain-Bandwidth Product
Phase Margin
V+ = 15V
1.5
50
Gm
Gain Margin
15
Amp-to-Amp Isolation
Input-Referred
(Note 10)
F = 1kHz
Vcm = 1V
F = 1kHz
150
37
dB
√
en
in
nV/ Hz
Voltage Noise
√
Input-Referred
0.03
pA/ Hz
Current Noise
3
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AC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2, and RL 1M. Boldface
>
limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Typ
LMC6482AI LMC6482I LMC6482M Units
(Note 5)
Limit
Limit
Limit
(Note 6)
(Note 6)
(Note 6)
T.H.D.
Total Harmonic Distortion
F = 10kHz, AV = −2
RL = 10kΩ, VO = 4.1 VPP
F = 10kHz, AV = −2
RL = 10kΩ, VO = 8.5 VPP
V+ = 10V
%
%
0.01
0.01
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 3V, V− = 0V, VCM = VO = V+/2 and RL 1M.
>
Symbol
Parameter
Conditions
Typ
LMC6482AI LMC6482I LMC6482M
Units
(Note 5)
Limit
(Note 6)
2.0
Limit
(Note 6)
3.0
Limit
(Note 6)
3.0
VOS
Input Offset Voltage
0.9
2.0
mV
max
2.7
3.7
3.8
TCVOS
Input Offset Voltage
Average Drift
µV/˚C
IB
Input Bias Current
Input Offset Current
Common Mode
Rejection Ratio
Power Supply
0.02
0.01
74
pA
pA
dB
min
dB
min
V
IOS
CMRR
0V ≤ VCM ≤ 3V
64
68
0
60
60
0
60
60
0
PSRR
VCM
3V ≤ V+ ≤ 15V, V− = 0V
For CMRR ≥ 50dB
80
Rejection Ratio
Input Common-Mode
Voltage Range
V− −0.25
V+ + 0.25
max
V
V+
V+
V+
min
V
VO
Output Swing
RL = 2kΩ to V+/2
RL = 600Ω to V+/2
2.8
0.2
2.7
V
2.5
0.6
2.5
0.6
2.5
0.6
V
min
V
0.37
max
mA
max
IS
Supply Current
Both Amplifiers
0.825
1.2
1.2
1.2
1.5
1.5
1.6
AC Electrical Characteristics
Unless otherwise specified, V+ = 3V, V− = 0V, VCM = VO = V+/2, and RL 1M.
>
Symbol
Parameter
Conditions
Typ
LMC6482AI LMC6482I LMC6482M Units
(Note 5)
Limit
Limit
Limit
(Note 6)
(Note 6)
(Note 6)
SR
Slew Rate
(Note 11)
0.9
1.0
V/µs
MHz
%
GBW
T.H.D.
Gain-Bandwidth Product
Total Harmonic Distortion
F = 10kHz, AV = −2
0.01
RL = 10kΩ, VO = 2 VPP
Note 1: Absolute Maximum Ratings indicate limts beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5kΩ in series with 100pF. All pins rated per method 3015.6 of MIL-STD-883. This is a Class 1 device rating.
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4
AC Electrical Characteristics (Continued)
Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150˚C. Output currents in excess of 30mA over long term may adversely affect reliability.
Note 4: The maximum power dissipation is a function of T
, θ , and T . The maximum allowable power dissipation at any ambient temperature is P = (T
A D J(max)
J(max) JA
− T )/θ . All numbers apply for packages soldered directly into a PC board.
A
JA
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
+
Note 7: V = 15V, V
= 7.5V and R connected to 7.5V. For Sourcing tests, 7.5V ≤ V ≤ 11.5V. For Sinking tests, 3.5V ≤ V ≤ 7.5V.
L O O
CM
+
+
Note 8: Do not short circuit output to V , when V is greater than 13V or reliability will be adversely affected.
+
Note 9: V = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of either the positive or negative slew rates.
+
Note 10: Input referred, V = 15V and R = 100 kΩ connected to 7.5V. Each amp excited in turn with 1 kHz to produce V = 12 V
.
L
O
PP
Note 11: Connected as voltage Follower with 2V step input. Number specified is the slower of either the positive or negative slew rates.
Note 12: Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
Note 13: Guaranteed limits are dictated by tester limitations and not device performance. Actual performance is reflected in the typical value.
Note 14: For guaranteed Military Temperature parameters see RETS6482X.
Typical Performance Characteristics
VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified
Supply Current vs. Supply Voltage
Input Current vs. Temperature
01171340
01171341
Sourcing Current vs. Output Voltage
Sourcing Current vs. Output Voltage
01171342
01171343
5
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Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Sourcing Current vs. Output Voltage
Sinking Current vs. Output Voltage
01171345
01171344
Sinking Current vs. Output Voltage
Sinking Current vs. Output Voltage
01171346
01171347
Output Voltage Swing vs. Supply Voltage
Input Voltage Noise vs. Frequency
01171349
01171348
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6
Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Input Voltage Noise vs. Input Voltage
Input Voltage Noise vs. Input Voltage
01171350
01171351
Input Voltage Noise vs. Input Voltage
Crosstalk Rejection vs. Frequency
01171352
01171353
Crosstalk Rejection vs. Frequency
Positive PSRR vs. Frequency
01171354
01171355
7
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Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Negative PSRR vs. Frequency
CMRR vs. Frequency
01171356
01171357
CMRR vs. Input Voltage
CMRR vs. Input Voltage
01171358
01171359
CMRR vs. Input Voltage
∆VOS vs. CMR
01171360
01171361
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8
Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
∆VOS vs. CMR
Input Voltage vs. Output Voltage
01171363
01171362
Input Voltage vs. Output Voltage
Open Loop Frequency Response
01171364
01171365
Open Loop Frequency Responce
Open Loop Frequency Response vs. Temperature
01171366
01171367
9
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Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Maximum Output Swing vs. Frequency
Gain and Phase vs. Capacitive Load
01171368
01171369
Gain and Phase vs. Capacitive Load
Open Loop Output Impedance vs. Frequency
01171370
01171371
Open Loop Output Impedance vs. Frequency
Slew Rate vs. Supply Voltage
01171373
01171372
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10
Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Non-Inverting Large Signal Pulse Response
Non-Inverting Large Signal Pulse Response
01171374
01171375
Non-Inverting Large Signal Pulse Response
Non-Inverting Small Signal Pulse Response
01171376
01171377
Non-Inverting Small Signal Pulse Response
Non-Inverting Small Signal Pulse Response
01171378
01171379
11
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Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Inverting Large Signal Pulse Response
Inverting Large Signal Pulse Response
01171380
01171381
Inverting Large Signal Pulse Response
Inverting Small Signal Pulse Response
01171382
01171383
Inverting Small Signal Pulse Response
Inverting Small Signal Pulse Response
01171384
01171385
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12
Typical Performance Characteristics VS = +15V, Single Supply, TA = 25˚C unless otherwise
specified (Continued)
Stability vs. Capacitive Load
Stability vs. Capacitive Load
Stability vs. Capacitive Load
Stability vs. Capacitive Load
Stability vs. Capacitive Load
Stability vs. Capacitive Load
01171386
01171388
01171390
01171387
01171389
01171391
13
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Application Information
1.0 AMPLIFIER TOPOLOGY
The LMC6482 incorporates specially designed wide-
compliance range current mirrors and the body effect to
extend input common mode range to each supply rail.
Complementary paralleled differential input stages, like the
type used in other CMOS and bipolar rail-to-rail input ampli-
fiers, were not used because of their inherent accuracy
problems due to CMRR, cross-over distortion, and open-
loop gain variation.
The LMC6482’s input stage design is complemented by an
output stage capable of rail-to-rail output swing even when
driving a large load. Rail-to-rail output swing is obtained by
taking the output directly from the internal integrator instead
of an output buffer stage.
01171339
FIGURE 2. A 7.5V Input Signal Greatly
Exceeds the 3V Supply in Figure 3 Causing
2.0 INPUT COMMON-MODE VOLTAGE RANGE
No Phase Inversion Due to RI
Unlike Bi-FET amplifier designs, the LMC6482 does not
exhibit phase inversion when an input voltage exceeds the
negative supply voltage. Figure 1 shows an input voltage
exceeding both supplies with no resulting phase inversion on
the output.
Applications that exceed this rating must externally limit the
maximum input current to 5mA with an input resistor (RI) as
shown in Figure 3.
01171311
FIGURE 3. RI Input Current Protection for
Voltages Exceeding the Supply Voltages
3.0 RAIL-TO-RAIL OUTPUT
The approximated output resistance of the LMC6482 is
180Ω sourcing and 130Ω sinking at VS = 3V and 110Ω
sourcing and 80Ω sinking at Vs = 5V. Using the calculated
output resistance, maximum output voltage swing can be
estimated as a function of load.
01171310
FIGURE 1. An Input Voltage Signal Exceeds the
LMC6482 Power Supply Voltages with
No Output Phase Inversion
4.0 CAPACITIVE LOAD TOLERANCE
The absolute maximum input voltage is 300mV beyond ei-
ther supply rail at room temperature. Voltages greatly ex-
ceeding this absolute maximum rating, as in Figure 2, can
cause excessive current to flow in or out of the input pins
possibly affecting reliability.
The LMC6482 can typically directly drive a 100pF load with
VS = 15V at unity gain without oscillating. The unity gain
follower is the most sensitive configuration. Direct capacitive
loading reduces the phase margin of op-amps. The combi-
nation of the op-amp’s output impedance and the capacitive
load induces phase lag. This results in either an under-
damped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 4. This simple tech-
nique is useful for isolating the capacitive inputs of multiplex-
ers and A/D converters.
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14
Application Information (Continued)
01171317
FIGURE 4. Resistive Isolation
of a 330pF Capacitive Load
01171316
FIGURE 7. Pulse Response of
LMC6482 Circuit in Figure 6
5.0 COMPENSATING FOR INPUT CAPACITANCE
It is quite common to use large values of feedback resis-
tance with amplifiers that have ultra-low input current, like
the LMC6482. Large feedback resistors can react with small
values of input capacitance due to transducers, photo-
diodes, and circuits board parasitics to reduce phase mar-
gins.
01171318
FIGURE 5. Pulse Response of
the LMC6482 Circuit in Figure 4
Improved frequency response is achieved by indirectly driv-
ing capacitive loads, as shown in Figure 6.
01171319
FIGURE 8. Canceling the Effect of Input Capacitance
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 8), Cf, is first estimated by:
01171315
FIGURE 6. LMC6482 Noninverting Amplifier,
Compensated to Handle a 330pF Capacitive Load
or
R1 CIN ≤ R2 Cf
which typically provides significant overcompensation.
R1 and C1 serve to counteract the loss of phase margin by
feeding forward the high frequency component of the output
signal back to the amplifiers inverting input, thereby preserv-
ing phase margin in the overall feedback loop. The values of
R1 and C1 are experimentally determined for the desired
pulse response. The resulting pulse response can be seen in
Figure 7.
Printed circuit board stray capacitance may be larger or
smaller than that of a bread-board, so the actual optimum
value for Cf may be different. The values of Cf should be
checked on the actual circuit. (Refer to the LMC660 quad
CMOS amplifier data sheet for a more detailed discussion.)
15
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Application Information (Continued)
6.0 PRINTED-CIRCUIT-BOARD LAYOUT FOR
HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must oper-
rate with less than 1000pA of leakage current requires spe-
cial layout of the PC board. When one wishes to take ad-
vantage of the ultra-low input current of the LMC6482,
typically less than 20fA, it is essential to have an excellent
layout. Fortunately, the techniques of obtaining low leakages
are quite simple. First, the user must not ignore the surface
leakage of the PC board, even through it may sometimes
appear acceptably low, because under conditions of high
humidity or dust or contamination, the surface leakage will
be appreciable.
01171321
Inverting Amplifier
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LM6482’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs, as in Fig-
ure 9. To have a significant effect, guard rings should be
placed on both the top and bottom of the PC board. This PC
foil must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 1012Ω, which is nor-
mally considered a very large resistance, could leak 5pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 250 times degradation from the LMC6482’s
actual performance. However, if a guard ring is held within 5
mV of the inputs, then even a resistance of 1011Ω would
cause only 0.05pA of leakage current. See Figure 10 for
typical connections of guard rings for standard op-amp con-
figurations.
01171322
Non-Inverting Amplifier
01171323
Follower
FIGURE 10. Typical Connections of Guard Rings
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an
insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board con-
struction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring.
See Figure 11.
01171320
FIGURE 9. Example of Guard Ring in P.C. Board
Layout
01171324
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board.)
FIGURE 11. Air Wiring
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16
Application Information (Continued)
8.0 UPGRADING APPLICATIONS
The LMC6484 quads and LMC6482 duals have industry
standard pin outs to retrofit existing applications. System
performance can be greatly increased by the LMC6482’s
features. The key benefit of designing in the LMC6482 is
increased linear signal range. Most op-amps have limited
input common mode ranges. Signals that exceed this range
generate a non-linear output response that persists long
after the input signal returns to the common mode range.
7.0 OFFSET VOLTAGE ADJUSTMENT
Offset voltage adjustment circuits are illustrated in Figure 12
Figure 13. Large value resistances and potentiometers are
used to reduce power consumption while providing typically
2.5mV of adjustment range, referred to the input, for both
configurations with VS
=
5V.
Linear signal range is vital in applications such as filters
where signal peaking can exceed input common mode
ranges resulting in output phase inverison or severe distor-
tion.
9.0 DATA ACQUISITION SYSTEMS
Low power, single supply data acquisition system solutions
are provided by buffering the ADC12038 with the LMC6482
(Figure 14). Capable of using the full supply range, the
LMC6482 does not require input signals to be scaled down
to meet limited common mode voltage ranges. The
LMC4282 CMRR of 82dB maintains integral linearity of a
12-bit data acquisition system to 0.325 LSB. Other rail-to-
rail input amplifiers with only 50dB of CMRR will degrade the
accuracy of the data acquisition system to only 8 bits.
01171325
FIGURE 12. Inverting Configuration
Offset Voltage Adjustment
01171326
FIGURE 13. Non-Inverting Configuration
Offset Voltage Adjustment
17
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Application Information (Continued)
01171328
FIGURE 14. Operating from the same
Supply Voltage, the LMC6482 buffers the
ADC12038 maintaining excellent accuracy
10.0 INSTRUMENTATION CIRCUITS
these features include analytic medical instruments, mag-
netic field detectors, gas detectors, and silicon-based
tranducers.
The LMC6482 has the high input impedance, large common-
mode range and high CMRR needed for designing instru-
mentation circuits. Instrumentation circuits designed with the
LMC6482 can reject a larger range of common-mode signals
than most in-amps. This makes instrumentation circuits de-
signed with the LMC6482 an excellent choice of noisy or
industrial environments. Other applications that benefit from
A small valued potentiometer is used in series with Rg to set
the differential gain of the 3 op-amp instrumentation circuit in
Figure 15. This combination is used instead of one large
valued potentiometer to increase gain trim accuracy and
reduce error due to vibration.
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18
Application Information (Continued)
01171329
FIGURE 15. Low Power 3 Op-Amp Instrumentation Amplifier
A 2 op-amp instrumentation amplifier designed for a gain of
100 is shown in Figure 16. Low sensitivity trimming is made
for offset voltage, CMRR and gain. Low cost and low power
consumption are the main advantages of this two op-amp
circuit.
Higher frequency and larger common-mode range applica-
tions are best facilitated by a three op-amp instrumentation
amplifier.
01171330
FIGURE 16. Low-Power Two-Op-Amp Instrumentation Amplifier
11.0 SPICE MACROMODEL
A spice macromodel is available for the LMC6482. This
model includes accurate simulation of:
•
•
•
•
•
Input common-mode voltage range
Frequency and transient response
GBW dependence on loading conditions
Quiescent and dynamic supply current
Output swing dependence on loading conditions
and many more characteristics as listed on the macromodel
disk.
Contact your local National Semiconductor sales office to
obtain an operational amplifier spice model library disk.
19
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The circuit in Figure 17 uses a single supply to half wave
rectify a sinusoid centered about ground. RI limits current
into the amplifier caused by the input voltage exceeding the
supply voltage. Full wave rectification is provided by the
circuit in Figure 19.
Typical Single-Supply Applications
01171331
FIGURE 17. Half-Wave Rectifier
with Input Current Protection (RI)
01171333
FIGURE 19. Full Wave Rectifier
with Input Current Protection (RI)
01171332
FIGURE 18. Half-Wave Rectifier Waveform
01171334
FIGURE 20. Full Wave Rectifier Waveform
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20
Typical Single-Supply Applications
(Continued)
01171336
01171335
FIGURE 22. Positive Supply Current Sense
FIGURE 21. Large Compliance Range Current Source
01171337
FIGURE 23. Low Voltage Peak Detector with Rail-to-Rail Peak Capture Range
In Figure 23 dielectric absorption and leakage is minimized
by using a polystyrene or polyethylene hold capacitor. The
droop rate is primarily determined by the value of CH and
diode leakage current. The ultra-low input current of the
LMC6482 has a negligible effect on droop.
01171338
FIGURE 24. Rail-to-Rail Sample and Hold
The LMC6482’s high CMRR (82dB) allows excellent accu-
racy throughout the circuit’s rail-to-rail dynamic capture
range.
21
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Typical Single-Supply Applications (Continued)
01171327
FIGURE 25. Rail-to-Rail Single Supply Low Pass Filter
The low pass filter circuit in Figure 25 can be used as an
anti-aliasing filter with the same voltage supply as the A/D
converter.
negligible offset error even when large value resistors are
used. This in turn allows the use of smaller valued capacitors
which take less board space and cost less.
Filter designs can also take advantage of the LMC6482
ultra-low input current. The ultra-low input current yields
Ordering Information
Package
Temperature Range
NSC
Drawing
Transport
Media
Package Marking
Military
Industrial
−40˚C to +85˚C
LMC6482AIN,
LMC6482IN
−55˚C to +125˚C
8-Pin
N08E
M08A
Rail
Rail
LMC6482MN,
Molded DIP
8-pin
LMC6482AIN, LMC6482IN
LMC6482AIM, LMC6482IM
LMC6482AIM,
LMC6482AIMX
LMC6482IM,
LMC6482IMX
Small Outline
Tape and Reel
Rail
8-pin
LMC6482AMJ/883
J08A
LMC6482AMJ/883Q5962-9453401MPA
A10
Ceramic DIP
8-pin
LMC6482IMM
MUA08A
Rail
Mini SO
LMC6482IMMX
Tape and Reel
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22
Physical Dimensions inches (millimeters) unless otherwise noted
8-Pin Ceramic Dual-In-Line Package
Order Number LMC6482AMJ/883
NS Package Number J08A
8-Pin Small Outline Package
Order Package Number LMC6482AIM, LMC6482AIMX, LMC6482IM or LMC6482IMX
NS Package Number M08A
23
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Pin Molded Dual-In-Line Package
Order Package Number LMC6482AIN, LMC6482IN
NS Package Number N08E
8-Lead Mini Small Outline Molded Package, JEDEC
Order Number LMC6482IMM, or LMC6482IMMX
NS Package Number MUA08A
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24
Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
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Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned
Substances’’ as defined in CSP-9-111S2.
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相关型号：
LMC6482IMX/NOPB
IC DUAL OP-AMP, 3000 uV OFFSET-MAX, 1.5 MHz BAND WIDTH, PDSO8, SOIC-8, Operational Amplifier
NSC
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