LMR64010XMF [NSC]

SIMPLE SWITCHER® 40Vout, 1A Step-Up Voltage Regulator in SOT-23; SIMPLE SWITCHER® 40Vout , 1A升压型稳压器采用SOT -23
LMR64010XMF
型号: LMR64010XMF
厂家: National Semiconductor    National Semiconductor
描述:

SIMPLE SWITCHER® 40Vout, 1A Step-Up Voltage Regulator in SOT-23
SIMPLE SWITCHER® 40Vout , 1A升压型稳压器采用SOT -23

稳压器
文件: 总12页 (文件大小:376K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
September 23, 2011  
LMR64010  
SIMPLE SWITCHER® 40Vout, 1A Step-Up Voltage  
Regulator in SOT-23  
Applications  
Boost Conversions from 3.3V, 5V, and 12V Rails  
Space Constrained Applications  
Embedded Systems  
LCD Displays  
LED Applications  
30167501  
System Performance  
Features  
Input voltage range of 2.7V to 14V  
Output voltage up to 40V  
Switch current up to 1A  
1.6 MHz switching frequency  
Low shutdown Iq, <1 µA  
Cycle-by-cycle current limiting  
Internally compensated  
SOT23-5 packaging (2.92 x 2.84 x 1.08mm)  
Fully enabled for WEBENCH® Power Designer  
Performance Benefits  
30167557  
Extremely easy to use  
Tiny overall solution reduces system cost  
30167558  
© 2011 National Semiconductor Corporation  
301675  
www.national.com  
Connection Diagram  
Top View  
30167502  
5-Lead SOT-23 Package  
See NS Package Number MF05A  
Ordering Information  
Order Number  
LMR64010XMFE  
LMR64010XMF  
LMR64010XMFX  
Package Type  
Package Drawing  
Supplied As  
Package ID  
250 Units, Tape and Reel  
1000 Units, Tape and Reel  
3000 Units, Tape and Reel  
SF9B  
SOT23-5  
MF05A  
Pin Descriptions  
Pin  
1
Name  
SW  
Function  
Drain of the internal FET switch.  
Analog and power ground.  
2
GND  
FB  
3
Feedback point that connects to external resistive divider.  
Shutdown control input. Connect to VIN if this feature is not used.  
Analog and power input.  
4
SHDN  
VIN  
5
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2
SW Pin Voltage  
Input Supply Voltage  
SHDN Pin Voltage  
−0.4V to +40V  
−0.4V to +14.5V  
−0.4V to VIN + 0.3V  
Absolute Maximum Ratings (Note 1)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
θ
J-A (SOT23-5)  
265°C/W  
ESD Rating (Note 3)  
Human Body Model  
Machine Model  
For soldering specifications: see product folder at  
www.national.com and www.national.com/ms/MS/MS-  
SOLDERING.pdf  
Storage Temperature Range  
Operating Junction  
Temperature Range  
Lead Temp. (Soldering, 5 sec.)  
Power Dissipation (Note 2)  
FB Pin Voltage  
−65°C to +150°C  
2 kV  
200V  
−40°C to +125°C  
300°C  
Internally Limited  
−0.4V to +6V  
Electrical Characteristics  
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range  
(−40°C TJ +125°C). Unless otherwise specified: VIN = 5V, VSHDN = 5V, IL = 0A.  
Min  
(Note 4)  
Typical  
(Note 5)  
Max  
(Note 4)  
Symbol  
VIN  
Parameter  
Input Voltage  
Conditions  
Units  
2.7  
14  
V
A
ISW  
Switch Current Limit  
Switch ON Resistance  
Shutdown Threshold  
(Note 6)  
1.0  
1.5  
RDS(ON)  
SHDNTH  
ISW = 100 mA  
Device ON  
Device OFF  
VSHDN = 0  
500  
650  
0.50  
mΩ  
1.5  
V
µA  
V
ISHDN  
Shutdown Pin Bias Current  
0
0
VSHDN = 5V  
VIN = 3V  
2
VFB  
Feedback Pin Reference  
Voltage  
1.205  
1.230  
1.255  
IFB  
IQ  
Feedback Pin Bias Current  
Quiescent Current  
VFB = 1.23V  
60  
2.1  
nA  
VSHDN = 5V, Switching  
VSHDN = 5V, Not Switching  
VSHDN = 0  
3.0  
500  
1
mA  
400  
µA  
0.024  
FB Voltage Line Regulation  
2.7V VIN 14V  
0.02  
%/V  
FSW  
DMAX  
IL  
Switching Frequency  
Maximum Duty Cycle  
Switch Leakage  
1.15  
87  
1.6  
93  
1.85  
MHz  
%
Not Switching VSW = 5V  
1
µA  
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the  
device outside of the limits set forth under the operating ratings which specify the intended range of operating conditions.  
Note 2: The maximum power dissipation which can be safely dissipated for any application is a function of the maximum junction temperature, TJ(MAX) = 125°  
C, the junction-to-ambient thermal resistance for the SOT-23 package, θJ-A = 265°C/W, and the ambient temperature, TA. The maximum allowable power  
dissipation at any ambient temperature for designs using this device can be calculated using the formula:  
If power dissipation exceeds the maximum specified above, the internal thermal protection circuitry will protect the device by reducing the output voltage as  
required to maintain a safe junction temperature.  
Note 3: The human body model is a 100 pF capacitor discharged through a 1.5 kresistor into each pin. The machine model is a 200 pF capacitor discharged  
directly into each pin.  
Note 4: Limits are guaranteed by testing, statistical correlation, or design.  
Note 5: Typical values are derived from the mean value of a large quantity of samples tested during characterization and represent the most likely expected value  
of the parameter at room temperature.  
Note 6: Switch current limit is dependent on duty cycle (see Typical Performance Characteristics). Limits shown are for duty cycles 50%.  
3
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Typical Performance Characteristics Unless otherwise specified: VIN = 5V, SHDN pin is tied to VIN.  
Iq VIN (Active) vs Temperature  
Oscillator Frequency vs Temperature  
30167508  
30167510  
Max. Duty Cycle vs Temperature  
Feedback Voltage vs Temperature  
30167506  
30167555  
RDS(ON) vs Temperature  
Current Limit vs Temperature  
30167509  
30167507  
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4
RDS(ON) vs VIN  
Efficiency vs Load Current (VOUT = 12V)  
30167514  
30167523  
Efficiency vs Load Current (VOUT = 15V)  
Efficiency vs Load Current (VOUT = 20V)  
30167545  
30167546  
Efficiency vs Load Current (VOUT = 25V)  
Efficiency vs Load Current (VOUT = 30V)  
30167547  
30167548  
5
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Efficiency vs Load Current (VOUT = 35V)  
Efficiency vs Load Current (VOUT = 40V)  
30167550  
30167549  
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6
Block Diagram  
30167503  
currents flowing through Q1 and Q2 will be equal, and the  
General Description  
feedback loop will adjust the regulated output to maintain this.  
Because of this, the regulated output is always maintained at  
a voltage level equal to the voltage at the FB node "multiplied  
up" by the ratio of the output resistive divider.  
The LMR64010 switching regulators is a current-mode boost  
converter operating at a fixed frequency of 1.6 MHz.  
The use of SOT-23 package, made possible by the minimal  
power loss of the internal 1A switch, and use of small induc-  
tors and capacitors result in the industry's highest power  
density. The 40V internal switch makes these solutions per-  
fect for boosting to voltages of 16V or greater.  
The current limit comparator feeds directly into the flip-flop,  
that drives the switch FET. If the FET current reaches the limit  
threshold, the FET is turned off and the cycle terminated until  
the next clock pulse. The current limit input terminates the  
pulse regardless of the status of the output of the PWM com-  
parator.  
These parts have a logic-level shutdown pin that can be used  
to reduce quiescent current and extend battery life.  
Protection is provided through cycle-by-cycle current limiting  
and thermal shutdown. Internal compensation simplifies de-  
sign and reduces component count.  
Application Hints  
SELECTING THE EXTERNAL CAPACITORS  
The best capacitors for use with the LMR64010 are multi-lay-  
er ceramic capacitors. They have the lowest ESR (equivalent  
series resistance) and highest resonance frequency which  
makes them optimum for use with high frequency switching  
converters.  
Theory of Operation  
The LMR64010 is a switching converter IC that operates at a  
fixed frequency (1.6 MHz) using current-mode control for fast  
transient response over a wide input voltage range and in-  
corporates pulse-by-pulse current limiting protection. Be-  
cause this is current mode control, a 50 msense resistor in  
series with the switch FET is used to provide a voltage (which  
is proportional to the FET current) to both the input of the  
pulse width modulation (PWM) comparator and the current  
limit amplifier.  
When selecting a ceramic capacitor, only X5R and X7R di-  
electric types should be used. Other types such as Z5U and  
Y5F have such severe loss of capacitance due to effects of  
temperature variation and applied voltage, they may provide  
as little as 20% of rated capacitance in many typical applica-  
tions. Always consult capacitor manufacturer’s data curves  
before selecting a capacitor.  
At the beginning of each cycle, the S-R latch turns on the FET.  
As the current through the FET increases, a voltage (propor-  
tional to this current) is summed with the ramp coming from  
the ramp generator and then fed into the input of the PWM  
comparator. When this voltage exceeds the voltage on the  
other input (coming from the Gm amplifier), the latch resets  
and turns the FET off. Since the signal coming from the Gm  
amplifier is derived from the feedback (which samples the  
voltage at the output), the action of the PWM comparator  
constantly sets the correct peak current through the FET to  
keep the output volatge in regulation.  
SELECTING THE OUTPUT CAPACITOR  
A single ceramic capacitor of value 4.7 µF to 10 µF will provide  
sufficient output capacitance for most applications. For output  
voltages below 10V, a 10 µF capacitance is required. If larger  
amounts of capacitance are desired for improved line support  
and transient response, tantalum capacitors can be used in  
parallel with the ceramics. Aluminum electrolytics with ultra  
low ESR such as Sanyo Oscon can be used, but are usually  
prohibitively expensive. Typical AI electrolytic capacitors are  
not suitable for switching frequencies above 500 kHz due to  
significant ringing and temperature rise due to self-heating  
Q1 and Q2 along with R3 - R6 form a bandgap voltage refer-  
ence used by the IC to hold the output in regulation. The  
7
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from ripple current. An output capacitor with excessive ESR  
can also reduce phase margin and cause instability.  
SELECTING THE INPUT CAPACITOR  
An input capacitor is required to serve as an energy reservoir  
for the current which must flow into the coil each time the  
switch turns ON. This capacitor must have extremely low  
ESR, so ceramic is the best choice. We recommend a nomi-  
nal value of 2.2 µF, but larger values can be used. Since this  
capacitor reduces the amount of voltage ripple seen at the  
input pin, it also reduces the amount of EMI passed back  
along that line to other circuitry.  
FEED-FORWARD COMPENSATION  
Although internally compensated, the feed-forward capacitor  
Cf is required for stability (see Basic Application Circuit).  
Adding this capacitor puts a zero in the loop response of the  
converter. Without it, the regulator loop can oscillate. The  
recommended frequency for the zero fz should be approxi-  
mately 8 kHz. Cf can be calculated using the formula:  
30167522  
Cf = 1 / (2 X π X R1 X fz)  
Recommended PCB Component Layout  
SELECTING DIODES  
Some additional guidelines to be observed:  
The external diode used in the typical application should be  
a Schottky diode. If the switch voltage is less than 15V, a 20V  
diode such as the MBR0520 is recommended. If the switch  
voltage is between 15V and 25V, a 30V diode such as the  
MBR0530 is recommended. If the switch voltage exceeds  
25V, a 40V diode such as the MBR0540 should be used.  
1. Keep the path between L1, D1, and C2 extremely short.  
Parasitic trace inductance in series with D1 and C2 will  
increase noise and ringing.  
2. The feedback components R1, R2 and CF must be kept  
close to the FB pin of U1 to prevent noise injection on the  
FB pin trace.  
The MBR05XX series of diodes are designed to handle a  
maximum average current of 0.5A. For applications exceed-  
ing 0.5A average but less than 1A, a Toshiba CRS08 can be  
used.  
3. If internal ground planes are available (recommended)  
use vias to connect directly to ground at pin 2 of U1, as  
well as the negative sides of capacitors C1 and C2.  
LAYOUT HINTS  
SETTING THE OUTPUT VOLTAGE  
High frequency switching regulators require very careful lay-  
out of components in order to get stable operation and low  
noise. All components must be as close as possible to the  
LMR64010 device. It is recommended that a 4-layer PCB be  
used so that internal ground planes are available.  
The output voltage is set using the external resistors R1 and  
R2 (see Basic Application Circuit). A value of approximately  
13.3 kis recommended for R2 to establish a divider current  
of approximately 92 µA. R1 is calculated using the formula:  
R1 = R2 X (VOUT/1.23 − 1)  
As an example, a recommended layout of components is  
shown:  
30167505  
Basic Application Circuit  
DUTY CYCLE  
This applies for continuous mode operation.  
The maximum duty cycle of the switching regulator deter-  
mines the maximum boost ratio of output-to-input voltage that  
the converter can attain in continuous mode of operation. The  
duty cycle for a given boost application is defined as:  
The equation shown for calculating duty cycle incorporates  
terms for the FET switch voltage and diode forward voltage.  
The actual duty cycle measured in operation will also be af-  
fected slightly by other power losses in the circuit such as wire  
losses in the inductor, switching losses, and capacitor ripple  
current losses from self-heating. Therefore, the actual (effec-  
tive) duty cycle measured may be slightly higher than calcu-  
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8
lated to compensate for these power losses. A good  
approximation for effctive duty cycle is :  
inductor current will begin touching the zero axis which means  
it will be in discontinuous mode. A similar analysis can be  
performed on any boost converter, to make sure the ripple  
current is reasonable and continuous operation will be main-  
tained at the typical load current values.  
DC (eff) = (1 - Efficiency x (VIN/VOUT))  
Where the efficiency can be approximated from the curves  
provided.  
INDUCTANCE VALUE  
The first question we are usually asked is: “How small can I  
make the inductor?” (because they are the largest sized com-  
ponent and usually the most costly). The answer is not simple  
and involves tradeoffs in performance. Larger inductors mean  
less inductor ripple current, which typically means less output  
voltage ripple (for a given size of output capacitor). Larger  
inductors also mean more load power can be delivered be-  
cause the energy stored during each switching cycle is:  
E =L/2 X (lp)2  
30167524  
Typical Application, 5V–12V Boost  
Where “lp” is the peak inductor current. An important point to  
observe is that the LMR64010 will limit its switch current  
based on peak current. This means that since lp(max) is fixed,  
increasing L will increase the maximum amount of power  
available to the load. Conversely, using too little inductance  
may limit the amount of load current which can be drawn from  
the output.  
MAXIMUM SWITCH CURRENT  
The maximum FET swtch current available before the current  
limiter cuts in is dependent on duty cycle of the application.  
This is illustrated in the graphs below which show both the  
typical and guaranteed values of switch current as a function  
of effective (actual) duty cycle:  
Best performance is usually obtained when the converter is  
operated in “continuous” mode at the load current range of  
interest, typically giving better load regulation and less output  
ripple. Continuous operation is defined as not allowing the in-  
ductor current to drop to zero during the cycle. It should be  
noted that all boost converters shift over to discontinuous op-  
eration as the output load is reduced far enough, but a larger  
inductor stays “continuous” over a wider load current range.  
To better understand these tradeoffs, a typical application cir-  
cuit (5V to 12V boost with a 10 µH inductor) will be analyzed.  
We will assume:  
VIN = 5V, VOUT = 12V, VDIODE = 0.5V, VSW = 0.5V  
Since the frequency is 1.6 MHz (nominal), the period is ap-  
proximately 0.625 µs. The duty cycle will be 62.5%, which  
means the ON time of the switch is 0.390 µs. It should be  
noted that when the switch is ON, the voltage across the in-  
ductor is approximately 4.5V.  
Using the equation:  
V = L (di/dt)  
30167525  
Switch Current Limit vs Duty Cycle  
We can then calculate the di/dt rate of the inductor which is  
found to be 0.45 A/µs during the ON time. Using these facts,  
we can then show what the inductor current will look like dur-  
ing operation:  
CALCULATING LOAD CURRENT  
As shown in the figure which depicts inductor current, the load  
current is related to the average inductor current by the rela-  
tion:  
ILOAD = IIND(AVG) x (1 - DC)  
Where "DC" is the duty cycle of the application. The switch  
current can be found by:  
ISW = IIND(AVG) + ½ (IRIPPLE  
)
Inductor ripple current is dependent on inductance, duty cy-  
cle, input voltage and frequency:  
IRIPPLE = DC x (VIN-VSW) / (f x L)  
combining all terms, we can develop an expression which al-  
lows the maximum available load current to be calculated:  
30167512  
10 µH Inductor Current,5V–12V Boost  
During the 0.390 µs ON time, the inductor current ramps up  
0.176A and ramps down an equal amount during the OFF  
time. This is defined as the inductor “ripple current”. It can also  
be seen that if the load current drops to about 33 mA, the  
9
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The equation shown to calculate maximum load current takes  
into account the losses in the inductor or turn-OFF switching  
losses of the FET and diode. For actual load current in typical  
applications, we took bench data for various input and output  
voltages and displayed the maximum load current available  
for a typical device in graph form:  
possible inductance value for cost and size savings. The con-  
verter will operate in discontinuous mode in such a case.  
The minimum inductance should be selected such that the  
inductor (switch) current peak on each cycle does not reach  
the 1A current limit maximum. To understand how to do this,  
an example will be presented.  
In the example, minimum switching frequency of 1.15 MHz  
will be used. This means the maximum cycle period is the  
reciprocal of the minimum frequency:  
TON(max) = 1/1.15M = 0.870 µs  
We will assume the input voltage is 5V, VOUT = 12V, VSW  
0.2V, VDIODE = 0.3V. The duty cycle is:  
=
Duty Cycle = 60.3%  
Therefore, the maximum switch ON time is 0.524 µs. An in-  
ductor should be selected with enough inductance to prevent  
the switch current from reaching 1A in the 0.524 µs ON time  
interval (see below):  
30167534  
Max. Load Current vs VIN  
Discontinuous Design, 5V–12V Boost 30167513  
DESIGN PARAMETERS VSW AND ISW  
The value of the FET "ON" voltage (referred to as VSW in the  
equations) is dependent on load current. A good approxima-  
tion can be obtained by multiplying the "ON Resistance" of  
the FET times the average inductor current.  
The voltage across the inductor during ON time is 4.8V. Min-  
imum inductance value is found by:  
V = L X dl/dt, L = V X (dt/dl) = 4.8 (0.524µ/1) = 2.5 µH  
FET on resistance increases at VIN values below 5V, since  
the internal N-FET has less gate voltage in this input voltage  
range (see Typical performance Characteristics curves).  
Above VIN = 5V, the FET gate voltage is internally clamped to  
5V.  
In this case, a 2.7 µH inductor could be used assuming it pro-  
vided at least that much inductance up to the 1A current value.  
This same analysis can be used to find the minimum induc-  
tance for any boost application.  
When selecting an inductor, make certain that the continuous  
current rating is high enough to avoid saturation at peak cur-  
rents. A suitable core type must be used to minimize core  
(switching) losses, and wire power losses must be considered  
when selecting the current rating.  
The maximum peak switch current the device can deliver is  
dependent on duty cycle. The minimum value is guaranteed  
to be > 1A at duty cycle below 50%. For higher duty cycles,  
see Typical performance Characteristics curves.  
THERMAL CONSIDERATIONS  
SHUTDOWN PIN OPERATION  
At higher duty cycles, the increased ON time of the FET  
means the maximum output current will be determined by  
power dissipation within the LMR64010 FET switch. The  
switch power dissipation from ON-state conduction is calcu-  
lated by:  
The device is turned off by pulling the shutdown pin low. If this  
function is not going to be used, the pin should be tied directly  
to VIN. If the SHDN function will be needed, a pull-up resistor  
must be used to VIN (approximately 50k-100krecommend-  
ed). The SHDN pin must not be left unterminated.  
P(SW) = DC x IIND(AVE)2 x RDSON  
There will be some switching losses as well, so some derating  
needs to be applied when calculating IC power dissipation.  
MINIMUM INDUCTANCE  
In some applications where the maximum load current is rel-  
atively small, it may be advantageous to use the smallest  
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10  
Physical Dimensions inches (millimeters) unless otherwise noted  
5-Lead SOT-23 Package  
Order Number LMR64010XMF, LMR64010XMFX  
NS Package Number MF05A  
11  
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