74ABT648PW [NXP]
Octal transceiver/register, inverting 3-State; 八路收发器/寄存器，反相三态
| 型号： | 74ABT648PW |
| 厂家： | 
NXP |
| 描述： | Octal transceiver/register, inverting 3-State |
| 文件： | 总14页 (文件大小：124K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74ABT648
Octal transceiver/register, inverting
(3-State)
Product specification
1998 Jun 08
Supersedes data of 1995 Apr 17
IC23 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
The 74ABT648 transceiver/register consists of bus transceiver
FEATURES
circuits with inverting 3-State outputs, D-type flip-flops, and control
circuitry arranged for multiplexed transmission of data directly from
the input bus or the internal registers. Data on the A or B bus will be
clocked into the registers as the appropriate clock pin goes High.
Output Enable (OE) and DIR pins are provided to control the
transceiver function. In the transceiver mode, data present at the
high impedance port may be stored in either the A or B register or
both.
• Combines 74ABT245 and 74ABT374 type functions in one device
• Independent registers for A and B buses
• Multiplexed real-time and stored data
• Output capability: +64mA/–32mA
• Power-up 3-state
• Power-up reset
The Select (SAB, SBA) pins determine whether data is stored or
transferred through the device in real–time. The DIR determines
which bus will receive data when the OE is active (Low). In the
isolation mode (OE = High), data from Bus A may be stored in the B
register and/or data from Bus B may be stored in the A register.
Outputs from real-time, or stored registers will be inverted. When an
output function is disabled, the input function is still enabled and
may be used to store and transmit data. Only one of the two buses,
A or B may be driven at a time. The examples on the next page
demonstrate the four fundamental bus management functions that
can be performed with the 74ABT648.
• Live insertion/extraction permitted
• Latch-up protection exceeds 500mA per Jedec Std 17
• ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT648 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
QUICK REFERENCE DATA
CONDITIONS
= 25°C; GND = 0V
SYMBOL
PARAMETER
TYPICAL
UNIT
ns
T
amb
t
t
Propagation delay
An to Bn or Bn to An
PLH
PHL
C = 50pF; V = 5V
5.9
4
L
CC
Input capacitance
CP, S, OE, DIR
C
V = 0V or V
CC
pF
IN
I
Outputs disabled;
= 0V or V
C
I/O capacitance
7
pF
I/O
V
O
CC
I
Total supply current
Outputs disabled; V =5.5V
110
µA
CCZ
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
74ABT648 N
DWG NUMBER
SOT222-1
24-Pin Plastic DIP
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74ABT648 N
74ABT648 D
74ABT648 DB
74ABT648 PW
24-Pin plastic SO
74ABT648 D
SOT137-1
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
74ABT648 DB
74ABT648PW DH
SOT340-1
SOT355-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
CPAB
SAB
DIR
A0
1
2
3
4
5
6
7
8
9
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
CPAB /
CPBA
A to B clock input / B to A clock
input
1, 23
CPBA
SBA
OE
B0
A to B select input / B to A select
input
2, 22
3
SAB / SBA
DIR
Direction control input
A1
4, 5, 6, 7,
8, 9, 10, 11
A2
B1
A0 – A7
Data inputs/outputs (A side)
A3
B2
20, 19, 18, 17,
16, 15, 14, 13
B0 – B7
Data inputs/outputs (B side)
A4
B3
A5
B4
21
12
24
OE
Output enable input (active-Low)
Ground (0V)
A6 10
A7 11
B5
GND
B6
V
CC
Positive supply voltage
GND 12
B7
SA00082
2
1998 Jun 08
853–1613 19516
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
21
G3
4
5
6
7
8
9
10 11
3EN1 [BA]
3
22
2
3EN2 [AB]
G6
G7
C4
C5
A0 A1 A2 A3 A4 A5 A6 A7
23
1
1
2
CPAB
SAB
3
23
22
21
DIR
≥1
1
6
4D
2
CPBA
SBA
OE
4
20
6 1
5D
1
7
7
≥1
B0 B1 B2 B3 B4 B5 B6 B7
19
18
5
6
20 19 18 17 16 15 14 13
17
16
7
8
9
SA00083
15
14
10
11
13
SA00156
REAL TIME BUS TRANSFER
REAL TIME BUS TRANSFER
BUS A TO BUS B
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED DATA
TO A OR B
BUS B TO BUS A
OE DIR CPAB CPBA SAB SBA
OE DIR CPAB CPBA SAB SBA
OE DIR CPAB CPBA SAB SBA
OE DIR CPAB CPBA SAB SBA
L
L
X
X
X
L
L
H
X
X
L
X
L
L
H
H
X
X
↑
X
↑
X
↑
L
X
X
X
X
X
L
L
L
H
H or L
X
X
H
H
X
H
H or L
↑
SA00177
3
1998 Jun 08
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
FUNCTION TABLE
INPUTS
CPAB
DATA I/O
OPERATING MODE
OE
DIR
CPBA
SAB
SBA
An
Bn
Unspecified
output*
X
X
↑
X
X
X
Input
Store A, B unspecified
Unspecified
output*
X
X
X
↑
X
X
Input
Input
Store B, A unspecified
H
H
X
X
↑
↑
X
X
X
X
Store A and B data
Isolation, hold storage
Input
Output
Input
H or L
H or L
L
L
L
L
X
X
X
X
X
L
H
Real time B data to A bus
Stored B data to A bus
Input
H or L
L
L
H
H
X
X
X
L
H
X
X
Real time A data to B bus
Stored A data to B bus
Output
H or L
H
L
X
↑
=
=
=
=
High voltage level
Low voltage level
Don’t care
Low-to-High clock transition
*
The data output function may be enabled or disabled by various signals at the OE input. Data input functions are always enabled, i.e.,
data at the bus pins will be stored on every Low-to-High transition of the clock.
LOGIC DIAGRAM
21
OE
3
DIR
CPBA
SBA
23
22
1
CPAB
SAB
2
1of 8 Channels
1D
C1
Q
4
20
A0
B0
1D
C1
Q
19
18
17
16
15
14
13
5
A1
A2
A3
A4
A5
A6
A7
B1
B2
B3
B4
B5
B6
B7
6
7
8
DETAIL A X 7
9
10
11
SA00081
4
1998 Jun 08
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
1, 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
–0.5 to +7.0
–18
UNIT
V
V
CC
I
IK
DC input diode current
V < 0
I
mA
V
3
V
I
DC input voltage
–1.2 to +7.0
–50
I
DC output diode current
V
O
< 0
mA
V
OK
3
V
DC output voltage
output in Off or High state
output in Low state
–0.5 to +5.5
128
OUT
OUT
I
DC output current
mA
°C
T
stg
Storage temperature range
–65 to 150
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
Min
4.5
0
Max
V
DC supply voltage
5.5
V
V
CC
V
Input voltage
V
CC
I
V
High-level input voltage
Low-level Input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
2.0
V
IH
V
0.8
–32
64
V
IL
I
mA
mA
ns/V
°C
OH
I
OL
∆t/∆v
0
10
T
amb
Operating free-air temperature range
–40
+85
5
1998 Jun 08
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
DC ELECTRICAL CHARACTERISTICS
LIMITS
T
= –40°C
to +85°C
amb
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25°C
UNIT
Min
Typ
Max
Min
Max
V
Input clamp voltage
V
V
V
V
= 4.5V; I = –18mA
–0.9
3.2
3.7
2.3
–1.2
–1.2
V
V
V
V
IK
CC
CC
CC
CC
IK
= 4.5V; I = –3mA; V = V or V
2.5
3.0
2.0
2.5
3.0
2.0
OH
I
IL
IH
IH
V
OH
High-level output voltage
Power-up output low
= 5.0V; I = –3mA; V = V or V
OH I IL
= 4.5V; I = –32mA; V = V or V
IH
OH
I
IL
V
RST
V
CC
= 5.5V; I = 1mA; V = GND or V
CC
0.13
0.55
0.55
V
O
I
3
voltage
V
Low-level output voltage
Power-off leakage current
Power–up/down 3-State
V
V
= 4.5V; I = 64mA; V = V or V
IH
0.42
0.55
0.55
V
OL
CC
OL
I
IL
I
= 0.0V; V or V ≤ 4.5V
±5.0
±100
±100
µA
OFF
CC
I
O
V
CC
V
OE
= 2.1V; V = 0.5V; V = GND or V
;
CC
O
I
I
I
±5.0
±50
±50
µA
PU/ PD
4
output current
= Don’t care
I
Input leakage Control pins
V
V
V
V
V
V
V
V
V
= 5.5V; V = GND or 5.5V
±0.01
±5
±1.0
±100
50
±1.0
±100
50
µA
µA
µA
µA
µA
mA
µA
mA
I
CC
CC
CC
CC
CC
CC
CC
CC
CC
I
current
Data pins
= 5.5V; V = GND or 5.5V
I
I
IH
+ I
+ I
3-State output High current
3-State output Low current
Output high leakage current
= 5.5V; V = 2.7V; V = V or V
5.0
OZH
OZL
O
I
IL
IH
IH
I
IL
= 5.5V; V = 0.5V; V = V or V
–5.0
5.0
–50
50
–50
50
O
I
IL
I
= 5.5V; V = 5.5 V; V = GND or V
CC
CEX
O
I
1
I
O
Output current
= 5.5V; V = 2.5V
–50
–65
110
20
–180
250
30
–50
–180
250
30
O
I
= 5.5V; Outputs High, V = GND or V
CCH
I
CC
I
Quiescent supply current
= 5.5V; Outputs Low, V = GND or V
CCL
I
CC
= 5.5V; Outputs 3-State;
I
110
0.3
250
1.5
250
1.5
µA
CCZ
V = GND or V
I
CC
Additional supply current per
V
CC
= 5.5V; one input at 3.4V,
∆I
CC
mA
2
input pin
other inputs at V or GND; V = 5.5V
CC CC
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V between 0V and 2.1V, with a transition time of up to 10msec. From V = 2.1 to V = 5V ± 10% a
CC
CC
CC
transition time of up to 100µsec is permitted.
6
1998 Jun 08
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
AC CHARACTERISTICS
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω
R
F
L
L
LIMITS
Max
T
= -40 to
+85 C
= +5.0V ±0.5V
amb
o
T
V
= +25 C
amb
CC
o
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +5.0V
V
CC
Min
Typ
Min
Max
f
Maximum clock frequency
1
1
125
200
125
MHz
ns
MAX
t
t
Propagation delay
CPAB to Bn or CPBA to An
2.2
1.7
5.3
5.9
6.8
7.4
2.2
1.7
7.8
8.4
PLH
PHL
t
t
Propagation delay
An to Bn or Bn to An
2
3
1.0
1.5
3.6
4.2
5.1
5.6
1.0
1.5
6.1
6.3
PLH
PHL
ns
ns
ns
ns
ns
ns
t
t
Propagation delay
SAB to Bn or SBA to An
2
3
1.5
1.5
4.9
5.4
6.1
6.9
1.5
1.5
7.1
7.7
PLH
PHL
t
Output enable time
OE to An or Bn
5
6
1.0
2.1
4.3
5.5
5.3
7.4
1.0
2.1
6.3
8.8
PZH
t
PZL
t
Output disable time
OE to An or Bn
5
6
1.5
1.5
6.2
6.0
7.3
7.0
1.5
1.5
8.3
7.5
PHZ
t
PLZ
t
Output enable time
DIR to An or Bn
5
6
1.2
2.5
4.8
6.0
5.7
9.0
1.2
2.5
6.7
9.5
PZH
t
PZL
t
Output disable time
DIR to An or Bn
5
6
1.5
1.5
5.9
6.3
6.7
7.2
1.5
1.5
7.7
8.2
PHZ
t
PLZ
AC SETUP REQUIREMENTS
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω
R
F
L
L
LIMITS
o
o
T
V
= +25 C
= +5.0V
T
V
= -40 to +85 C
amb
CC
amb
CC
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +5.0V ±0.5V
Min
Typ
Min
t (H)
t (L)
s
Setup time
An to CPAB, Bn to CPBA
3.0
3.0
1.5
1.0
3.0
3.0
s
4
4
1
ns
ns
ns
t (H)
Hold time
An to CPAB, Bn to CPBA
0.0
0.0
–0.4
–1.0
0.0
0.0
h
t (L)
h
t (H)
Pulse width, High or Low
CPAB or CPBA
3.5
4.0
2.6
1.0
3.5
4.0
w
t (L)
w
7
1998 Jun 08
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
AC WAVEFORMS
V
M
= 1.5V, V = GND to 3.0V
IN
1/f
MAX
SBA or SAB
An or Bn
CPBA or
CPAB
V
V
M
M
t
V
V
V
t
M
t
M
M
t
PLH
PHL
(H)
t (L)
w
w
t
PHL
PLH
An or Bn
An or Bn
SA00088
V
V
M
M
An or Bn
V
V
M
M
SA00087
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
Waveform 2. Propagation Delay, SAB to Bn or SBA to An
An or Bn
V
V
V
V
M
M
M
M
An or Bn
An or Bn
SBA or SAB
V
V
M
M
t
t (H)
t (L)
s
t
(H)
t (L)
h
s
h
t
t
W
(L)
PHL
PLH
CPBA or
CPAB
V
V
Bn or An
SA00178
M
M
V
V
M
M
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
SA00090
Waveform 3. Propagation Delay, An to Bn or Bn to An and SBA
to An or SAB to Bn
Waveform 4. Data Setup and Hold Times
OE
OE
V
V
M
M
t
V
V
M
M
t
DIR
DIR
t
PZL
PLZ
t
PZH
PHZ
V
–0.3V
0V
V
M
OH
An or Bn
V
+0.3V
0V
An or Bn
V
OL
M
SA00180
SA00179
Waveform 6. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
Waveform 5. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
8
1998 Jun 08
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
TEST CIRCUIT AND WAVEFORM
7 V
500 Ω
S1
From Output
Under Test
Open
GND
500 Ω
C
= 50 pF
L
Load Circuit
TEST
S1
t
open
7 V
pd
t
/t
PLZ PZL
t
/t
open
PHZ PZH
DEFINITIONS
C
=
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
L
SA00012
9
1998 Jun 08
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
DIP24: plastic dual in-line package; 24 leads (300 mil)
SOT222-1
10
1998 Jun 08
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
11
1998 Jun 08
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
12
1998 Jun 08
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
SOT355-1
13
1998 Jun 08
Philips Semiconductors
Product specification
Octal transceiver/register, inverting (3-State)
74ABT648
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 06-98
9397-750-04022
Document order number:
Philips
Semiconductors
相关型号：
74ABT648PWDH-T
IC ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24, Bus Driver/Transceiver
NXP
74ABT651D,112
IC ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24, 7.50 MM, PLASTIC, MS-013, SOT-137-1, SO-24, Bus Driver/Transceiver
NXP
74ABT651D,118
IC ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24, PLASTIC, SO-24, Bus Driver/Transceiver
NXP
©2020 ICPDF网 联系我们和版权申明