74ABT833D [NXP]
Octal transceiver with parity generator/checker 3-State; 八路收发器奇偶校验发生器/检验三态
| 型号： | 74ABT833D |
| 厂家： | 
NXP |
| 描述： | Octal transceiver with parity generator/checker 3-State |
| 文件： | 总11页 (文件大小：61K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74ABT833
Octal transceiver with parity
generator/checker (3-State)
Product specification
IC23 Data Handbook
1993 Jun 21
Philips
Semiconductors
Philips Semiconductors
Product specification
Octal transceiver with parity generator/checker
(3-State)
74ABT833
The 74ABT833 is an octal transceiver with a parity
generator/checker and is intended for bus-oriented applications.
FEATURES
• Low static and dynamic power dissipation with high speed and
When Output Enable A (OEA) is High, it will place the A outputs in a
high impedance state. Output Enable B (OEB) controls the B
outputs in the same way.
high output drive
• Open-collector ERROR output with flag register
• Output capability: +64mA/–32mA
The parity generator creates an odd parity output (PARITY) when
OEB is Low. When OEA is Low, the parity of the B port, including
the PARITY input, is checked for odd parity. When an error is
detected, the error data is sent to the input of a storage register. If a
Low-to-High transition happens at the clock input (CP), the error
data is stored in the register and the Open-collector error flag
(ERROR) will go Low. The error flag register is cleared with a Low
pulse on the CLEAR input.
• Latch-up protection exceeds 500mA per Jedec Std 17
• ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200 V per Machine Model
• Power up/down 3-State
• Live insertion/extraction permitted
If both OEA and OEB are Low, data will flow from the A bus to the B
bus and the part is forced into an error condition which creates an
inverted PARITY output. This error condition can be used by the
designer for system diagnostics.
DESCRIPTION
The 74ABT833 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
QUICK REFERENCE DATA
CONDITIONS
= 25°C; GND = 0V
SYMBOL
PARAMETER
TYPICAL
UNIT
T
amb
t
t
Propagation delay
An to Bn or Bn to An
PLH
PHL
C = 50pF; V = 5V
3.4
ns
L
CC
t
t
Propagation delay
An to PARITY
PLH
PHL
C = 50pF; V = 5V
7.4
4
ns
pF
pF
µA
L
CC
C
Input capacitance
V = 0V or V
I CC
IN
Outputs disabled;
= 0V or V
C
I/O capacitance
7
I/O
V
O
CC
I
Total supply current
Outputs disabled; V =5.5V
50
CCZ
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
SOT222-1
24-Pin Plastic DIP
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74ABT833 N
74ABT833 D
74ABT833 DB
74ABT833 PW
74ABT833 N
74ABT833 D
24-Pin plastic SO
SOT137-1
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
74ABT833 DB
74ABT833PW DH
SOT340-1
SOT355-1
PIN CONFIGURATION
PIN DESCRIPTION
SYMBOL
PIN NUMBER
NAME AND FUNCTION
OEA
A0
1
2
3
4
5
24
V
2, 3, 4, 5,
6, 7, 8, 9
CC
A0 – A7
A port 3-State inputs/outputs
23
22
21
20
B0
B1
B2
B3
23, 22, 21, 20,
19, 18, 17, 16
B0 – B7
OEA
B port 3-State inputs/outputs
A1
A2
Enables the A outputs when
Low
1
A3
Enables the B outputs when
Low
6
7
8
9
19 B4
18 B5
A4
A5
OEB
14
PARITY
ERROR
15
10
Parity output/input
A6
A7
17
16
15
14
B6
Error output (open collector)
B7
Clears the error flag register
when Low
CLEAR
11
ERROR 10
CLEAR 11
GND 12
PARITY
OEB
CP
13
12
24
Clock input
GND
Ground (0V)
13 CP
V
CC
Positive supply voltage
TOP VIEW
SA00212
2
1993 Jun 21
853–1619 10087
Philips Semiconductors
Product specification
Octal transceiver with parity generator/checker
(3-State)
74ABT833
LOGIC SYMBOL
2
3
4
5
6
7
8
9
A0 A1 A2 A3 A4 A5 A6 A7
OEB
14
1
15
10
PARITY
OEA
CLEAR
CP
11
13
ERROR
B0 B1 B2 B3 B4 B5 B6 B7
23 22 21 20 19 18 17 16
SA00213
FUNCTION TABLE
INPUTS
OUTPUTS
An
Σ of Highs
Bn + Parity
Σ of Highs
MODE
OEB
OEA
An
Bn
PARITY
A data to B bus and generate odd parity
output
Odd
Even
L
H
L
H
(output)
(input)
An
1
B data to A bus and check for parity error
H
H
L
(output)
X
X
X
Bn
Z
(input)
Z
(input)
Z
2
A bus and B bus disabled
H
A data to B bus and generate inverted
parity output
Odd
Even
H
L
L
L
(output)
(input)
An
NOTES:
1. Error checking is detailed in the Error Flag Function Table below.
2. When clocked, the error output is Low if the sum of A inputs is even or High if the sum of A inputs is odd.
ERROR FLAG FUNCTION TABLE
INPUTS
CP
Internal node
Point ”P”
Output
Bn + Parity
Σ of Highs
Pre–state
ERRORn–1
ERROR
OUTPUT
MODE
CLEAR
H
H
H
↑
↑
X
Odd
Even
X
H
L
X
H
X
L
H
L
L
Sample
Hold
H
L
↑
X
X
X
X
X
X
NC
H
Clear
X
H
L
X
NC
Z
=
=
=
=
=
=
=
High voltage level steady state
Low voltage level steady state
Don’t care
No change
High impedance ”off” state
Low-to-High clock transition
Not a Low-to-High clock transition
↑
↑
3
1993 Jun 21
Philips Semiconductors
Product specification
Octal transceiver with parity generator/checker
(3-State)
74ABT833
LOGIC DIAGRAM
8
8
A0 – A7
B0 – B7
8
OEB
OEA
PARITY
8
8
MUX
B
9–bit
Odd
Parity
Tree
}
}
9
”P”
A
Sel A/B
D
R
ERROR
CP
CLEAR
SA00214
1, 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
–0.5 to +7.0
–18
UNIT
V
V
CC
I
IK
DC input diode current
V < 0
I
mA
V
3
V
I
DC input voltage
–1.2 to +7.0
–50
I
DC output diode current
V
O
< 0
mA
V
OK
3
V
DC output voltage
output in Off or High state
output in Low state
–0.5 to +5.5
128
OUT
OUT
I
DC output current
mA
°C
T
stg
Storage temperature range
–65 to 150
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
4
1993 Jun 21
Philips Semiconductors
Product specification
Octal transceiver with parity generator/checker
(3-State)
74ABT833
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
Min
4.5
0
Max
V
DC supply voltage
Input voltage
5.5
V
V
CC
V
V
CC
I
V
High-level input voltage
Low-level input voltage
2.0
V
IH
V
0.8
5.5
–32
64
V
IL
V
High-level output voltage, ERROR
High-level output current
V
OH
OH
I
mA
mA
ns/V
°C
I
OL
Low-level output current
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature range
0
5
T
amb
–40
+85
DC ELECTRICAL CHARACTERISTICS
LIMITS
T
= –40°C
to +85°C
amb
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25°C
UNIT
Min
Typ
Max
Min
Max
V
Input clamp voltage
V
V
V
V
= 4.5V; I = –18mA
–0.9
–1.2
–1.2
V
µA
V
IK
CC
CC
CC
CC
IK
High-level output current
ERROR ONLY
I
= 5.5V; V = 5.5V; V = V or V
IH
20
20
OH
OH
I
IL
= 4.5V; I = –3mA; V = V or V
2.5
3.0
2.0
3.5
4.0
2.5
3.0
2.0
OH
I
IL
IH
IH
High-level output voltage
All outputs except ERROR
V
OH
= 5.0V; I = –3mA; V = V or V
V
OH
I
IL
V
V
= 4.5V; I = –32mA; V = V or V
IH
2.6
V
V
CC
OH
I
IL
V
OL
Low-level output voltage
= 4.5V; I = 64mA; V = V or V
IH
0.42
0.55
0.55
CC
OL
I
IL
I
I
Input leakage Control pins
V
V
= 5.5V; V = GND or 5.5V
±0.01
±5
±1.0
±1.0
µA
µA
CC
I
current
Data pins
= 5.5V; V = GND or 5.5V
±100
±100
CC
I
I
Power-off leakage current
Power-up/down 3-State
V
= 0.0V; V or V ≤ 4.5V
±5.0
±5.0
±100
±50
±100
±50
V
V
OFF
CC
I
O
V
CC
V
OE
= 2.0V; or V = 0.5V; V = GND or V
CC
;
O
I
I
I
PU PD
3
output current
= Don’t care
I
+ I
+ I
3-State output High current
3-State output Low current
Output High leakage current
V
V
V
V
V
V
V
= 5.5V; V = 2.7V; V = V or V
5.0
–5.0
5.0
–80
50
50
–50
50
50
–50
50
µA
µA
µA
mA
µA
mA
IH
OZH
CC
CC
CC
CC
CC
CC
CC
O
I
IL
IH
IH
I
= 5.5V; V = 0.5V; V = V or V
O I IL
IL
OZL
I
= 5.5V; V = 5.5V; V = GND or V
O I CC
CEX
1
I
O
Output current
= 5.5V; V = 2.5V
–50
–180
250
30
–50
–180
250
30
O
I
= 5.5V; Outputs High, V = GND or V
CCH
I
CC
I
Quiescent supply current
= 5.5V; Outputs Low, V = GND or V
20
CCL
I
CC
= 5.5V; Outputs 3-State;
I
50
250
1.5
250
1.5
µA
CCZ
V = GND or V
I
CC
Additional supply current per
V
CC
= 5.5V; one input at 3.4V,
∆I
CC
0.3
mA
2
input pin
other inputs at V or GND
CC
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. This parameter is valid for any V between 0V and 2.1, with a transition time of up to 10msec. From V = 2.1V to V = 5V ± 10%, a
CC
CC
CC
transition of up to 100µsec is permitted. The ERROR output pin 10 is not included in this spec due to the open collector design.
5
1993 Jun 21
Philips Semiconductors
Product specification
Octal transceiver with parity generator/checker
(3-State)
74ABT833
AC CHARACTERISTICS
GND = 0V; t = t = 2.5ns; C = 50pF, R = 500Ω
R
F
L
L
LIMITS
Max
o
o
T
V
= +25 C
T
V
= –40 to +85 C
amb
CC
amb
CC
SYMBOL
PARAMETER
WAVEFORMS
UNIT
= +5.0V
= +5.0V ±10%
Min
Typ
Min
Max
t
t
Propagation delay
An to Bn or Bn to An
1.2
1.0
3.4
2.6
4.8
4.0
1.2
1.0
5.3
4.5
PLH
PHL
2
ns
ns
ns
ns
ns
ns
ns
t
t
Propagation delay
An to PARITY
1
2
2.1
2.5
7.4
7.4
9.5
9.7
2.1
2.5
11.2
11.0
PLH
PHL
t
t
Propagation delay
OEA to PARITY
1
2
2.6
3.1
6.6
6.7
8.5
8.6
2.6
3.1
10.5
10.0
PLH
PHL
Propagation delay
CLEAR to ERROR
t
5
1
1.0
2.5
2.9
4.2
4.4
5.7
1.0
2.5
5.2
6.2
PLH
Propagation delay
CP to ERROR
t
PHL
PZH
t
Output enable time
OEA to An or OEB to Bn, PARITY
3
4
1.0
2.1
3.2
4.1
5.1
5.8
1.0
2.1
6.2
6.7
t
PZL
t
Output disable time
OEA to An or OEB to Bn, PARITY
3
4
3.1
3.2
5.1
5.6
7.3
7.7
3.1
3.2
7.9
8.1
PHZ
t
PLZ
AC SETUP REQUIREMENTS
GND = 0V; t = t = 2.5ns; C = 50pF, R = 500Ω
R
F
L
L
LIMITS
o
o
T
V
= +25 C
= +5.0V
T
V
= –40 to +85 C
amb
CC
amb
CC
SYMBOL
PARAMETER
WAVEFORMS
UNIT
= +5.0V ±10%
Min
Typ
Min
t (H)
t (L)
s
Setup time, High or Low
Bn or PARITY to CP
9.8
8.1
6.9
4.0
9.8
8.1
s
6
6
6
5
5
ns
ns
ns
ns
ns
t (H)
Hold time, High or Low
Bn or PARITY to CP
0.0
0.0
–3.7
–6.7
0.0
0.0
h
t (L)
h
t (H)
Pulse width, High or Low
CP
3.0
3.0
1.5
1.0
3.0
3.0
w
t (L)
w
Pulse width, Low
CLEAR
t (L)
w
3.0
2.0
1.0
3.0
2.0
Recovery time
CLEAR to CP
t
–0.3
rec
6
1993 Jun 21
Philips Semiconductors
Product specification
Octal transceiver with parity generator/checker
(3-State)
74ABT833
AC WAVEFORMS
V
M
= 1.5V, V = GND to 3.0V
IN
INPUT
INPUT
V
V
V
V
M
M
M
M
t
t
t
t
PHL
PHL
PLH
PLH
V
V
OUTPUT
V
M
V
M
OUTPUT
M
M
SA00216
SA00217
Waveform 1. Propagation Delay For Inverting Output
Waveform 2. Propagation Delay For Non-Inverting Output
V
OEA, OEB
OUTPUT
V
M
M
t
V
OEA, OEB
OUTPUT
M
V
M
t
PHZ
PZH
t
t
PLZ
PZL
V
–0.3V
OH
V
M
V
M
V
+0.3V
0V
OL
0V
SA00238
SA00239
Waveform 3. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
Waveform 4. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
V
V
M
CLEAR
M
V
V
V
V
M
Bn,
M
M
M
PARITY
t
w
(L)
t
REC
t (H)
s
t (L)
s
t (H)
h
t (L)
h
t
w
(H)
t (L)
w
V
M
CP
CP
V
V
V
M
M
M
t
PLH
ERROR
V
M
NOTE: The shaded areas indicate when the input is permitted to change
for predictable output performance.
SA00205
NOTE: The shaded areas indicate when the input is permitted to change
Waveform 6. Data Setup and Hold Times and Clock Pulse Width
for predictable output performance.
SA00240
Waveform 5. CLEAR Pulse Width, CLEAR to ERROR Delay and
CLEAR to Clock Recovery Time
7
1993 Jun 21
Philips Semiconductors
Product specification
Octal transceiver with parity generator/checker
(3-State)
74ABT833
TYPICAL PROPAGATION DELAYS VERSUS LOAD FOR OPEN COLLECTOR OUTPUTS
18
16
14
12
t
PLH
10
8
6
4
t
PHL
2
0
0
100
200
300
400
500
600
Load resistor (Ω)
NOTE:
When using Open-Collector parts, the value of the pull–up resistor greatly affects the value of the t
. For example, changing the specified pull-up resistor value from
PLH
500Ω to 100Ω will improve the t
over 300% with only a slight change in the t
. However, if the value of the pull-up resistor is changed, the user must make certain
PHL
PLH
that the total I current through the resistor and the total I ’s of the receivers does not exceed the I maximum specification.
OL
IL
OL
SA00241
TEST CIRCUIT AND WAVEFORM
V
t
W
CC
AMP (V)
90%
90%
V
X
NEGATIVE
PULSE
V
V
M
M
10%
10%
90%
V
V
OUT
IN
R
R
X
L
0V
(t
PULSE
D.U.T
t
t
(t
(t
)
t
TLH
)
THL
F
R
GENERATOR
)
t
(t )
R
T
C
TLH
R
THL F
L
AMP (V)
90%
M
POSITIVE
PULSE
V
V
M
Test Circuit for 3-State Outputs
10%
10%
t
W
0V
SWITCH POSITION
LOAD VALUES
V
= 1.5V
M
TEST
SWITCH
closed
closed
open
OUTPUT
ERROR 100Ω
All other 500Ω 7.0V
R
V
X
X
Input Pulse Definition
t
PLZ
PZL
V
CC
t
All other
INPUT PULSE REQUIREMENTS
DEFINITIONS
R = Load resistor; see AC CHARACTERISTICS for value.
L
FAMILY
Amplitude
3.0V
Rep. Rate
1MHz
t
t
t
F
W
R
C = Load capacitance includes jig and probe capacitance;
L
74ABT
500ns 2.5ns 2.5ns
see AC CHARACTERISTICS for value.
R = Termination resistance should be equal to Z
T
of
OUT
pulse generators.
SA00242
8
1993 Jun 21
Philips Semiconductors
Product specification
Octal transceiver with parity generator/checker
(3-State)
74ABT833
DIP24: plastic dual in-line package; 24 leads (300 mil)
SOT222-1
SOT137-1
SOT340-1
SOT355-1
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
9
1993 Jun 21
Philips Semiconductors
Product specification
Octal transceiver with parity generator/checker
(3-State)
74ABT833
NOTES
10
1993 Jun 21
Philips Semiconductors
Product specification
Octal transceiver with parity generator/checker
(3-State)
74ABT833
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
Preproduction Product
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
Copyright Philips Electronics North America Corporation 1995
All rights reserved. Printed in U.S.A.
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