74ALVCH16501DGGS [NXP]
74ALVCH16501 - 18-bit universal bus transceiver; 3-state TSSOP 56-Pin;型号: | 74ALVCH16501DGGS |
厂家: | NXP |
描述: | 74ALVCH16501 - 18-bit universal bus transceiver; 3-state TSSOP 56-Pin 总线收发器 |
文件: | 总13页 (文件大小:90K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74ALVCH16501
18-bit universal bus transceiver (3-State)
Product specification
1998 Sep 29
Supersedes data of 1998 Aug 31
IC24 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16501
FEATURES
• Complies with JEDEC standard no. 8-1A.
DESCRIPTION
The 74ALVCH16501 is an 18-bit universal transceiver featuring
non-inverting 3-State bus compatible outputs in both send and
receive directions. Data flow in each direction is controlled by output
• CMOS low power consumption
• Direct interface with TTL levels
• Current drive ± 24 mA at 3.0 V
enable (OE and OE ), latch enable (LE and LE ), and clock
AB
BA
AB
BA
(CP and CP ) inputs. For A-to-B data flow, the device operates
AB
BA
in the transparent mode when LE is High. When LE is Low, the
A data is latched if CP is held at a High or Low logic level. If LE
is Low, the A-bus data is stored in the latch/flip-flop on the
Low-to-High transition of CP . When OE is High, the outputs are
AB
AB
AB
AB
• Universal bus transceiver with D-type latches and D-type flip-flops
capable of operating in transparent, latched or clocked mode.
AB
AB
active. When OE is Low, the outputs are in the high-impedance
state.
AB
• All inputs have bushold circuitry
• Output drive capability 50Ω transmission lines @ 85°C
• 3-State non-inverting outputs for bus oriented applications
Data flow for B-to-A is similar to that of A-to-B but uses OE , LE
BA
BA
and CP . The output enables are complimentary (OE is active
BA
AB
High, and OE is active Low).
BA
To ensure the high impedance state during power up or power
down, OE should be tied to V through a pullup resistor and
BA
CC
OE should be tied to GND through a pulldown resistor; the
AB
minimum value of the resistor is determined by the
current-sinking/current-sourcing capability of the driver.
Active bus hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
QUICK REFERENCE DATA
GND = 0V; T
= 25°C; t = t = 2.5ns
amb
r f
SYMBOL
PARAMETER
CONDITIONS
= 2.5V, C = 30pF
TYPICAL
UNIT
Propagation delay
An, Bn to Bn, An
V
CC
V
CC
2.8
3.0
t
/t
ns
L
PHL PLH
= 3.3V, C = 50pF
L
C
C
Input/output capacitance
Input capacitance
8.0
4.0
21
3
pF
pF
I/O
I
Outputs enabled
Outputs disabled
Power dissipation capacitance per
latch
1
C
V = GND to V
I CC
pF
PD
NOTES:
1. C is used to determine the dynamic power dissipation (P in µW):
PD
D
2
2
P
= C × V
× f + S (C × V
× f ) where: f = input frequency in MHz; C = output load capacitance in pF;
CC o i L
D
PD
CC
i
L
2
f = output frequency in MHz; V = supply voltage in V; S (C × V
o
× f ) = sum of outputs.
o
CC
L
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
DWG NUMBER
56-Pin Plastic TSSOP Type II
–40°C to +85°C
74ALVCH16501 DGG
SOT364-1
2
1998 Sep 29
853–2091 20106
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16501
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
Output enable A-to-B
Latch enable A-to-B
56 GND
OE
LE
1
2
3
1
2
OE
LE
AB
AB
55
54
53
52
CP
AB
AB
AB
3, 5, 6, 8, 9,
10, 12, 13, 14,
15, 16, 17, 19,
20, 21, 23, 24,
26
A0
A0
GND
A1
4
5
GND
B1
A0 to A17
Data inputs/outputs
51 B2
A2
6
7
8
9
4, 11, 18, 25,
29, 32, 39, 46,
53, 56
GND
Ground (0V)
50
49
48
V
CC
V
CC
A3
A4
B3
B4
7, 22, 35, 50
V
CC
Positive supply voltage
Output enable B-to-A
Latch enable B-to-A
Clock input B-to-A
27
28
30
OE
BA
47 B5
A5 10
GND 11
A6 12
LE
CP
BA
46 GND
45 B6
BA
54, 52, 51, 49,
48, 47, 45, 44,
43, 42, 41, 40,
38, 37, 36, 34,
33, 31
44
A7 13
B7
B0 to B17
Data inputs/outputs
Clock input A-to-B
43 B8
42 B9
41 B10
40 B11
A8 14
A9 15
55
CP
AB
A10 16
A11 17
GND 18
A12 19
A13 20
A14 21
LOGIC SYMBOL (IEEE/IEC)
39
38
GND
B12
B13
1
EN1
2C3
OE
AB
56
2
CP
AB
37
C3
LE
AB
36 B14
G2
27
35
34
V
CC
V
22
CC
EN4
OE
CP
BA
30
28
B15
B16
GND
5C6
A15 23
A16 24
GND 25
A17 26
BA
BA
C6
G5
LE
33
32
3
54
3D
1
1
1
A0
B0
31 B17
30
4
6D
CP
OE
27
28
BA
BA
5
6
52
51
49
B1
B2
B3
A1
A2
A3
29 GND
SW00089
LE
BA
8
9
48
47
A4
A5
B4
B5
10
12
13
14
45
44
43
A6
A7
A8
B6
B7
B8
15
42
A9
B9
16
17
41
40
A10
A11
B10
B11
19
20
38
37
A12
A13
B12
B13
21
23
24
26
36
34
33
31
A14
A15
A16
A17
B14
B15
B16
B17
SW00088
3
1998 Sep 29
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16501
LOGIC SYMBOL
BUS HOLD CIRCUIT
3
5
A0
B0
B1
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
V
CC
A1
6
A2
B2
8
A3
B3
9
A4
B4
10
12
13
14
15
16
17
19
20
21
23
24
26
A5
B5
A6
B6
A7
B7
A8
B8
Data Input
To internal circuit
A9
B9
A10
A11
A12
A13
A14
A15
A16
A17
B10
B11
B12
B13
B14
B15
B16
B17
SW00044
OE
OE
1
27
AB
BA
LE
LE
2
28
30
AB
BA
CP
CP
BA
55
AB
SW00087
LOGIC DIAGRAM (one section)
OE
CP
AB
BA
BA
LE
CP
AB
LE
AB
OE
BA
C1
1D
C1
B1
A1
1D
C1
1D
C1
1D
18 IDENTICAL CHANNELS
SW00091
4
1998 Sep 29
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16501
FUNCTION TABLE
OPERATING MODE
INPUTS
OUTPUTS
OEAB
LEAB
CPAB
An
X
H
L
Bn
Z
L
X
H
H
↓
X
Disabled
H
H
H
H
H
H
H
H
X
H
L
Transparent
X
X
h
H
L
Latch data & display
Clock data & display
Hold data & display
↓
X
↑
I
L
L
L
L
h
H
L
↑
I
H or L
H or L
X
X
H
L
NOTE: A-to-B data flow is shown; B-to-A flow is similar but uses OEBA, LEBA, and CPBA.
H = High voltage level
h
L
I
= High voltage level one set-up time prior to the Enable or Clock transition
= Low voltage level
= Low voltage level one set-up time prior to the Enable or Clock transition
NC= No Change
X
Z
↓
= Don’t care
= High Impedance ”off” state
= High-to-Low Enable or Clock transition
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
CONDITIONS
UNIT
MIN
MAX
DC supply voltage 2.5V range (for max. speed
performance @ 30 pF output load)
2.3
3.0
2.7
V
CC
V
DC supply voltage 3.3V range (for max. speed
performance @ 50 pF output load)
3.6
V
DC Input voltage range
0
0
V
V
V
V
I
CC
V
O
DC output voltage range
CC
T
amb
Operating free-air temperature range
–40
+85
°C
V
CC
V
CC
= 2.3 to 3.0V
= 3.0 to 3.6V
0
0
20
10
t , t
r
Input rise and fall times
ns/V
f
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
–0.5 to +4.6
–50
UNIT
V
V
CC
I
IK
DC input diode current
V t0
I
mA
1
For control pins
–0.5 to +4.6
V
DC input voltage
V
I
1
For data inputs
uV or V t 0
–0.5 to V +0.5
CC
I
DC output diode current
DC output voltage
V
O
"50
mA
V
OK
CC
O
V
O
Note 1
= 0 to V
CC
–0.5 to V +0.5
CC
I
O
DC output source or sink current
V
O
"50
"100
mA
mA
°C
I
, I
DC V or GND current
GND CC
CC
T
stg
Storage temperature range
–65 to +150
Power dissipation per package
–plastic thin-medium-shrink (TSSOP)
For temperature range: –40 to +125 °C
above +55°C derate linearly with 8 mW/K
P
TOT
mW
600
NOTE:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
5
1998 Sep 29
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16501
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
UNIT
1
MIN
1.7
TYP
1.2
1.5
1.2
1.5
MAX
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.3 to 2.7V
V
HIGH level Input voltage
LOW level Input voltage
V
V
IH
= 2.7 to 3.6V
= 2.3 to 2.7V
= 2.7 to 3.6V
2.0
0.7
0.8
V
IL
= 2.3 to 3.6V; V = V or V ; I = –100µA
V
*0.2
V
CC
I
IH
IL
O
CC
= 2.3V; V = V or V ; I = –6mA
V
V
V
V
V
0.3
0.6
0.5
0.6
V
V
V
V
V
0.08
0.26
0.14
0.09
0.28
*
*
*
*
*
I
IH
IL
O
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 2.3V; V = V or V ; I = –12mA
*
*
*
*
I
IH
IL
O
V
OH
HIGH level output voltage
V
= 2.7V; V = V or V ; I = –12mA
I
IH
IL
O
= 3.0V; V = V or V ; I = –12mA
I
IH
IL
O
= 3.0V; V = V or V
I
= –24mA
*1.0
CC
I
IH
IL; O
= 2.3 to 3.6V; V = V or V ; I = 100µA
GND
0.07
0.15
0.14
0.27
0.20
0.40
0.70
0.40
0.55
V
V
I
IH
IL
O
= 2.3V; V = V or V ; I = 6mA
I
IH
IL
O
= 2.3V; V = V or V ; I = 12mA
V
OL
LOW level output voltage
I
IH
IL
O
= 2.7V; V = V or V ; I = 12mA
V
I
IH
IL
O
= 3.0V; V = V or V
I = 24mA
IL; O
I
IH
V
= 2.3 to 3.6V;
CC
CC
I
Input leakage current
0.1
0.1
5
µA
µA
I
V = V or GND
I
V
V
= 2.7 to 3.6V; V = V or V ;
I IH IL
CC
O
I
3-State output OFF-state current
10
OZ
= V or GND
CC
I
Quiescent supply current
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.3 to 3.6V; V = V or GND; I = 0
0.2
150
–
40
µA
µA
CC
I
CC
O
∆I
Additional quiescent supply current
= 2.3V to 3.6V; V = V – 0.6V; I = 0
750
CC
I
CC
O
2
= 2.3V; V = 0.7V
45
I
I
Bus hold LOW sustaining current
Bus hold HIGH sustaining current
µA
µA
BHL
2
2
2
= 3.0V; V = 0.8V
75
–45
–75
500
–500
150
I
= 2.3V; V = 1.7V
I
I
BHH
= 3.0V; V = 2.0V
–175
I
2
I
Bus hold LOW overdrive current
Bus hold HIGH overdrive current
= 3.6V
µA
µA
BHLO
2
I
= 3.6V
BHHO
NOTES:
1. All typical values are at T
= 25°C.
amb
2. Valid for data inputs of bus hold parts.
6
1998 Sep 29
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16501
AC CHARACTERISTICS FOR V = 2.3V TO 2.7V RANGE
CC
GND = 0V; t = t ≤ 2.0ns; C = 30pF
r
f
L
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 2.5V ± 0.2V
UNIT
1
MIN
TYP
MAX
Propagation delay
An, Bn to Bn, An
1.0
2.8
3.5
3.3
2.8
2.5
2.5
2.5
0.8
2.0
0.1
0.1
0.3
5.1
Propagation delay
t
/t
1, 2
ns
1.1
1.0
1.3
1.0
1.3
1.5
3.3
3.3
1.7
1.1
1.7
6.1
6.1
6.3
5.8
5.3
6.2
–
PHL PLH
LE
AB,
LE to Bn, An
BA
Propagation delay
CP CP to Bn, An
AB,
BA
3-State output enable time
OE to An
BA
t
t
/t
3
3
2
4
4
ns
ns
ns
ns
PZH PZL
3-State output enable time
OE to Bn
AB
3-State output enable time
OE to An
BA
/t
PHZ PLZ
3-State output enable time
OE to Bn
AB
Pulse width HIGH
LE , LE
AB
BA
t
W
Pulse width HIGH or LOW
CP , CP
–
AB
BA
Set-up time
–
An Bn to CP , CP
,
AB
BA
t
SU
Set-up time
An, Bn to LE
–
LE
AB,
BA
Hold time
–
An, Bn to CP , CP
AB
BA
t
h
ns
Hold time
1.6
0.3
–
–
An, Bn to LE , LE
AB
BA
f
Maximum clock frequency
150
333
MHz
MAX
NOTE:
1. All typical values are at V = 2.5V and T
= 25°C.
amb
CC
7
1998 Sep 29
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16501
AC CHARACTERISTICS FOR V = 3.0V TO 3.6V RANGE AND V = 2.7V
CC
CC
GND = 0V; t = t = 2.5ns; C = 50pF
r
f
L
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 3.3V ±0.3V
V
CC
= 2.7V
UNIT
1
MIN
TYP
MAX
4.2
MIN
TYP
MAX
Propagation delay
An, Bn to Bn, An
1.0
3.0
3.0
3.6
3.4
3.3
2.7
3.3
3.6
0.7
1.4
4.6
Propagation delay
t
/t
1, 2
ns
1.3
1.4
1.1
1.0
1.3
1.4
3.3
3.3
1.3
1.0
1.3
3.4
3.3
2.5
2.4
3.1
2.9
0.9
1.1
–0.3
0.3
0.4
4.8
4.9
5.0
4.6
4.2
5.0
5.3
5.6
6.0
5.3
4.6
5.7
PHL PLH
LE , LE to Bn, An
AB
BA
Propagation delay
CP , CP to Bn, An
AB
BA
3-State output enable time
OE to An
BA
t
t
/t
3
3
2
4
4
ns
ns
ns
ns
PZH PZL
3-State output enable time
OE to Bn
AB
3-State output disable time
OE to An
BA
/t
PHZ PLZ
3-State output disable tiime
OE to Bn
AB
LE pulse width
3.3
3.3
1.4
1.0
1.6
LE , LE to CP , CP
AB
BA
AB
BA
t
W
LE pulse width HIGH or LOW
CP , CP
AB
BA
Set-up time
–0.1
–0.2
0.3
An, Bn to CP , CP
AB
BA
t
SU
Set-up time
An, Bn to LE , LE
AB
BA
Hold time
An, Bn to CP , CP
AB
BA
t
h
ns
Hold time
1.2
0.1
1.5
0.1
An, Bn to LE , LE
AB
BA
f
Maximum clock frequency
150
340
150
333
MHz
MAX
NOTE:
1. All typical values are at V = 3.3V and T
= 25°C.
amb
CC
8
1998 Sep 29
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16501
AC WAVEFORMS
V
CC
= 2.3 TO 2.7 V RANGE
1. V = 0.5 V
M
OE
INPUT
AB
2. V = V + 0.15V
X
OL
3. V = V – 0.15V
Y
OH
V
V
M
M
4. V = V
OE
BA
INPUT
I
CC
5. V and V are the typical output voltage drop that occur with
OL
OH
the output load.
V
= 3.0 TO 3.6 V RANGE AND V = 2.7 V
M
CC
CC
t
t
PZL
PLZ
1. V = 1.5 V
2. V = V + 0.3V
V
CC
X
OL
3. V = V – 0.3V
OUTPUT
LOW-to-OFF
OFF-to-LOW
Y
OH
V
4. V = 2.7 V
M
I
5. V and V are the typical output voltage drop that occur with
OL
OH
V
X
the output load.
V
OL
t
t
PZH
PHZ
V
I
V
OH
An, Bn
INPUT
V
M
V
OUTPUT
Y
V
HIGH-to-OFF
OFF-to-HIGH
M
GND
GND
t
t
PLH
PHL
outputs
enabled
outputs
disabled
outputs
enabled
V
OH
Bn, An
OUTPUT
SW00085
V
M
Waveform 3. 3-State enable and disable times
V
OL
V
SW00083
I
An, Bn
INPUT
Waveform 1. Input (An, Bn) to output (Bn, An) propagation
delays
V
M
GND
t
h
t
h
t
t
SU
SU
V
I
1/f
max
V
I
CP , LE
XX
INPUT
XX
V
M
LE
INPUT
XX
V
GND
M
CP
XX
INPUT
NOTE: The unshaded areas indicate when the input is permitted to change for
predictable output performance.
GND
t
W
t
PHL
t
SW00093
PLH
V
OH
Waveform 4. Data set-up and hold times for the An and Bn
inputs to the LE , LE , CP and CP inputs
An, Bn
OUTPUT
V
M
AB
BA
AB
BA
V
OL
SW00092
Waveform 2. Latch enable input (LE , LE ) and clock pulse
AB
BA
input (CP , CP ) to output propagation delays and their
AB
BA
pulse width
9
1998 Sep 29
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16501
TEST CIRCUIT
S
1
2 * V
V
CC
CC
Open
GND
R
R
= 500 Ω
= 500 Ω
L
L
V
V
O
I
PULSE
GENERATOR
D.U.T.
R
T
C
L
Test Circuit for switching times
DEFINITIONS
R
L
C
L
R
T
= Load resistor
= Load capacitance includes jig and probe capacitance
= Termination resistance should be equal to Z of pulse generators.
OUT
SWITCH POSITION
TEST
S
V
V
I
1
CC
t
t
Open
< 2.7V
V
CC
PLH/ PHL
t
t
t
2.7–3.6V
2.7V
PLZ/ PZL
2 < V
CC
t
GND
PHZ/ PZH
SV00906
Figure 5. Load circuitry for switching times
10
1998 Sep 29
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16501
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm
SOT364-1
11
1998 Sep 29
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16501
NOTES
12
1998 Sep 29
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16501
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
Preproduction Product
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Date of release: 06-98
Document order number:
9397–750–04801
Philips
Semiconductors
相关型号:
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