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74ALVCH16601DGG-T [NXP]

IC ALVC/VCX/A SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, 6.10 MM, PLASTIC, MO-153EE, SOT-364, TSSOP2-56, Bus Driver/Transceiver;
74ALVCH16601DGG-T
型号： 74ALVCH16601DGG-T
厂家： NXP    NXP
描述：

IC ALVC/VCX/A SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, 6.10 MM, PLASTIC, MO-153EE, SOT-364, TSSOP2-56, Bus Driver/Transceiver

光电二极管 输出元件 逻辑集成电路
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Philips Semiconductors; 74ALVCH16601; 18-bit universal bus transceiver (3-State)  
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74ALVCH16601; 18-bit  
universal bus transceiver  
(3-State)  
18-bit universal bus  
transceiver (3-State)  
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Description  
The 74ALVCH16601 is an 18-bit universal transceiver featuring non-inverting 3-State bus compatible outputs in both send and  
receive directions. Data flow in each direction is controlled by output enable (OE and OE )latch enable (LE and LE  
)
BA  
AB  
BA  
AB  
, and clock (CP and CP ) inputs. For A-to-B data flowthe device operates in the transparent mode when LE is High.  
AB  
BA  
AB  
When LE is Low, the A data is latched if CP is held at a High or Low logic level. If LE is Low, the A-bus data is  
AB  
AB  
AB  
stored in the latch/flip-flop on the Low-to-High transition of CP . When OE is Low, the outputs are active. When OE is  
AB  
AB  
AB  
High, the outputs are in the high-impedance state. The clocks can be controlled with the clock-enable inputs (CE /CE ).  
BA  
AB  
Data flow for B-to-A is similar to that of A-to-B but uses OE LE and CP .  
BA  
BA  
BA  
To ensure the high impedance state during power up or power down, OE and OE should be tied to V through a pullup  
BA  
AB  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
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Philips Semiconductors; 74ALVCH16601; 18-bit universal bus transceiver (3-State)  
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Features  
● Complies with JEDEC standard no. 8-1A  
● CMOS low power consumption  
● Direct interface with TTL levels  
● MULTIBYTE flow-through standard pin-out architecture  
● Low inductance multiple V and ground pins for minimum noise and ground bounce  
CC  
● Current drive ± 24 mA at 3.0 V  
● All inputs have bus hold circuitry  
● Output drive capability 50Ω transmission lines @ 85°C  
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Ground And VCC Bounce Of High-Speed Integrated Circuits (date 01-Jan-93)  
Interfacing 3 Volt and 5 Volt Applications  
Live Insertion Aspects of Philips Logic Families (date 22-Jul-99)  
Hardware and software verification procedure (date 07-Oct-98)  
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74ALVCH16601 18-bit universal bus 24-Sep-98  
Product Specification 12  
96  
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transceiver  
(3-State)  
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Standard Marking SOT364-1  
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74ALVCH16601DGG 74ALVCH16601DG  
9352 625 46112  
(TSSOP56)  
* Tube  
Standard Marking  
74ALVCH16601DG-T 9352 625 46118 * Reel Pack,  
SMD, 13"  
SOT364-1  
(TSSOP56)  
order this  
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CMOS 16-bit microcontroller family(date 01-May-98)  
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