74AVCH16244DGG [NXP]
16-bit buffer/line driver; 3.6 V tolerant; 3-state; 16位缓冲器/线路驱动器; 3.6 V电压;三态
| 型号： | 74AVCH16244DGG |
| 厂家： | 
NXP |
| 描述： | 16-bit buffer/line driver; 3.6 V tolerant; 3-state |
| 文件： | 总16页 (文件大小：84K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74AVCH16244
16-bit buffer/line driver;
3.6 V tolerant; 3-state
Product Specification
2000 Mar 07
File under Integrated Circuits, IC24
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
FEATURES
DESCRIPTION
• Wide supply voltage range from 1.2 to 3.6 V
• Complies with JEDEC standard no. 8-1A/5/7
• CMOS low power consumption
The 74AVCH16244 is a 16-bit non-inverting buffer/line
driver with 3-state outputs. The device can be used as four
4-bit buffers, two 8-bit buffers or one 16-bit buffer.
The 3-state outputs are controlled by the output enable
inputs nOE. A HIGH on nOE causes the outputs to assume
a high impedance OFF-state.
• Input/output tolerant up to 3.6 V
• Dynamic Controlled Output (DCO) circuit dynamically
changes the output impedance, resulting in noise
reduction without speed degradation
The 74AVCH16244 is designed to have an extremely fast
propagation delay and a minimum amount of power
consumption.
• Low inductance multiple VCC and GND pins to minimize
noise and ground bounce
To ensure the high-impedance output state during
power-up or power-down, nOE should be tied to VCC
through a pull-up resistor (Live Insertion).
• Supports Live Insertion
• All data inputs have bus-hold.
A Dynamic Controlled Output (DCO) circuitry is
implemented to support termination line drive during
transient (see Figs 1 and 2).
The 74AVCH16244 has active bus-hold circuitry to hold
unused or floating data inputs at a valid logic level. This
feature eliminates the need for external pull-up or
pull-down resistors.
MNA506
MNA507
0
300
handbook, halfpage
handbook, halfpage
I
I
OH
OL
(mA)
(mA)
3.3 V
1.8 V
−100
200
2.5 V
2.5 V
−200
100
1.8 V
3.3 V
−300
0
0
1
2
3
4
0
1
2
3
4
V
(V)
V
(V)
OH
OL
Fig.1 Output voltage as a function of the
HIGH-level output current.
Fig.2 Output voltage as a function of the
LOW-level output current.
2000 Mar 07
2
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.0 ns.
SYMBOL
tPHL/tPLH
PARAMETER
CONDITIONS
VCC = 1.2 V
TYP.
UNIT
propagation delay nAn to nYn
5.2
2.9
2.1
1.5
1.3
5.0
ns
ns
ns
ns
ns
pF
V
CC = 1.5 V
CC = 1.8 V
V
VCC = 2.5 V
CC = 3.3 V
V
CI
input capacitance
CPD
power dissipation capacitance per buffer notes 1 and 2
outputs enabled
outputs disabled
34
1
pF
pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
∑ (CL × VCC2 × fo) = sum of outputs.
2. The condition is VI = GND to VCC
.
FUNCTION TABLE
See note 1.
INPUTS
nOE
OUTPUTS
nYn
nAn
L
L
L
H
X
L
H
Z
H
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high impedance OFF-state.
2000 Mar 07
3
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
ORDERING AND PACKAGE INFORMATION
PACKAGE
PACKAGE
TSSOP
TYPE NUMBER
TEMPERATURE RANGE
PINS
MATERIAL
plastic
CODE
74AVCH16244DGG
−40 to +85 °C
48
SOT362-1
PINNING
PIN
SYMBOL
DESCRIPTION
1
1OE
output enable input (active LOW)
data outputs
2, 3, 5 and 6
4, 10, 15, 21, 28, 34, 39 and 45
7, 18, 31 and 42
8, 9, 11 and 12
13, 14, 16 and 17
19, 20, 22 and 23
24
1Y0 to 1Y3
GND
ground (0 V)
VCC
positive supply voltage
data outputs
2Y0 to 2Y3
3Y0 to 3Y3
4Y0 to 4Y3
4OE
data outputs
data outputs
output enable input (active LOW)
output enable input (active LOW)
data inputs
25
3OE
26, 27, 29 and 30
32, 33, 35 and 36
37, 38, 40 and 41
43, 44, 46 and 47
48
4A3 to 4A0
3A3 to 3A0
2A3 to 2A0
1A3 to 1A0
2OE
data inputs
data inputs
data inputs
output enable input (active LOW)
2000 Mar 07
4
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
handbook, halfpage
nY
0
nA
nA
nA
nA
0
1
2
3
handbook, halfpage
nY
1
1OE
2OE
1
2
3
4
5
6
7
8
9
48
47
46
1Y
0
1A
0
nY
2
1Y
1
1A
1
GND
45 GND
nY
3
1Y
2
1A
1A
V
44
43
42
41
40
2
3
1Y
3
nOE
MNA502
V
CC
CC
2Y
0
2A
0
1
2Y
1
2A
Fig.4 Logic symbol.
GND 10
39 GND
2Y
2Y
3Y
3Y
2A
2A
3A
3A
11
12
13
14
38
37
36
35
2
3
0
1
2
3
0
1
16244
1
48
25
24
handbook, halfpage
1EN
2EN
3EN
4EN
GND 15
34 GND
3Y
3Y
3A
3A
V
16
17
18
19
20
33
32
31
30
29
2
3
2
3
2
3
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
1
1
1
1
1
2
3
4
V
CC
CC
5
4Y
4A
6
0
1
0
1
8
4Y
4A
9
GND 21
28 GND
11
12
13
14
16
17
19
20
22
23
4Y
4Y
4A
4A
22
23
27
26
25
2
3
2
3
3OE
4OE 24
MNA501
MNA503
Fig.3 Pin configuration.
Fig.5 IEEE/IEC logic symbol.
2000 Mar 07
5
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
MIN.
1.4
MAX.
1.6
UNIT
VCC
according to JEDEC Low
Voltage Standards
V
V
V
V
V
V
V
V
°C
1.65
2.3
3.0
1.2
0
1.95
2.7
3.6
3.6
3.6
3.6
VCC
+85
40
for low-voltage applications
VI
DC input voltage
DC output voltage
VO
output 3-state
0
output HIGH or LOW state
in free air
0
Tamb
tr, tf
operating ambient temperature
input rise and fall ratios
−40
0
VCC = 1.4 to 1.6 V
ns/V
ns/V
ns/V
ns/V
V
V
V
CC = 1.65 to 2.3 V
CC = 2.3 to 3.0 V
CC = 3.0 to 3.6 V
0
30
0
20
0
10
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
MIN.
−0.5
MAX.
+4.6
UNIT
VCC
IIK
V
DC input diode current
DC input voltage
VI < 0
−
−50
mA
V
VI
for inputs; note 1
VO < 0
−0.5
−
+4.6
IOK
VO
DC output clamping diode current
DC output voltage
−50
mA
V
output HIGH or LOW state;
note 1
−0.5
VCC + 0.5
output 3-state; note 1
VO = 0 to VCC
−0.5
−
+4.6
50
V
IO
DC output sink current
DC VCC or GND current
storage temperature
mA
mA
°C
ICC, IGND
Tstg
−
±100
+150
500
−65
−
PD
power dissipation per package
for temperature range:
mW
−40 to +85 °C; note 2
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 60 °C the value of PD derates linearly with 5.5 mW/K.
2000 Mar 07
6
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
DC CHARACTERISTICS
Over recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
Tamb = −40 to +85 °C
TYP.(1)
MAX.
SYMBOL
PARAMETER
UNIT
OTHER
VCC (V)
MIN.
VCC
0.65 × VCC 0.9
VIH
HIGH-level input
voltage
1.2
−
−
−
−
−
−
V
V
V
V
V
V
V
V
V
V
1.4 to 1.6
1.65 to 1.95 0.65 × VCC 0.9
2.3 to 2.7
3.0 to 3.6
1.2
1.7
2.0
−
1.2
1.5
−
VIL
LOW-level input
voltage
GND
1.4 to 1.6
1.65 to 1.95
2.3 to 2.7
3.0 to 3.6
−
0.9
0.9
1.2
1.5
0.35 × VCC
0.35 × VCC
0.7
−
−
−
0.8
VOH
HIGH-level
output voltage
VI = VIH or VIL
IO = −100 µA
IO = −3 mA
IO = −4 mA
IO = −8 mA
IO = −12 mA
VI = VIH or VIL
IO = 100 µA
IO = 3 mA
1.65 to 3.6
1.4
V
V
V
V
V
CC − 0.20 VCC
−
−
−
−
−
V
V
V
V
V
CC − 0.35
CC − 0.45
CC − 0.55
CC − 0.70
VCC − 0.21
VCC − 0.25
VCC − 0.37
VCC − 0.47
1.65
2.3
3.0
VOL
LOW-level
output voltage
1.65 to 3.6
1.4
−
−
−
−
−
−
GND
0.22
0.24
0.38
0.53
0.1
0.20
0.35
0.45
0.55
0.70
2.5
V
V
IO = 4 mA
1.65
V
IO = 8 mA
2.3
V
IO = 12 mA
VI = VCC or GND
3.0
V
II
input leakage
current per pin
1.4 to 3.6
µA
Ioff
power-off
leakage current
VI or VO = 3.6 V
0
−
−
0.1
0.1
±10
µA
µA
IIHZ/IILZ
input current for VI = VCC or GND
1.4 to 3.6
12.5
common I/O
pins
IOZ
3-state output
OFF-state
current
VI = VIH or VIL;
VO = VCC or GND
1.4 to 2.7
3.0 to 3.6
−
−
0.1
0.1
5
µA
µA
10
ICC
quiescent
supply current
VI = VCC or GND; IO = 0 1.4 to 2.7
3.0 to 3.6
−
−
0.1
0.2
−
20
40
−
µA
µA
µA
µA
µA
IBHL
bus-hold LOW
sustaining
current
VI = 0.35 × VCC
VI = 0.7 V
1.65
2.3
25
45
75
−
−
VI = 0.8 V
3.0
−
−
2000 Mar 07
7
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
TEST CONDITIONS
T
amb = −40 to +85 °C
SYMBOL
PARAMETER
UNIT
OTHER
VCC (V)
1.65
MIN.
TYP.(1)
MAX.
IBHH
bus-hold HIGH
sustaining
current
VI = 0.65 × VCC
−25
−45
−75
200
300
450
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
µA
µA
µA
µA
µA
µA
µA
µA
µA
2.3
3.0
1.95
2.7
3.6
1.95
2.7
3.6
IBHLO
bus-hold LOW
overdrive
current
IBHHO
bus-hold HIGH
overdrive
current
−200
−300
−450
Note
1. All typical values are measured at Tamb = 25 °C.
AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.0 ns.
TEST CONDITIONS
WAVEFORMS
Tamb = −40 to +85 °C
SYMBOL
PARAMETER
UNIT
V
CC (V)
MIN.
TYP.(1)
MAX.
t
PHL/tPLH
PZH/tPZL
PHZ/tPLZ
propagation
delay;
nAn to nYn
see Figs 6 and 8
see Figs 7 and 8
see Figs 7 and 8
1.2
1.40 to 1.60
−
−
5.2
2.9
2.1
1.5
1.3
5.7
4.0
3.3
2.2
1.9
5.9
4.2
3.7
1.9
2.2
−
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
−
1.65 to 1.95 0.8
3.4
2.2
2.0
−
2.3 to 2.7
3.0 to 3.6
1.2
0.7
0.6
−
t
t
3-state output
enable time;
nOE to nYn
1.40 to 1.60
−
−
1.65 to 1.95 1.3
6.8
4.0
3.5
−
2.3 to 2.7
3.0 to 3.6
1.2
0.9
0.7
−
3-state output
disable time;
nOE to nYn
1.40 to 1.60
−
−
1.65 to 1.95 1.6
6.2
4.3
3.5
2.3 to 2.7
3.0 to 3.6
1.0
1.1
Note
1. All typical values are measured at Tamb = 25 °C and at VCC respectively 1.2, 1.5, 1.8, 2.5 and 3.3 V.
2000 Mar 07
8
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
AC WAVEFORMS
V
handbook, halfpage
I
nA input
n
V
M
GND
t
t
PLH
PHL
V
OH
nY output
V
n
M
MNA504
V
OL
VCC
≤2.3 to 2.7 V 0.5 × VCC
3.0 to 3.6 V 0.5 × VCC
VM
VI
VCC
VCC
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.6 The input (nAn) to output (nYn) propagation delay.
V
I
nOE input
V
M
GND
t
t
PZL
PLZ
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PZH
PHZ
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
MNA478
VCC
VM
VX
VY
VI
≤2.3 to 2.7 V 0.5 × VCC
3.0 to 3.6 V 0.5 × VCC
VOL + 0.15 V
VOL + 0.3 V
V
OH − 0.15 V VCC
OH − 0.3 V VCC
V
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.7 The 3-state enable and disable times.
9
2000 Mar 07
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
S1
2 × V
open
GND
CC
V
CC
R
R
load
V
I
V
O
PULSE
D.U.T.
GENERATOR
C
R
T
L
load
MNA505
VCC (V)
1.2
1.4 to 1.6
1.65 to 1.95 VCC
VI
VCC
VCC
Rload
CL
2000 Ω
2000 Ω
1000 Ω
500 Ω
15 pF
15 pF
30 pF
30 pF
30 pF
TEST
tPLH/tPHL open
PLZ/tPZL 2 × VCC
tPHZ/tPZH GND
S1
2.3 to 2.7
3.0 to 3.6
VCC
VCC
t
500 Ω
Fig.8 Load circuitry for switching times.
2000 Mar 07
10
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
PACKAGE OUTLINE
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
SOT362-1
E
D
A
X
c
H
v
M
A
y
E
Z
48
25
Q
A
2
(A )
3
A
A
1
pin 1 index
θ
L
p
L
detail X
1
24
w
M
b
e
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions).
A
(1)
(2)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
8o
0o
0.15
0.05
1.05
0.85
0.28
0.17
0.2
0.1
12.6
12.4
6.2
6.0
8.3
7.9
0.8
0.4
0.50
0.35
0.8
0.4
mm
1.2
0.25
0.5
1
0.25
0.08
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-02-10
99-12-27
SOT362-1
MO-153
2000 Mar 07
11
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
SOLDERING
If wave soldering is used the following conditions must be
observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Wave soldering
Manual soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2000 Mar 07
12
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
BGA, LFBGA, SQFP, TFBGA
WAVE
not suitable
REFLOW(1)
suitable
suitable
suitable
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS
PLCC(3), SO, SOJ
not suitable(2)
suitable
LQFP, QFP, TQFP
not recommended(3)(4) suitable
not recommended(5)
suitable
SSOP, TSSOP, VSO
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
2000 Mar 07
13
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
NOTES
2000 Mar 07
14
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
NOTES
2000 Mar 07
15
Philips Semiconductors – a worldwide company
Argentina: see South America
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Brazil: see South America
Philippines: Philips Semiconductors Philippines Inc.,
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Colombia: see South America
Czech Republic: see Austria
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Slovakia: see Austria
Slovenia: see Italy
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Hungary: see Austria
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Tel. +41 1 488 2741 Fax. +41 1 488 3263
Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874
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Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813
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TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421
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Uruguay: see South America
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Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Middle East: see Italy
Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors,
Internet: http://www.semiconductors.philips.com
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
69
SCA
© Philips Electronics N.V. 2000
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
245004/01/pp16
Date of release: 2000 Mar 07
Document order number: 9397 750 06759
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