74HC368U [NXP]
IC HC/UH SERIES, 6-BIT DRIVER, INVERTED OUTPUT, UUC, DIE, Bus Driver/Transceiver;型号: | 74HC368U |
厂家: | NXP |
描述: | IC HC/UH SERIES, 6-BIT DRIVER, INVERTED OUTPUT, UUC, DIE, Bus Driver/Transceiver 驱动 输出元件 |
文件: | 总7页 (文件大小:47K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT368
Hex buffer/line driver; 3-state;
inverting
December 1990
Product specification
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state; inverting
74HC/HCT368
The 74HC/HCT368 are hex inverting buffer/line drivers
with 3-state outputs. The 3-state outputs (nY) are
controlled by the output enable inputs (1OE, 2OE).
FEATURES
• Inverting outputs
• Output capability: bus driver
• ICC category: MSI
A HIGH on nOE causes the outputs to assume a high
impedance OFF-state.
The “368” is identical to the “367” but has inverting outputs.
GENERAL DESCRIPTION
The 74HC/HCT368 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
tPHL/ tPLH
PARAMETER
CONDITIONS
UNIT
HC
HCT
11
propagation delay nA to nY
input capacitance
CL = 15 pF; VCC = 5 V
9
ns
pF
pF
CI
3.5
30
3.5
30
CPD
power dissipation capacitance per buffer
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
2
PD = CPD × VCC2 × fi + ∑ (CL × VCC × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
2
∑ (CL × VCC × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC −1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state; inverting
74HC/HCT368
PIN DESCRIPTION
PIN NO.
SYMBOL
1OE, 2OE
1A to 6A
1Y to 6Y
GND
NAME AND FUNCTION
1, 15
output enable inputs (active LOW)
data inputs
2, 4, 6, 10, 12, 14
3, 5, 7, 9, 11, 13
data outputs
8
ground (0 V)
16
VCC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state; inverting
74HC/HCT368
FUNCTION TABLE
INPUTS
nOE
OUTPUTS
nY
nA
L
L
H
L
H
X
H
L
Z
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
Fig.4 Functional diagram.
Fig.5 Logic diagram.
December 1990
4
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state; inverting
74HC/HCT368
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL
PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
nA to nY
30
11
9
95
19
16
120
24
20
145
29
25
ns
ns
ns
ns
2.0 Fig.6
4.5
6.0
t
t
t
PZH/ tPZL 3-state output enable time
nOE to nY
41
15
12
150
30
26
190
38
33
225
45
38
2.0 Fig.7
4.5
6.0
PHZ/ tPLZ 3-state output disable time
nOE to nY
55
20
16
150
30
26
190
38
33
225
45
38
2.0 Fig.7
4.5
6.0
THL/ tTLH output transition time
14
5
4
60
12
10
75
15
13
90
18
15
2.0 Fig.6
4.5
6.0
December 1990
5
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state; inverting
74HC/HCT368
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
1OE
2OE
nA
1.00
0.90
1.00
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL
PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
nA to nY
13
17
20
5
24
35
35
12
30
44
44
15
36
53
53
18
ns
ns
ns
ns
4.5 Fig.6
4.5 Fig.7
4.5 Fig.7
4.5 Fig.6
tPZH/ tPZL 3-state output enable time
nOE to nY
t
PHZ/ tPLZ 3-state output disable time
nOE to nY
tTHL/ tTLH output transition time
December 1990
6
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state; inverting
74HC/HCT368
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC
.
HCT : VM = 1.3 V; VI = GND to 3 V.
Fig.6 Waveforms showing the input (nA) to output (nY) propagation delays and the output transition times.
(1) HC : VM = 50%; VI = GND to VCC
.
HCT : VM = 1.3 V; VI = GND to 3 V.
Fig.7 Waveforms showing the 3-state enable and disable times.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
7
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