74LV86PWDH-T [NXP]
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NXP 
INTEGRATED CIRCUITS
74LV86
Quad 2-input EXCLUSIVE-OR gate
Product specification
1998 Apr 20
Supersedes data of 1997 Feb 03
IC24 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-input EXCLUSIVE-OR gate
74LV86
FEATURES
• Wide Operating voltage: 1.0 to 5.5 V
• Optimized for low voltage applications: 1.0 to 3.6 V
• Accepts TTL input levels between V = 2.7 V and V = 3.6 V
DESCRIPTION
The 74LV86 is a low-voltage Si-gate CMOS device that is pin and
function compatible with 74HC/HCT86.
The 74LV86 provides the 2-input EXCLUSIVE-OR function.
CC
CC
• Typical V
(output ground bounce) < 0.8 V at V = 3.3 V,
OLP
= 25°C
CC
T
amb
• Typical V
(output V undershoot) > 2 V at V = 3.3 V,
OHV
= 25°C
OH
CC
T
amb
• Output capability: standard
• I category: SSI
CC
QUICK REFERENCE DATA
GND = 0 V; T
= 25°C; t = t ≤ 2.5 ns
amb
r f
SYMBOL
/t
PARAMETER
CONDITIONS
TYPICAL
UNIT
Propagation delay
nA, nB to nY
C = 15 pF;
L
CC
t
11
ns
PHL PLH
V
= 3.3 V
C
Input capacitance
3.5
30
pF
pF
I
1
C
Power dissipation capacitance per gate
V = GND to V
I CC
PD
NOTE:
1. C is used to determine the dynamic power dissipation (P in µW)
PD
D
2
2
P
= C × V
× f )ȍ (C × V
f ) where:
D
PD
CC
i
L
CC o
f = input frequency in MHz; C = output load capacitance in pF;
i
L
f = output frequency in MHz; V = supply voltage in V;
o
CC
2
ȍ (C × V
× f ) = sum of the outputs.
L
CC
o
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
74LV86 N
PKG. DWG. #
SOT27-1
14-Pin Plastic DIL
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
74LV86 N
74LV86 D
14-Pin Plastic SO
74LV86 D
SOT108-1
SOT337-1
SOT402-1
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
74LV86 DB
74LV86 PW
74LV86 DB
74LV86PW DH
PIN CONFIGURATION
LOGIC SYMBOL (IEEE/IEC)
1
= 1
3
6
8
1A
1B
1Y
2A
2B
2Y
1
14
V
CC
13 4B
2
2
4
3
4
5
6
7
12
11
10
9
4A
4Y
3B
3A
= 1
5
9
= 1
10
GND
8
3Y
12
= 1
11
SV00481
13
SV00479
2
1998 Apr 20
853–1892 19255
Philips Semiconductors
Product specification
Quad 2-input EXCLUSIVE-OR gate
74LV86
PIN DESCRIPTION
FUNCTION TABLE
PIN
NUMBER
INPUTS
OUTPUTS
nY
SYMBOL
FUNCTION
nA
nB
1, 4, 9, 12
1A – 4A Data inputs
L
L
L
H
L
L
H
H
2, 5, 10, 13 1B – 4B Data inputs
3, 6, 8, 11
1Y – 4Y Data outputs
GND Ground (0 V)
H
7
H
H
L
14
V
Positive supply voltage
CC
NOTES:
H = HIGH voltage level
= LOW voltage level
L
LOGIC SYMBOL
1
2
1A
1Y
2Y
3Y
3
6
8
LOGIC DIAGRAM (ONE GATE)
1B
4
5
2A
2B
A
9
3A
10 3B
Y
12 4A
13 4B
4Y 11
B
SV00478
SV00480
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
1.0
0
TYP.
MAX
UNIT
V
CC
DC supply voltage
See Note 1
3.3
5.5
V
V
V
V
I
Input voltage
V
CC
V
CC
V
O
Output voltage
0
See DC and AC
characteristics
–40
–40
+85
+125
T
Operating ambient temperature range in free air
Input rise and fall times
°C
amb
V
V
V
V
= 1.0V to 2.0 V
= 2.0V to 2.7 V
= 2.7V to 3.6 V
= 3.6V to 5.5 V
500
200
100
50
CC
CC
CC
CC
t , t
r
ns/V
f
NOTE:
1. The LV is guaranteed to function down to V = 1.0V (input levels GND or V ); DC characteristics are guaranteed from
CC
CC
V
CC
= 1.2V to V = 5.5 V.
CC
1, 2
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
–0.5 to +7.0
20
UNIT
V
V
CC
"I
DC input diode current
DC output diode current
V < –0.5 or V > V + 0.5V
mA
mA
IK
I
I
CC
"I
V
O
< –0.5 or V > V + 0.5V
50
OK
O
CC
DC output source or sink current
– standard outputs
"I
–0.5V < V < V + 0.5V
mA
O
O
CC
25
DC V or GND current for types with
– standard outputs
CC
"I
"I
,
mA
GND
50
CC
T
stg
Storage temperature range
–65 to +150
°C
Power dissipation per package
– plastic DIL
– plastic mini-pack (SO)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
P
TOT
mW
– plastic shrink mini-pack (SSOP and TSSOP)
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
3
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input EXCLUSIVE-OR gate
74LV86
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
LIMITS
MAX
-40°C to +85°C
-40°C to +125°C
SYMBOL
PARAMETER
TEST CONDITIONS
= 1.2 V
UNIT
1
MIN
0.9
TYP
MIN
0.9
MAX
V
V
V
V
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 2.0 V
1.4
1.4
HIGH level Input
voltage
V
IH
V
= 2.7 to 3.6 V
= 4.5 to 5.5 V
= 1.2 V
2.0
2.0
0.7<V
0.7<V
CC
CC
0.3
0.6
0.8
0.3
0.6
0.8
= 2.0 V
LOW level Input
voltage
V
IL
V
= 2.7 to 3.6 V
= 4.5 to 5.5
0.3<V
0.3<V
CC
CC
= 1.2 V; V = V or V –I = 100µA
1.2
2.0
2.7
3.0
4.5
I
IH
IL;
O
= 2.0 V; V = V or V –I = 100µA
1.8
2.5
2.8
4.3
1.8
2.5
2.8
4.3
I
IH
IL;
O
HIGH level output
voltage; all outputs
= 2.7 V; V = V or V –I = 100µA
V
V
V
V
V
V
I
IH
IL;
O
OH
= 3.0 V; V = V or V –I = 100µA
I
IH
IL;
O
= 4.5 V; V = V or V –I = 100µA
I
IH
IL;
O
HIGH level output
voltage;
STANDARD
V
V
= 3.0 V; V = V or V –I = 6mA
2.40
3.60
2.82
4.20
2.20
3.50
CC
I
IH
IL;
O
OH
= 4.5 V; V = V or V –I = 12mA
CC
I
IH
IL;
O
outputs
V
CC
V
CC
V
CC
V
CC
V
CC
= 1.2 V; V = V or V I
IL; O
= 100µA
= 100µA
= 100µA
= 100µA
= 100µA
0
0
0
0
0
I
IH
= 2.0 V; V = V or V
I
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
I
IH
IL; O
LOW level output
voltage; all outputs
= 2.7 V; V = V or V
I
V
V
I
IH
IL; O
OL
= 3.0 V; V = V or V I
IL; O
I
IH
= 4.5 V; V = V or V I
IL; O
I
IH
LOW level output
voltage;
STANDARD
V
CC
V
CC
V
CC
= 3.0 V; V = V or V I = 6mA
IL; O
0.25
0.35
0.40
0.55
1.0
0.50
0.65
1.0
I
IH
OL
= 4.5 V; V = V or V I = 12mA
IL; O
I
IH
outputs
Input leakage
current
I
I
= 5.5 V; V = V or GND
µA
µA
I
CC
Quiescent supply
current; SSI
I
V
= 5.5V; V = V or GND; I = 0
20.0
500
40
CC
CC
CC
I
CC
O
Additional
quiescent supply
current per input
∆I
CC
V
= 2.7 V to 3.6 V; V = V –0.6 V
850
µA
I
CC
NOTE:
1. All typical values are measured at T
= 25°C.
amb
AC CHARACTERISTICS
GND = 0V; t = t ≤ 2.5ns; C = 50pF; R = 1KΩ
r
f
L
L
LIMITS
MAX
CONDITION
–40 to +85 °C
–40 to +125 °C
SYMBOL
PARAMETER
WAVEFORM
UNIT
1
V
CC
(V)
MIN
TYP
70
MIN
MAX
1.2
2.0
2.7
24
32
24
19
16
41
30
24
20
Propagation delay
nA, nB to nY
18
t
t
Figure 1
ns
PHL/ PLH
2
3.0 to 3.6
4.5 to 5.5
13
NOTES:
1. Unless otherwise stated, all typical values are measured at T
= 25°C.
amb
2. Typical values are measured at V = 3.3 V.
CC
4
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input EXCLUSIVE-OR gate
74LV86
AC WAVEFORMS
TEST CIRCUIT
V
V
V
= 1.5 V at V ≥ 2.7 V and ≤ 3.6 V;
M
CC
V
cc
= 0.5 × V at V < 2.7 V and ≥ 4.5 V;
and V are the typical output voltage drop that occur with the
M
CC
CC
OL
OH
output load.
V
V
O
l
V
I
PULSE
GENERATOR
D.U.T.
nA, nB INPUT
GND
V
M
50pF
R = 1k
L
R
T
C
L
t
t
PLH
PHL
V
OH
Test Circuit for Outputs
nY OUTPUT
V
M
DEFINITIONS
V
OL
R
L
C
L
R
T
= Load resistor
SV00477
= Load capacitance includes jig and probe capacitiance
= Termination resistance should be equal to Z of pulse generators.
OUT
Figure 1. Input (nA, nB) to output (nY) propagation delays
and the output transition times.
TEST
V
V
I
CC
t
t
< 2.7V
2.7–3.6V
≥ 4.5 V
V
CC
PLH/ PHL
2.7V
V
CC
SV00902
Figure 2. Load circuitry for switching times.
5
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input EXCLUSIVE-OR gate
74LV86
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
6
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input EXCLUSIVE-OR gate
74LV86
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
7
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input EXCLUSIVE-OR gate
74LV86
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
8
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input EXCLUSIVE-OR gate
74LV86
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
9
1998 Apr 20
Philips Semiconductors
Product specification
Quad 2-input EXCLUSIVE-OR gate
74LV86
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 10-98
9397-750-04415
Document order number:
Philips
Semiconductors
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