74LVC1G66 [NXP]

Bilateral switch; 双向开关
74LVC1G66
型号: 74LVC1G66
厂家: NXP    NXP
描述:

Bilateral switch
双向开关

开关
文件: 总24页 (文件大小:110K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
DATA SHEET  
74LVC1G66  
Bilateral switch  
Product specification  
2001 Oct 30  
File under Integrated Circuits, IC24  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
FEATURES  
DESCRIPTION  
Very low ON resistance:  
The 74LVC1G66 is a high-speed Si-gate CMOS device.  
– 10 (typical) at VCC = 2.7 V  
– 8 (typical) at VCC = 3.3 V  
– 6 (typical) at VCC = 5 V.  
ESD protection:  
The 74LVC1G66 provides an analog switch. The switch  
has two input/output pins (Y and Z) and an active HIGH  
enable input pin (E). When pin E is LOW, the analog  
switch is turned off.  
– HBM EIA/JESD22-A114-A exceeds 2000 V  
– MM EIA/JESD22-A115-A exceeds 200 V.  
High noise immunity  
CMOS low power consumption  
Latch up performance exceeds 250 mA  
SOT353 package  
Direct interface TTL-levels.  
QUICK REFERENCE DATA  
Ground = 0 V; Tamb = 25 °C; tr = tf 3.0 ns.  
SYMBOL  
PZH/tPZL  
PARAMETER  
CONDITIONS  
TYPICAL  
UNIT  
t
t
turn-on time E to Vos  
CL = 50 pF; RL = 500 ; VCC = 3 V 2.6  
CL = 50 pF; RL = 500 ; VCC = 5 V 1.9  
CL = 50 pF; RL = 500 ; VCC = 3 V 3.4  
CL = 50 pF; RL = 500 ; VCC = 5 V 2.5  
2
ns  
ns  
ns  
ns  
pF  
pF  
PHZ/tPLZ  
turn-off time E to Vos  
CI  
input capacitance  
CPD  
power dissipation capacitance  
CL = 50 pF; f = 10 MHz;  
16  
VCC = 3.3 V; notes 1 and 2  
CS  
switch capacitance  
OFF-state  
ON-state  
5
pF  
pF  
9.5  
Notes  
1. CPD is used to determine the dynamic power dissipation (PD in µW).  
PD = CPD × VCC2 × fi + (CL + CS) × VCC2 × fo where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
CS = max. switch capacitance in pF;  
VCC = supply voltage in Volts.  
2. The condition is VI = GND to VCC  
.
2001 Oct 30  
2
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
FUNCTION TABLE  
See note 1.  
INPUT E  
SWITCH  
L
OFF  
ON  
H
Note  
1. H = HIGH voltage level;  
L = LOW voltage level.  
ORDERING INFORMATION  
PACKAGE  
PACKAGE MATERIAL  
TYPE NUMBER  
TEMPERATURE  
RANGE  
PINS  
CODE  
MARKING  
74LVC1G66GW  
40 to +85 °C  
5
SC-88A  
plastic  
SOT353  
VL  
PINNING  
PIN  
SYMBOL  
DESCRIPTION  
1
2
3
4
5
Y
Z
independent input/output  
independent output/input  
ground (0 V)  
GND  
E
enable input (active HIGH)  
supply voltage  
VCC  
handbook, halfpage  
handbook, halfpage  
Y
Z
1
2
3
5
4
V
E
CC  
Y
E
Z
66  
GND  
MNA074  
MNA657  
Fig.1 Pin configuration.  
Fig.2 Logic symbol.  
2001 Oct 30  
3
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
handbook, halfpage  
Z
1
4
handbook, halfpage  
1
2
1
#
Y
E
X1  
MNA076  
V
MNA658  
CC  
Fig.3 IEC logic symbol.  
Fig.4 Logic diagram.  
RECOMMENDED OPERATING CONDITIONS  
SYMBOL  
VCC  
PARAMETER  
supply voltage  
CONDITIONS  
MIN.  
1.65  
MAX.  
5.5  
UNIT  
V
VI  
input voltage  
0
5.5  
VCC  
+85  
20  
V
VS  
switch voltage  
0
V
Tamb  
tr,tf  
operating ambient temperature  
input rise and fall times  
40  
0
°C  
VCC = 1.65 to 2.7 V  
ns/V  
ns/V  
VCC = 2.7 to 5.5 V  
0
10  
2001 Oct 30  
4
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V);  
see note 1.  
SYMBOL  
PARAMETER  
supply voltage  
CONDITIONS  
MIN.  
0.5  
MAX.  
+6.5  
UNIT  
VCC  
IIK  
V
input diode current  
VI < 0.5 or VI > VCC + 0.5 V  
VS < 0.5 or VS > VCC + 0.5 V  
0.5 V < VO < VCC + 0.5 V  
50  
mA  
mA  
mA  
mA  
°C  
ISK  
IS  
switch diode current  
switch source or sink current  
VCC or GND current  
storage temperature  
±50  
±50  
ICC  
Tstg  
PD  
±100  
+150  
200  
65  
power dissipation per package for temperature range from 40 to +85 °C;  
mW  
note 2  
Notes  
1. To avoid drawing VCC current out of pin Z, when switch current flows into pin Y, the voltage drop across the  
bidirectional switch must not exceed 0.4 V. If the switch current flows into pin Z, no VCC current will flow out of pin Y.  
In this case there is no limit for the voltage drop across the switch, but the voltage at pins Y and Z may not exceed  
VCC or GND.  
2. Above 55 °C the value of PD derates linearly with 2.5 mW/K.  
2001 Oct 30  
5
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
DC CHARACTERISTICS  
With regard to recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
TEST CONDITIONS amb (°C)  
T
SYMBOL  
PARAMETER  
40 to +85  
UNIT  
OTHER  
VCC (V)  
MIN.  
TYP.(1)  
MAX.  
VIH  
HIGH-level input voltage  
1.65 to 1.95 0.65 × VCC  
V
V
V
V
V
V
V
V
µA  
2.3 to 2.7  
2.7 to 3.6  
4.5 to 5.5  
1.65 to 1.95  
2.3 to 2.7  
2.7 to 3.6  
4.5 to 5.5  
5.5  
1.7  
2.0  
0.7 × VCC  
VIL  
LOW-level input voltage  
0.35 × VCC  
0.7  
0.8  
0.30 × VCC  
±5  
II  
input leakage current  
(control pin)  
VI = 5.5 V or GND  
±0.1  
IS  
analog switch OFF-state VI = VIH or VIL;  
5.5  
5.5  
5.5  
5.5  
±0.1  
±0.1  
0.1  
5
±5  
µA  
µA  
µA  
µA  
current  
|VS| = VCC GND;  
see Fig.6  
IS  
analog switch ON-state  
current  
VI = VIH or VIL;  
|VS| = VCC GND;  
see Fig.7  
±5  
ICC  
quiescent supply current VI = VCC or GND;  
10  
VS = GND or VCC  
IO = 0 A  
;
;
ICC  
additional quiescent  
supply current per control VS = GND or VCC  
pin IO = 0 A  
VI = VCC 0.6 V;  
500  
Note  
1. All typical values are at Tamb = 25 °C.  
2001 Oct 30  
6
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
Type 74LVC1G66  
TEST CONDITIONS  
IS  
Tamb (°C)  
SYMBOL  
PARAMETER  
40 to +85  
UNIT  
OTHER  
VCC (V)  
(mA)  
MIN. TYP.(1) MAX.  
RON  
ON-resistance (peak) VS = GND to VCC  
;
4
1.65 1.95  
2.3 2.7  
2.7  
35  
100  
30  
25  
20  
15  
30  
20  
18  
15  
10  
30  
20  
18  
15  
10  
VI = VIH; see Fig.5  
8
14  
12  
24  
32  
4
11.5  
8.5  
6.5  
10  
3.0 3.6  
4.5 5.5  
1.65 1.95  
2.3 2.7  
2.7  
ON-resistance (rail)  
ON-resistance (rail)  
VS = GND; VI = VIH;  
see Fig.5  
8
8.5  
7.5  
6.5  
6
12  
24  
32  
4
3.0 3.6  
4.5 5.5  
1.65 1.95  
2.3 2.7  
2.7  
VS = VCC; VI = VIH;  
see Fig.5  
12  
8
8.5  
7.5  
6.5  
6
100(2)  
17(2)  
10(2)  
5(2)  
3(2)  
12  
24  
32  
4
3.0 3.6  
4.5 5.5  
1.8  
ON-resistance  
(flatness)  
VS = GND to VCC  
VI = VIH;  
;
8
2.5  
see Figs 9 to 12  
12  
24  
32  
2.7  
3.3  
5.0  
Notes  
1. All typical values are measured at Tamb = 25 °C.  
2. RON flatness over operating temperature range (40 to +85 °C).  
2001 Oct 30  
7
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
E
V
IL  
E
V
IH  
V
Y
Z
Y
Z
A
A
V
= GND to V  
I
S
S
CC  
V = V  
or GND  
CC  
V
= GND or V  
I
O
CC  
GND  
MNA659  
GND  
GND  
MNA660  
Fig.5 Test circuit for measuring ON-resistance  
(RON).  
Fig.6 Test circuit for circuit OFF-state current.  
MNA673  
2
10  
handbook, halfpage  
R
ON  
()  
E
V
= 1.8 V  
2.5 V  
CC  
V
IH  
Y
Z
2.7 V  
10  
A
A
3.3 V  
5.0 V  
V = V  
or GND  
V
(open circuit)  
GND  
I
CC  
O
MNA661  
1
0
1
2
3
4
5
V (V)  
I
Fig.8 Typical ON-resistance (RON) as a function  
of input voltage (VS) for VS = GND to VCC  
Fig.7 Test circuit for measuring ON-state current.  
.
2001 Oct 30  
8
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
MNA664  
MNA663  
15  
15  
handbook, halfpage  
handbook, halfpage  
R
R
ON  
ON  
°
T
= +85 C  
amb  
()  
()  
°
°
+25 C  
T
= +85 C  
amb  
°
°
40 C  
+25 C  
10  
10  
°
40 C  
5
5
0
0
0
0
1
2
3
1
2
3
V (V)  
V (V)  
l
l
Fig.9 RON for VCC = 2.5 V.  
Fig.10 RON for VCC = 2.7 V.  
MNA666  
MNA665  
10  
8
handbook, halfpage  
handbook, halfpage  
R
ON  
R
ON  
()  
()  
T
=
amb  
7
8
°
+85 C  
6
5
4
3
°
= +85 C  
T
amb  
°
6
4
2
+25 C  
°
40 C  
°
+25 C  
°
40 C  
2
0
0
0
1
2
3
4
5
1
2
3
4
V (V)  
l
V (V)  
I
Fig.11 RON for VCC = 3.3 V.  
Fig.12 RON for VCC = 5.0 V.  
2001 Oct 30  
9
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
AC CHARACTERISTICS  
GND = 0 V; tr = tf 2.0 ns; CL = 30 pF; RL = 1 k; VCC = 1.65 to 1.95 V;  
GND = 0 V; tr = tf 2.0 ns; CL = 30 pF; RL = 500 ; VCC = 2.3 to 2.7 V;  
GND = 0 V; tr = tf 2.5 ns; CL = 50 pF; RL = 500 ; VCC 2.7 V.  
TEST CONDITIONS  
Tamb (°C)  
SYMBOL  
PARAMETER  
40 to +85  
TYP.(1)  
UNIT  
WAVEFORMS  
VCC (V)  
MIN.  
MAX.  
t
t
t
PHL/tPLH propagation delay  
see Figs 13 and 15 1.65 to 1.95  
0.8  
0.4  
0.4  
0.3  
0.2  
5.3  
3.0  
2.6  
2.5  
1.9  
4.2  
2.4  
3.6  
3.4  
2.5  
2
ns  
inA; inB to outY  
2.3 to 2.7  
1
1
1
1
1
1
1
1
1
1
1.2  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
2.7  
1
3.0 to 3.6  
0.8  
0.6  
12  
6.5  
6
4.5 to 5.5  
PZH/tPZL  
turn-ON time E to VOS  
see Figs 14 and 15 1.65 to 1.95  
2.3 to 2.7  
2.7  
3.0 to 3.6  
5
4.5 to 5.5  
4.2  
10  
6.9  
7.5  
6.5  
5
PHZ/tPLZ  
turn-OFF time E to VOS  
see Figs 14 and 15 1.65 to 1.95  
2.3 to 2.7  
2.7  
3.0 to 3.6  
4.5 to 5.5  
Note  
1. All typical values are measured at Tamb = 25 °C.  
2001 Oct 30  
10  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
AC WAVEFORMS  
V
handbook, halfpage  
Y or Z  
I
V
M
GND  
t
t
PHL  
PLH  
V
OH  
V
Z or Y  
M
V
OL  
MNA667  
INPUT  
tr = tf  
VCC  
VM  
VI  
1.65 to 1.95 V  
2.3 to 2.7 V  
2.7; V  
0.5 × VCC VCC  
0.5 × VCC VCC  
2.0 ns  
2.0 ns  
2.5 ns  
2.5 ns  
2.5 ns  
1.5 V  
1.5 V  
2.7 V  
2.7 V  
3.0 to 3.6 V  
4.5 to 5.5 V  
0.5 × VCC VCC  
VOL and VOH are typical output voltage drop that occur with the output load.  
Fig.13 The input (VS) to output (VO) propagation delays.  
2001 Oct 30  
11  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
V
I
E
V
M
t
GND  
t
PLZ  
PZL  
V
CC  
output  
Y or Z  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PZH  
PHZ  
V
OH  
V
output  
Y
Y or Z  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
switch  
enabled  
switch  
enabled  
switch  
disabled  
MNA668  
INPUT  
VCC  
VM  
VI  
tr = tf  
1.65 to 1.95 V  
2.3 to 2.7 V  
2.7 V  
0.5 × VCC VCC  
0.5 × VCC VCC  
2.0 ns  
2.0 ns  
2.5 ns  
2.5 ns  
2.5 ns  
VX = VOL + 0.3 V at VCC 2.7 V;  
VX = VOL + 0.1 x VCC at VCC < 2.7 V;  
VY = VOH 0.3 V at VCC 2.7 V;  
VY = VOH 0.1 x VCC at VCC < 2.7 V.  
1.5 V  
1.5 V  
2.7 V  
2.7 V  
3.0 to 3.6 V  
4.5 to 5.5 V  
0.5 × VCC VCC  
VOL and VOH are typical output voltage drop that occur with the output load.  
Fig.14 The turn-on and turn-off times.  
2001 Oct 30  
12  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
V
EXT  
V
CC  
R
L
V
V
O
I
PULSE  
GENERATOR  
D.U.T.  
C
R
R
L
L
T
MNA616  
VEXT  
VCC  
VI  
CL  
RL  
tPLH/tPHL  
tPZH/tPHZ  
tPZL/tPLZ  
1.65 to 1.95 V  
2.3 to 2.7 V  
2.7 V  
VCC  
VCC  
30 pF  
30 pF  
1 kΩ  
open  
open  
open  
open  
open  
GND  
GND  
GND  
GND  
GND  
2 × VCC  
2 × VCC  
6 V  
500 Ω  
500 Ω  
500 Ω  
500 Ω  
2.7 V 50 pF  
2.7 V 50 pF  
3.0 to 3.6 V  
4.5 to 5.5 V  
6 V  
VCC  
50 pF  
2 × VCC  
RL = Load resistor.  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.  
Fig.15 Load circuitry for switching times.  
2001 Oct 30  
13  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
ADDITIONAL AC CHARACTERISTICS FOR THE 74LVC1G66  
Recommended conditions and all typical values are measured at Tamb = 25 °C.  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
VCC (V)  
TYPICAL  
UNIT  
sine-wave distortion  
RL = 10 k; CL = 50 pF;  
fin = 1 kHz; see Fig.17  
1.65  
2.3  
3
0.032  
0.008  
0.006  
0.001  
0.068  
0.009  
0.008  
0.006  
135  
%
%
%
%
%
%
%
%
4.5  
1.65  
2.3  
3
RL = 10 k; CL = 50 pF;  
fin = 10 kHz; see Fig.17  
4.5  
1.65  
2.3  
3
switch ON signal frequency  
response  
RL = 600 ; CL = 50 pF;  
fin = 1 MHz; see Fig.16;  
note 1  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
dB  
145  
150  
4.5  
1.65  
2.3  
3
155  
RL = 50 ; CL = 5 pF;  
fin = 1 MHz; see Fig.16;  
note 1  
>500  
>500  
>500  
>500  
46  
4.5  
1.65  
2.3  
3
switch OFF signal  
feed-through attenuation  
RL = 600 ; CL = 50 pF;  
fin = 1 MHz; see Fig.18;  
note 2  
46  
dB  
46  
dB  
4.5  
1.65  
2.3  
3
46  
dB  
RL = 0 ; CL = 50 pF;  
fin = 1 MHz; see Fig.18;  
note 2  
37  
dB  
37  
dB  
37  
dB  
4.5  
1.65  
2.3  
3
37  
dB  
crosstalk (control input to  
signal output)  
RL = 600 ; CL = 50 pF;  
fin = 1 MHz; tr = tf = 2 ns;  
see Fig.19  
69  
mV  
87  
mV  
156  
mV  
4.5  
1.65  
2.3  
3
302  
mV  
minimum frequency response RL = 50 ; CL = 10 pF;  
(3 dB) see Fig.16; note 1  
200  
MHz  
MHz  
MHz  
MHz  
350  
410  
4.5  
440  
2001 Oct 30  
14  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
VCC (V)  
2.5  
TYPICAL  
UNIT  
CPD  
power dissipation capacitance CL = 50 pF; fin = 10 MHz  
13.7  
15.2  
18.3  
pF  
pF  
pF  
pC  
3.3  
5.0  
Q
charge injection  
CL = 0.1 nF; Vgen = 0 V;  
Rgen = 0 ; f = 1 Mhz;  
1.65 to 5.5 0.05  
RL = 1 M; see Fig.20; note 3  
Notes  
1. Adjust fin voltage to obtain 0 dBm level at output. Increase fin frequency until dB meter reads 3 dB.  
2. Adjust fin voltage to obtain 0 dBm level at input.  
3. Guaranteed by design.  
E
V
IH  
0.1 µF  
Y/Z  
Z/Y  
V
O
f
R
50 Ω  
C
dB  
in  
L
L
channel  
ON  
1/2V  
CC  
MNA669  
Fig.16 Test circuit for measuring the frequency response when switch is ON.  
2001 Oct 30  
15  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
E
V
IH  
10 µF  
Y/Z  
Z/Y  
V
O
DISTORTION  
METER  
f
600 Ω  
R
C
L
in  
L
channel  
ON  
1/2V  
CC  
MNA670  
VCC  
VI  
1.65 V  
2.3 V  
3 V  
1.4 Vp-p  
2 Vp-p  
2.5 Vp-p  
4 Vp-p  
4 V  
Fig.17 Test circuit for measuring sine-wave distortion.  
E
V
IL  
0.1 µF  
Y/Z  
Z/Y  
V
O
f
R
R
L
50 Ω  
1/2V  
C
dB  
in  
L
L
channel  
ON  
1/2V  
CC  
CC  
MNA671  
Fig.18 Test circuit for measuring feed-through when switch is OFF.  
16  
2001 Oct 30  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
E
Y/Z  
in  
Z/Y  
V
O
R
R
600 Ω  
C
L
L
50 Ω  
600 Ω  
50 pF  
1/2V  
1/2V  
CC  
CC  
MNA672  
Fig.19 Crosstalk.  
E
R
gen  
Y/Z  
Z/Y  
V
O
logic  
input  
1
MΩ  
0.1  
nF  
V
R
C
L
gen  
L
MNA674  
logic  
input (E)  
off  
on  
off  
V
V  
out  
O
MNA675  
Q = (Vout) . (CL)  
Fig.20 Charge injection test.  
17  
2001 Oct 30  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
PACKAGE OUTLINE  
Plastic surface mounted package; 5 leads  
SOT353  
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
1
2
3
c
e
1
b
p
L
p
w
M B  
e
detail X  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
1
(2)  
UNIT  
A
b
c
D
E
e
e
H
L
Q
v
w
y
p
p
1
E
max  
0.30  
0.20  
1.1  
0.8  
0.25  
0.10  
2.2  
1.8  
1.35  
1.15  
2.2  
2.0  
0.45  
0.15  
0.25  
0.15  
mm  
0.1  
1.3  
0.65  
0.2  
0.2  
0.1  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
EIAJ  
SC-88A  
97-02-28  
SOT353  
2001 Oct 30  
18  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
SOLDERING  
If wave soldering is used the following conditions must be  
observed for optimal results:  
Introduction to soldering surface mount packages  
Use a double-wave soldering method comprising a  
turbulent wave with high upward pressure followed by a  
smooth laminar wave.  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “Data Handbook IC26; Integrated Circuit Packages”  
(document order number 9398 652 90011).  
For packages with leads on two sides and a pitch (e):  
– larger than or equal to 1.27 mm, the footprint  
longitudinal axis is preferred to be parallel to the  
transport direction of the printed-circuit board;  
There is no soldering method that is ideal for all surface  
mount IC packages. Wave soldering can still be used for  
certain surface mount ICs, but it is not suitable for fine pitch  
SMDs. In these situations reflow soldering is  
recommended.  
– smaller than 1.27 mm, the footprint longitudinal axis  
must be parallel to the transport direction of the  
printed-circuit board.  
Reflow soldering  
The footprint must incorporate solder thieves at the  
downstream end.  
Reflow soldering requires solder paste (a suspension of  
fine solder particles, flux and binding agent) to be applied  
to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement.  
For packages with leads on four sides, the footprint must  
be placed at a 45° angle to the transport direction of the  
printed-circuit board. The footprint must incorporate  
solder thieves downstream and at the side corners.  
Several methods exist for reflowing; for example,  
convection or convection/infrared heating in a conveyor  
type oven. Throughput times (preheating, soldering and  
cooling) vary between 100 and 200 seconds depending  
on heating method.  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
Typical reflow peak temperatures range from  
215 to 250 °C. The top-surface temperature of the  
packages should preferable be kept below 220 °C for  
thick/large packages, and below 235 °C for small/thin  
packages.  
Typical dwell time is 4 seconds at 250 °C.  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
Manual soldering  
Wave soldering  
Fix the component by first soldering two  
diagonally-opposite end leads. Use a low voltage (24 V or  
less) soldering iron applied to the flat part of the lead.  
Contact time must be limited to 10 seconds at up to  
300 °C.  
Conventional single wave soldering is not recommended  
for surface mount devices (SMDs) or printed-circuit boards  
with a high component density, as solder bridging and  
non-wetting can present major problems.  
When using a dedicated tool, all other leads can be  
soldered in one operation within 2 to 5 seconds between  
270 and 320 °C.  
To overcome these problems the double-wave soldering  
method was specifically developed.  
2001 Oct 30  
19  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
Suitability of surface mount IC packages for wave and reflow soldering methods  
SOLDERING METHOD  
PACKAGE  
BGA, LFBGA, SQFP, TFBGA  
WAVE  
not suitable  
REFLOW(1)  
suitable  
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS  
PLCC(3), SO, SOJ  
not suitable(2)  
suitable  
suitable  
suitable  
LQFP, QFP, TQFP  
not recommended(3)(4) suitable  
not recommended(5)  
suitable  
SSOP, TSSOP, VSO  
Notes  
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum  
temperature (with respect to time) and body size of the package, there is a risk that internal or external package  
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the  
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.  
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink  
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).  
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.  
The package footprint must incorporate solder thieves downstream and at the side corners.  
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;  
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.  
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is  
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.  
2001 Oct 30  
20  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
DATA SHEET STATUS  
PRODUCT  
STATUS(2)  
DATA SHEET STATUS(1)  
DEFINITIONS  
Objective data  
Development This data sheet contains data from the objective specification for product  
development. Philips Semiconductors reserves the right to change the  
specification in any manner without notice.  
Preliminary data  
Product data  
Qualification  
This data sheet contains data from the preliminary specification.  
Supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to change the specification without  
notice, in order to improve the design and supply the best possible  
product.  
Production  
This data sheet contains data from the product specification. Philips  
Semiconductors reserves the right to make changes at any time in order  
to improve the design, manufacturing and supply. Changes will be  
communicated according to the Customer Product/Process Change  
Notification (CPCN) procedure SNW-SQ-650A.  
Notes  
1. Please consult the most recently issued data sheet before initiating or completing a design.  
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was  
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.  
DEFINITIONS  
DISCLAIMERS  
Short-form specification  
The data in a short-form  
Life support applications  
These products are not  
specification is extracted from a full data sheet with the  
same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
designed for use in life support appliances, devices, or  
systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips  
Semiconductors customers using or selling these products  
for use in such applications do so at their own risk and  
agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in  
accordance with the Absolute Maximum Rating System  
(IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device.  
These are stress ratings only and operation of the device  
at these or at any other conditions above those given in the  
Characteristics sections of the specification is not implied.  
Exposure to limiting values for extended periods may  
affect device reliability.  
Right to make changes  
Philips Semiconductors  
reserves the right to make changes, without notice, in the  
products, including circuits, standard cells, and/or  
software, described or contained herein in order to  
improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for  
the use of any of these products, conveys no licence or title  
under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that  
these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified.  
Application information  
Applications that are  
described herein for any of these products are for  
illustrative purposes only. Philips Semiconductors make  
no representation or warranty that such applications will be  
suitable for the specified use without further testing or  
modification.  
2001 Oct 30  
21  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
NOTES  
2001 Oct 30  
22  
Philips Semiconductors  
Product specification  
Bilateral switch  
74LVC1G66  
NOTES  
2001 Oct 30  
23  
Philips Semiconductors – a worldwide company  
Contact information  
For additional information please visit http://www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.  
© Koninklijke Philips Electronics N.V. 2001  
SCA73  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
613508/01/pp24  
Date of release: 2001 Oct 30  
Document order number: 9397 750 08977  

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