首页 |元器件品牌

933424830652 [NXP]

IC 4000/14000/40000 SERIES, 64-BIT RIGHT SERIAL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP14, CERAMIC, DIP-14, Shift Register;
933424830652
型号： 933424830652
厂家： NXP    NXP
描述：

IC 4000/14000/40000 SERIES, 64-BIT RIGHT SERIAL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP14, CERAMIC, DIP-14, Shift Register

CD 输出元件
文件： 总4页 (文件大小：49K)
中文：  中文翻译
下载：  下载PDF数据表文档文件
 查看货源
INTEGRATED CIRCUITS  
DATA SHEET  
For a complete data sheet, please also download:  
• The IC04 LOCMOS HE4000B Logic  
Family Specifications HEF, HEC  
• The IC04 LOCMOS HE4000B Logic  
Package Outlines/Information HEF, HEC  
HEF4731B; HEF4731V  
LSI  
Quadruple 64-bit static shift register  
January 1995  
Product specification  
File under Integrated Circuits, IC04  
Philips Semiconductors  
Product specification  
HEF4731B; HEF4731V  
LSI  
Quadruple 64-bit static shift register  
Recommended supply voltage range for HEF4731B is 3 to  
15 V and for HEF4731V is 4,5 to 12,5 V.  
DESCRIPTION  
The HEF4731B and HEF4731V are quadruple 64-bit static  
shift registers each with separate serial data inputs (DA to  
DD), clock inputs (CPA to CPD) and data outputs (O63A to  
O63D) from the 64th register position.  
Data are shifted to the next stage on the negative-going  
transitions of the clock. Low impedance outputs are  
provided for direct interface to TTL.  
Fig.2 Pinning diagram.  
HEF4731BP;  
HEF4731VP(N):  
14-lead DIL; plastic  
(SOT27-1)  
HEF4731BD;  
HEF4731VD(F):  
14-lead DIL; ceramic (cerdip)  
(SOT73)  
( ): Package Designator North America  
FAMILY DATA, IDD LIMITS category LSI  
See Family Specifications  
Fig.1 Functional diagram.  
January 1995  
2
Philips Semiconductors  
Product specification  
HEF4731B; HEF4731V  
LSI  
Quadruple 64-bit static shift register  
Fig.3 Logic diagram (one of 64-bits shift register).  
The values given at VDD = 15 V in the following DC  
and AC characteristics, are not applicable to the HEF4731V,  
because of its reduced supply voltage range.  
DC CHARACTERISTICS  
VSS = 0 V; VI = VSS or VDD  
Tamb (°C)  
VDD  
V
VOL  
V
VOH  
V
SYMBOL  
−40  
+ 25  
+ 85  
MIN. MAX. MIN. MAX. MIN. MAX.  
Output (source)  
current  
5
5
2,5  
4,6  
3
1
2,5  
0,85  
2,5  
8,5  
2,0  
5,0  
2,0  
0,65  
2,0  
6,5  
1,6  
4,0  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
−IOH  
HIGH  
10  
15  
4,75  
10  
15  
9,5  
3
13,5  
10  
Output (sink)  
current  
0,4  
0,5  
1,5  
2,3  
IOL  
6,0  
LOW  
20,0  
18,0  
14,0  
AC CHARACTERISTICS  
VSS = 0 V; Tamb = 25 °C; input transition times ≤ 20 ns  
VDD  
V
TYPICAL FORMULA FOR P (µW)  
2
Dynamic power  
dissipation per  
package (P)  
5
10  
15  
13 000 fi + ∑ (foCL) × VDD  
where  
2
55 000 fi + ∑ (foCL) × VDD  
fi = input freq. (MHz)  
2
140 000 fi + ∑ (foCL) × VDD  
fo = output freq. (MHz)  
CL = load capacitance (pF)  
∑ (foCL) = sum of outputs  
VDD = supply voltage (V)  
January 1995  
3
Philips Semiconductors  
Product specification  
HEF4731B; HEF4731V  
LSI  
Quadruple 64-bit static shift register  
AC CHARACTERISTICS  
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns  
VDD  
V
TYPICAL EXTRAPOLATION  
FORMULA  
SYMBOL  
MIN.  
TYP. MAX.  
Propagation delays  
CP → O63  
5
115  
55  
40  
130  
65  
45  
30  
12  
10  
40  
20  
15  
80  
30  
20  
−5  
−5  
−5  
20  
10  
5
230 ns  
132 ns + (0,26 ns/pF) CL  
47 ns + (0,16 ns/pF) CL  
34 ns + (0,11 ns/pF) CL  
138 ns + (0,45 ns/pF) CL  
56 ns + (0,19 ns/pF) CL  
39 ns + (0,13 ns/pF) CL  
10 ns + (0,40 ns/pF) CL  
3 ns + (0,18 ns/pF) CL  
3 ns + (0,13 ns/pF) CL  
8 ns + (0,65 ns/pF) CL  
5 ns + (0,30 ns/pF) CL  
5 ns + (0,20 ns/pF) CL  
HIGH to LOW  
10  
15  
5
tPHL  
tPLH  
tTHL  
tTLH  
tWCPH  
tsu  
110 ns  
80 ns  
260 ns  
130 ns  
90 ns  
60 ns  
24 ns  
20 ns  
80 ns  
40 ns  
30 ns  
ns  
LOW to HIGH  
10  
15  
5
Transition times O63  
HIGH to LOW  
10  
15  
5
LOW to HIGH  
10  
15  
5
Minimum clock  
200  
75  
50  
25  
15  
15  
50  
30  
20  
pulse width; HIGH  
10  
15  
5
ns  
ns  
Set-up time  
ns  
D → CP  
10  
15  
5
ns  
see also waveforms Fig.4  
ns  
Hold time  
ns  
D → CP  
10  
15  
5
thold  
ns  
ns  
Maximum clock  
pulse frequency  
2.25  
6
MHz  
Note: the maximum  
power dissipation has  
to be observed  
10  
15  
fmax  
6
9
16  
25  
MHz  
MHz  
Fig.4 Waveforms showing  
minimum clock pulse  
width, set-up and hold  
times for D to CP.  
Set-up and hold times  
are shown as positive  
values but may be  
specified as negative  
values.  
January 1995  
4

相关型号：

933429280127

 600V, 8A, 4 QUADRANT LOGIC LEVEL TRIAC, TO-220AB, PLASTIC, SC-46, 3 PIN
NXP

933431190116

 TRANSISTOR 500 mA, 300 V, PNP, Si, SMALL SIGNAL TRANSISTOR, TO-92, PLASTIC, SPT, SC-43, 3 PIN, BIP General Purpose Small Signal
NXP

933431190126

 TRANSISTOR 500 mA, 300 V, PNP, Si, SMALL SIGNAL TRANSISTOR, TO-92, PLASTIC, SPT, SC-43, 3 PIN, BIP General Purpose Small Signal
NXP

933431190412

 TRANSISTOR 500 mA, 300 V, PNP, Si, SMALL SIGNAL TRANSISTOR, TO-92, PLASTIC, SPT, SC-43, 3 PIN, BIP General Purpose Small Signal
NXP

933434270112

 IC QUAD COMPARATOR, 4000 uV OFFSET-MAX, 1300 ns RESPONSE TIME, PDSO14, SOT-108-1, 14 PIN, Comparator
NXP

933434270118

 IC QUAD COMPARATOR, 4000 uV OFFSET-MAX, 1300 ns RESPONSE TIME, PDSO14, SOT-108-1, 14 PIN, Comparator
NXP

933438800602

 IC ADDR LATCH BASED PRPHL DRVR, PDIP16, 0.300 INCH, PLASTIC, SOT38-4, DIP-16, Peripheral Driver
NXP

933440830127

 600V, 4A, 4 QUADRANT LOGIC LEVEL TRIAC, TO-220AB, PLASTIC, SC-46, 3 PIN
NXP

933445280113

 DIODE 1650 V, SILICON, RECTIFIER DIODE, Rectifier Diode
NXP

933448540112

 TRANSISTOR UHF BAND, Si, NPN, RF POWER TRANSISTOR, CERAMIC PACKAGE-2, BIP RF Power
NXP

933448550112

 TRANSISTOR UHF BAND, Si, NPN, RF POWER TRANSISTOR, CERAMIC PACKAGE-2, BIP RF Power
NXP

93345

 PCMCIA Connector, 68 Contact(s), 2 Row(s), Female, Right Angle, Solder Terminal, Receptacle
AMPHENOL
©2020 ICPDF网 联系我们和版权申明