934019820115 [NXP]

TRANSISTOR 550 mA, 200 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, PLASTIC, SMD, SC-73, 4 PIN, FET General Purpose Small Signal;
934019820115
型号: 934019820115
厂家: NXP    NXP
描述:

TRANSISTOR 550 mA, 200 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, PLASTIC, SMD, SC-73, 4 PIN, FET General Purpose Small Signal

开关 光电二极管 晶体管
文件: 总8页 (文件大小:49K)
中文:  中文翻译
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DISCRETE SEMICONDUCTORS  
DATA SHEET  
book, halfpage  
BSP122  
N-channel enhancement mode  
vertical D-MOS transistor  
Product specification  
2001 May 18  
Supersedes data of 1997 Jun 23  
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP122  
FEATURES  
QUICK REFERENCE DATA  
Direct interface to C-MOS, TTL,  
etc.  
SYMBOL  
VDS  
PARAMETER  
MAX.  
200  
UNIT  
drain-source voltage (DC)  
drain current (DC)  
V
High-speed switching  
ID  
550  
2.5  
2
mA  
No secondary breakdown.  
RDSon  
VGSth  
drain-source on-state resistance  
gate-source threshold voltage  
V
DESCRIPTION  
N-channel enhancement mode  
vertical D-MOS transistor in a  
SOT223 package and intended for  
use as a line current interruptor in  
telephone sets and for applications in  
relay, high-speed and line  
d
s
4
handbook, halfpage  
transformer drivers.  
g
PINNING - SOT223  
1
2
3
Top view  
MAM054  
PIN  
DESCRIPTION  
1
2
3
4
gate  
drain  
source  
drain  
Fig.1 Simplified outline (SOT223) and symbol.  
LIMITING VALUES  
In accordance with the Absolute Maximum System (IEC 60134).  
SYMBOL  
PARAMETER  
drain-source voltage (DC)  
gate-source voltage (DC)  
drain current (DC)  
CONDITIONS  
MIN.  
MAX.  
200  
UNIT  
VDS  
VGSO  
ID  
V
open drain  
±20  
550  
3
V
mA  
A
IDM  
Ptot  
Tstg  
Tj  
peak drain current  
total power dissipation  
storage temperature  
T
amb 25 °C; note 1  
1.5  
W
55  
+150  
150  
°C  
°C  
junction temperature  
Note  
1. Transistor mounted on an epoxy printed circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum  
6 cm2.  
THERMAL CHARACTERISTICS  
SYMBOL  
PARAMETER  
VALUE  
UNIT  
Rth j-a  
thermal resistance from junction to ambient; note 1  
83.3  
K/W  
Note  
1. Transistor mounted on an epoxy printed circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum  
6 cm2.  
2001 May 18  
2
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP122  
CHARACTERISTICS  
Tj = 25 °C unless otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
V(BR)DSS  
IDSS  
drain-source breakdown voltage  
drain-source leakage current  
gate-source leakage current  
gate-source threshold voltage  
drain-source on-resistance  
ID = 10 µA; VGS = 0  
200  
V
VDS = 160 V; VGS = 0  
1
µA  
nA  
V
IGSS  
VGS = ±20 V; VDS = 0  
100  
2
VGSth  
RDSon  
ID = 1 mA; VGS = VDS  
0.4  
ID = 750 mA; VGS = 10 V  
ID = 20 mA; VGS = 2.4 V  
ID = 750 mA; VDS = 25 V  
VDS = 25 V; VGS = 0; f = 1 MHz  
VDS = 25 V; VGS = 0; f = 1 MHz  
VDS = 25 V; VGS = 0; f = 1 MHz  
1.7  
3
2.5  
Yfs  
Ciss  
Coss  
Crss  
transfer admittance  
input capacitance  
400  
900  
100  
20  
10  
mS  
pF  
pF  
pF  
output capacitance  
reverse transfer capacitance  
Switching times (see Figs 2 and 3)  
ton  
turn-on time  
ID = 750 mA; VDD = 50 V;  
VGS = 0 to 10 V  
10  
45  
20  
60  
ns  
ns  
toff  
turn-off time  
ID = 750 mA; VDD = 50 V;  
VGS = 0 to 10 V  
handbook, halfpage  
INPUT  
90 %  
V
= 50 V  
handbook, halfpage  
DD  
10 %  
90 %  
OUTPUT  
10 V  
0 V  
I
D
10 %  
50  
t
t
off  
on  
MBB691  
MBB692  
VDD = 50 V.  
Fig.2 Switching times test circuit.  
Fig.3 Input and output waveforms.  
2001 May 18  
3
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP122  
PACKAGE OUTLINE  
Plastic surface mounted package; collector pad for good heat transfer; 4 leads  
SOT223  
D
B
E
A
X
c
y
H
v
M
A
E
b
1
4
Q
A
A
1
L
1
2
3
p
e
b
p
w
M
B
detail X  
1
e
0
2
4 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
UNIT  
A
b
b
c
D
E
e
e
H
L
p
Q
v
w
y
p
1
1
1
E
1.8  
1.5  
0.10 0.80  
0.01 0.60  
3.1  
2.9  
0.32  
0.22  
6.7  
6.3  
3.7  
3.3  
7.3  
6.7  
1.1  
0.7  
0.95  
0.85  
mm  
4.6  
2.3  
0.2  
0.1  
0.1  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
EIAJ  
97-02-28  
99-09-13  
SOT223  
SC-73  
2001 May 18  
4
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP122  
DATA SHEET STATUS  
PRODUCT  
DATA SHEET STATUS(1)  
STATUS(2)  
DEFINITIONS  
Objective data  
Development This data sheet contains data from the objective specification for product  
development. Philips Semiconductors reserves the right to change the  
specification in any manner without notice.  
Preliminary data  
Qualification  
This data sheet contains data from the preliminary specification.  
Supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to change the specification without  
notice, in order to improve the design and supply the best possible  
product.  
Product data  
Production  
This data sheet contains data from the product specification. Philips  
Semiconductors reserves the right to make changes at any time in order  
to improve the design, manufacturing and supply. Changes will be  
communicated according to the Customer Product/Process Change  
Notification (CPCN) procedure SNW-SQ-650A.  
Notes  
1. Please consult the most recently issued data sheet before initiating or completing a design.  
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was  
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.  
DEFINITIONS  
DISCLAIMERS  
Short-form specification  
The data in a short-form  
Life support applications  
These products are not  
specification is extracted from a full data sheet with the  
same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
designed for use in life support appliances, devices, or  
systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips  
Semiconductors customers using or selling these products  
for use in such applications do so at their own risk and  
agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in  
accordance with the Absolute Maximum Rating System  
(IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device.  
These are stress ratings only and operation of the device  
at these or at any other conditions above those given in the  
Characteristics sections of the specification is not implied.  
Exposure to limiting values for extended periods may  
affect device reliability.  
Right to make changes  
Philips Semiconductors  
reserves the right to make changes, without notice, in the  
products, including circuits, standard cells, and/or  
software, described or contained herein in order to  
improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for  
the use of any of these products, conveys no licence or title  
under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that  
these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified.  
Application information  
Applications that are  
described herein for any of these products are for  
illustrative purposes only. Philips Semiconductors make  
no representation or warranty that such applications will be  
suitable for the specified use without further testing or  
modification.  
2001 May 18  
5
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP122  
NOTES  
2001 May 18  
6
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP122  
NOTES  
2001 May 18  
7
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72  
SCA  
© Philips Electronics N.V. 2001  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
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under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
613510/03/pp8  
Date of release: 2001 May 18  
Document order number: 9397 750 08246  

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