934050170115 [NXP]
TRANSISTOR 100 mA, 50 V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR, PLASTIC, UMT6, SC-88, 6 PIN, BIP General Purpose Small Signal;
| 型号： | 934050170115 |
| 厂家： | 
NXP |
| 描述： | TRANSISTOR 100 mA, 50 V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR, PLASTIC, UMT6, SC-88, 6 PIN, BIP General Purpose Small Signal 开关 光电二极管 晶体管 |
| 文件： | 总12页 (文件大小：65K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
book, halfpage
PUMD3
NPN/PNP resistor-equipped
transistors
Product specification
2001 Feb 16
Supersedes data of 1999 Apr 13
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistors
PUMD3
FEATURES
6
5
4
• Transistors with different polarity
handbook, halfpage
and built-in bias resistors
6
5
4
3
– TR1 (NPN):
R1 R2
R1 = R2 = 10 kΩ
TR2
TR1
– TR2 (PNP):
R2 R1
R1 = R2 = 10 kΩ
1
2
• No mutual interference between
Top view
the transistors
MAM343
1
2
3
• Simplification of circuit design
Fig.1 Simplified outline (SC-88) and symbol.
• Reduces number of components
and board space.
PINNING
APPLICATIONS
PIN
DESCRIPTION
• Especially suitable for space
reduction in interface and driver
circuits
1, 4
2, 5
6, 3
emitter
base
TR1; TR2
TR1; TR2
TR1; TR2
2, 5
6, 3
collector
• Inverter circuit configurations
without use of external resistors.
1, 4
MBK120
MARKING
DESCRIPTION
MARKING
CODE
TYPE NUMBER
Fig.2 Equivalent inverter
symbol.
NPN/PNP resistor-equipped
transistors in an SC-88 (SOT363)
plastic package.
PUMD3
Dt3
2001 Feb 16
2
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistors
PUMD3
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
Per transistor; for the PNP transistor with negative polarity
VCBO
VCEO
VEBO
VI
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
open emitter
open base
−
−
−
50
V
V
V
50
10
open collector
positive
−
−
−
−
−
+40
−10
100
100
200
+150
150
+150
V
V
negative
IO
output current (DC)
peak collector current
total power dissipation
storage temperature
junction temperature
operating ambient temperature
mA
mA
mW
°C
ICM
Ptot
Tstg
Tj
Tamb ≤ 25 °C; note 1
−65
−
°C
Tamb
−65
°C
Per device
Ptot
total power dissipation
Tamb ≤ 25 °C; note 1
−
300
mW
Note
1. Device mounted on an FR4 printed-circuit board.
2001 Feb 16
3
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistors
PUMD3
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth j-a
thermal resistance from junction to ambient note 1
416
K/W
Note
1. Device mounted on an FR4 printed-circuit board.
CHARACTERISTICS
T
amb = 25 °C unless otherwise specified.
SYMBOL PARAMETER
Per transistor; for the PNP transistor with negative polarity
CONDITIONS
MIN.
TYP.
MAX.
UNIT
ICBO
ICEO
collector cut-off current
collector cut-off current
IE = 0; VCB = 50 V
IB = 0; VCE = 30 V
−
−
−
100
1
nA
−
µA
µA
µA
IB = 0; VCE = 30 V; Tj = 150 °C −
−
50
IEBO
emitter cut-off current
DC current gain
IC = 0; VEB = 5 V
−
−
400
−
hFE
IC = 5 mA; VCE = 5 V
30
−
−
VCEsat
Vi(off)
Vi(on)
collector-emitter saturation voltage IC = 10 mA; IB = 0.5 mA
−
150
0.8
mV
V
input-off voltage
input-on voltage
TR1 (NPN)
IC = 100 µA; VCE = 5 V
−
1.1
IC = 10 mA; VCE = 0.3 V
2.5
2.5
7
1.8
1.8
10
−
V
TR2 (PNP)
−
V
R1
input resistor
13
kΩ
R2
-------
R1
resistor ratio
0.8
1
1.2
Cc
collector capacitance
TR1 (NPN)
IE = ie = 0; VCB = 10 V;
f = 1 MHz
−
−
−
−
2.5
3
pF
pF
TR2 (PNP)
2001 Feb 16
4
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistors
PUMD3
MGM898
MGM897
3
10
1
handbook, halfpage
handbook, halfpage
h
FE
(1)
(2)
V
CEsat
(V)
2
10
(3)
−1
10
(1)
(2)
(3)
10
−2
1
10
10
−1
2
2
1
10
10
1
10
10
I
(mA)
C
I
(mA)
C
TR1 (NPN); IC/IB = 20.
(1) Tamb = 100 °C.
TR1 (NPN); VCE = 5 V.
(1) Tamb = 150 °C.
(2)
Tamb = 25 °C.
(2)
Tamb = 25 °C.
(3) Tamb = −40 °C.
(3) Tamb = −40 °C.
Fig.3 DC current gain as a function of collector
current; typical values.
Fig.4 Collector-emitter saturation voltage as a
function of collector current; typical values.
MGM900
MGM899
2
10
10
handbook, halfpage
handbook, halfpage
V
i(on)
(V)
V
i(off)
(V)
10
(1)
(2)
1
(1) (2)(3)
(3)
1
−1
−1
10
10
−2
−1
−1
2
10
10
1
10
10
1
10
10
I
(mA)
I
(mA)
C
C
TR1 (NPN); VCE = 5 V.
(1) Tamb = −40 °C.
TR1 (NPN); VCE = 0.3 V.
(1) Tamb = −40 °C.
(2)
Tamb = 25 °C.
(2)
Tamb = 25 °C.
(3) Tamb = 100 °C.
(3) Tamb = 100 °C.
Fig.5 Input-off voltage as a function of collector
current; typical values.
Fig.6 Input-on voltage as a function of collector
current; typical values.
2001 Feb 16
5
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistors
PUMD3
MBK779
MBK780
3
10
−1
handbook, halfpage
handbook, halfpage
h
FE
(1)
(2)
V
CEsat
(V)
2
10
(3)
−1
−10
(1)
(2)
(3)
10
−2
−10
1
−10
−1
2
2
−1
−10
−10
−1
−10
−10
I
(mA)
C
I
(mA)
C
TR2 (PNP); IC/IB = 20.
(1) Tamb = 100 °C.
TR2 (PNP); VCE = −5 V.
(1) Tamb = 150 °C.
(2)
Tamb = 25 °C.
(2)
Tamb = 25 °C.
(3) Tamb = −40 °C.
(3) Tamb = −40 °C.
Fig.7 DC current gain as a function of collector
current; typical values.
Fig.8 Collector-emitter saturation voltage as a
function of collector current; typical values.
MBK782
MBK781
2
−10
−10
handbook, halfpage
handbook, halfpage
V
i(on)
(V)
V
i(off)
(V)
−10
(1)
(2)
−1
(1) (2)(3)
(3)
−1
−1
−1
−10
−10
−2
−1
−1
2
−10
−10
−1
−10
−10
−1
−10
−10
I
(mA)
I
(mA)
C
C
TR2 (PNP); VCE = −5 V.
(1) Tamb = −40 °C.
TR2 (PNP); VCE = −0.3 V.
(1) Tamb = −40 °C.
(2)
Tamb = 25 °C.
(2)
Tamb = 25 °C.
(3) Tamb = 100 °C.
(3) Tamb = 100 °C.
Fig.9 Input-off voltage as a function of collector
current; typical values.
Fig.10 Input-on voltage as a function of collector
current; typical values.
2001 Feb 16
6
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistors
PUMD3
PACKAGE OUTLINE
Plastic surface mounted package; 6 leads
SOT363
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1
index
A
A
1
1
2
3
c
e
1
b
L
p
w
M B
p
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
UNIT
A
b
c
D
E
e
e
H
L
Q
v
w
y
p
p
1
E
max
0.30
0.20
1.1
0.8
0.25
0.10
2.2
1.8
1.35
1.15
2.2
2.0
0.45
0.15
0.25
0.15
mm
0.1
1.3
0.65
0.2
0.2
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
97-02-28
SOT363
SC-88
2001 Feb 16
7
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistors
PUMD3
DATA SHEET STATUS
PRODUCT
DATA SHEET STATUS
STATUS
DEFINITIONS (1)
Objective specification
Development This data sheet contains the design target or goal specifications for
product development. Specification may change in any manner without
notice.
Preliminary specification Qualification
This data sheet contains preliminary data, and supplementary data will be
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
Product specification
Production
This data sheet contains final specifications. Philips Semiconductors
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information
Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2001 Feb 16
8
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistors
PUMD3
NOTES
2001 Feb 16
9
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistors
PUMD3
NOTES
2001 Feb 16
10
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistors
PUMD3
NOTES
2001 Feb 16
11
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71
SCA
© Philips Electronics N.V. 2001
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613514/05/pp12
Date of release: 2001 Feb 16
Document order number: 9397 750 08014
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