934066941115 [NXP]

50A, 30V, 0.0124ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, LFPAK33-4;
934066941115
型号: 934066941115
厂家: NXP    NXP
描述:

50A, 30V, 0.0124ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, LFPAK33-4

开关 脉冲 晶体管
文件: 总14页 (文件大小:365K)
中文:  中文翻译
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PSMN9R8-30MLC  
AK33  
LFP  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using  
NextPower Technology  
Rev. 3 — 15 June 2012  
Product data sheet  
1. Product profile  
1.1 General description  
Logic level enhancement mode N-channel MOSFET in LFPAK33 package. This product is  
designed and qualified for use in a wide range of industrial, communications and domestic  
equipment.  
1.2 Features and benefits  
Low parasitic inductance and  
Ultra low QG, QGD, & QOSS for high  
system efficiencies at low and high  
loads  
resistance  
Optimised for 4.5V Gate drive utilising  
NextPower Superjunction technology  
1.3 Applications  
DC-to-DC converters  
Load switching  
Synchronous buck regulator  
1.4 Quick reference data  
Table 1.  
Symbol  
VDS  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
30  
Unit  
V
drain-source voltage  
drain current  
Tj = 25 °C  
-
-
-
-
-
ID  
Tmb = 25 °C; VGS = 10 V; see Figure 1  
-
50  
A
Ptot  
total power dissipation Tmb = 25 °C; see Figure 2  
junction temperature  
-
45  
W
Tj  
-55  
175  
°C  
Static characteristics  
RDSon drain-source on-state  
resistance  
VGS = 4.5 V; ID = 15 A; Tj = 25 °C;  
see Figure 10  
-
-
10.65 12.4  
m  
mΩ  
VGS = 10 V; ID = 15 A; Tj = 25 °C;  
see Figure 10  
8.5  
9.8  
Dynamic characteristics  
QGD  
gate-drain charge  
VGS = 4.5 V; ID = 15 A; VDS = 15 V;  
see Figure 12; see Figure 13  
-
-
1.5  
5
-
-
nC  
nC  
QG(tot)  
total gate charge  
VGS = 4.5 V; ID = 15 A; VDS = 15 V;  
see Figure 12; see Figure 13  
PSMN9R8-30MLC  
NXP Semiconductors  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using NextPower Technology  
2. Pinning information  
Table 2.  
Pinning information  
Symbol Description  
Pin  
1
Simplified outline  
Graphic symbol  
S
S
S
G
D
source  
source  
source  
gate  
D
S
2
3
G
4
mbb076  
mb  
mounting base; connected to  
drain  
1
2
3
4
SOT1210 (LFPAK33)  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
PSMN9R8-30MLC  
LFPAK33  
Plastic single ended surface mounted package (LFPAK33);  
4 leads  
SOT1210  
4. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
30  
Unit  
drain-source voltage  
gate-source voltage  
drain current  
Tj = 25 °C  
-
V
VGS  
-20  
20  
V
ID  
VGS = 10 V; Tmb = 25 °C; see Figure 1  
VGS = 10 V; Tmb = 100 °C; see Figure 1  
pulsed; tp 10 µs; Tmb = 25 °C; see Figure 4  
Tmb = 25 °C; see Figure 2  
-
50  
A
-
36  
A
IDM  
peak drain current  
-
202  
45  
A
Ptot  
total power dissipation  
storage temperature  
junction temperature  
peak soldering temperature  
-
W
°C  
°C  
°C  
V
Tstg  
Tj  
-55  
-55  
-
175  
175  
260  
-
Tsld(M)  
VESD  
Source-drain diode  
electrostatic discharge voltage MM (JEDEC JESD22-A115)  
140  
IS  
source current  
peak source current  
Tmb = 25 °C  
-
-
41  
A
A
ISM  
pulsed; tp 10 µs; Tmb = 25 °C  
202  
Avalanche ruggedness  
EDS(AL)S  
non-repetitive drain-source  
avalanche energy  
VGS = 10 V; Tj(init) = 25 °C; ID = 50 A;  
Vsup 30 V; RGS = 50 ; unclamped;  
see Figure 3  
-
8
mJ  
PSMN9R8-30MLC  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 15 June 2012  
2 of 14  
PSMN9R8-30MLC  
NXP Semiconductors  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using NextPower Technology  
003aaj426  
03na19  
120  
60  
I
D
P
(%)  
der  
(A)  
80  
40  
20  
40  
0
0
T
(°C)  
0
50  
100  
150  
200  
0
50  
100  
150  
200  
mb  
T
(°C)  
mb  
Fig 1. Continuous drain current as a function of  
mounting base temperature  
Fig 2. Normalized total power dissipation as a  
function of mounting base temperature  
003aaj427  
102  
I
AL  
(A)  
10  
(1)  
(2)  
1
10-1  
10-3  
10-2  
10-1  
1
10  
t
AL  
(ms)  
Fig 3. Single pulse avalanche rating; avalanche current as a function of avalanche time  
PSMN9R8-30MLC  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 15 June 2012  
3 of 14  
PSMN9R8-30MLC  
NXP Semiconductors  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using NextPower Technology  
003aaj428  
103  
I
D
(A)  
Limit RDSon = VDS / ID  
102  
tp =10 μs  
100 μs  
10  
1
DC  
1 ms  
10 ms  
100 ms  
10-1  
10-1  
1
10  
102  
V
(V)  
DS  
Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage  
5. Thermal characteristics  
Table 5.  
Symbol  
Rth(j-mb)  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
thermal resistance from  
junction to mounting base  
see Figure 5  
-
3.1  
3.32  
K/W  
003aaj429  
10  
Z
th(j-mb)  
(K/W)  
δ = 0.5  
1
0.2  
0.1  
0.05  
t
p
P
10-1  
δ =  
T
0.02  
single shot  
t
t
p
T
10-2  
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
1
tp (s)  
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration  
PSMN9R8-30MLC  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 15 June 2012  
4 of 14  
PSMN9R8-30MLC  
NXP Semiconductors  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using NextPower Technology  
6. Characteristics  
Table 6.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS  
drain-source  
breakdown voltage  
ID = 250 µA; VGS = 0 V; Tj = 25 °C  
ID = 250 µA; VGS = 0 V; Tj = -55 °C  
30  
27  
1.3  
-
-
V
V
V
-
-
VGS(th)  
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C  
voltage  
1.64  
1.95  
VGS(th)/T  
gate-source threshold  
voltage variation with  
temperature  
-
-4  
-
mV/K  
IDSS  
drain leakage current  
VDS = 30 V; VGS = 0 V; Tj = 25 °C  
VDS = 30 V; VGS = 0 V; Tj = 150 °C  
VGS = 16 V; VDS = 0 V; Tj = 25 °C  
VGS = -16 V; VDS = 0 V; Tj = 25 °C  
-
-
-
-
-
-
-
-
-
1
µA  
µA  
nA  
nA  
mΩ  
100  
100  
100  
IGSS  
gate leakage current  
RDSon  
drain-source on-state  
resistance  
VGS = 4.5 V; ID = 15 A; Tj = 25 °C;  
see Figure 10  
10.65 12.4  
VGS = 4.5 V; ID = 15 A; Tj = 150 °C;  
see Figure 11; see Figure 10  
-
-
21.1  
9.8  
mΩ  
mΩ  
VGS = 10 V; ID = 15 A; Tj = 25 °C;  
-
8.5  
-
see Figure 10  
VGS = 10 V; ID = 15 A; Tj = 150 °C;  
see Figure 11; see Figure 10  
-
16.75 mΩ  
RG  
gate resistance  
f = 1 MHz  
0.9  
1.8  
3.6  
Dynamic characteristics  
QG(tot)  
total gate charge  
ID = 15 A; VDS = 15 V; VGS = 10 V;  
see Figure 12; see Figure 13  
-
-
10.9  
5
-
-
nC  
nC  
ID = 15 A; VDS = 15 V; VGS = 4.5 V;  
see Figure 12; see Figure 13  
ID = 0 A; VDS = 0 V; VGS = 10 V  
-
-
-
10  
2
-
-
-
nC  
nC  
nC  
QGS  
gate-source charge  
ID = 15 A; VDS = 15 V; VGS = 4.5 V;  
see Figure 12; see Figure 13  
QGS(th)  
pre-threshold  
1.2  
gate-source charge  
QGS(th-pl)  
post-threshold  
-
0.8  
-
nC  
gate-source charge  
QGD  
gate-drain charge  
-
-
1.5  
3.1  
-
-
nC  
V
VGS(pl)  
gate-source plateau  
voltage  
ID = 15 A; VDS = 15 V;  
see Figure 12; see Figure 13  
Ciss  
Coss  
Crss  
input capacitance  
output capacitance  
VDS = 15 V; VGS = 0 V; f = 1 MHz;  
Tj = 25 °C; see Figure 14  
-
-
-
690  
170  
52  
-
-
-
pF  
pF  
pF  
reverse transfer  
capacitance  
PSMN9R8-30MLC  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 15 June 2012  
5 of 14  
PSMN9R8-30MLC  
NXP Semiconductors  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using NextPower Technology  
Table 6.  
Symbol  
td(on)  
tr  
Characteristics …continued  
Parameter  
Conditions  
Min  
Typ  
7.4  
7.7  
11.7  
5.3  
4.9  
Max  
Unit  
ns  
turn-on delay time  
rise time  
VDS = 15 V; RL = 1 ; VGS = 4.5 V;  
RG(ext) = 5 Ω  
-
-
-
-
-
-
-
-
-
-
ns  
td(off)  
tf  
turn-off delay time  
fall time  
ns  
ns  
Qoss  
output charge  
VGS = 0 V; VDS = 15 V; f = 1 MHz;  
Tj = 25 °C  
nC  
Source-drain diode  
VSD  
source-drain voltage  
IS = 15 A; VGS = 0 V; Tj = 25 °C;  
see Figure 15  
-
0.84  
1.1  
V
trr  
Qr  
ta  
reverse recovery time IS = 15 A; dIS/dt = -100 A/µs; VGS = 0 V;  
-
-
-
12.9  
5.3  
-
-
-
ns  
nC  
ns  
V
DS = 15 V  
recovered charge  
reverse recovery rise  
time  
VGS = 0 V; IS = 15 A; dIS/dt = -100 A/µs;  
7.9  
VDS = 15 V; see Figure 16  
tb  
reverse recovery fall  
time  
-
5
-
ns  
003aaj430  
003aaj431  
50  
40  
30  
20  
10  
0
30  
I
4.5  
3.5  
10  
D
(A)  
R
DSon  
(mΩ)  
20  
3
2.8  
2.6  
10  
2.4  
2.2  
VGS (V) =  
0
0
1
2
3
4
0
4
8
12  
16  
V
(V)  
V
(V)  
GS  
DS  
Fig 6. Output characteristics; drain current as a  
function of drain-source voltage; typical values  
Fig 7. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
PSMN9R8-30MLC  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 15 June 2012  
6 of 14  
PSMN9R8-30MLC  
NXP Semiconductors  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using NextPower Technology  
003aaj432  
003aaj433  
60  
50  
I
D
g
(A)  
fs  
(S)  
40  
40  
30  
20  
20  
10  
0
Tj = 150 °C  
Tj = 25 °C  
0
0
10  
20  
30  
40  
50  
0
1
2
3
4
I
(A)  
V
(V)  
D
GS  
Fig 8. Forward transconductance as a function of  
drain current; typical values  
Fig 9. Transfer characteristics; drain current as a  
function of gate-source voltage; typical values  
003aaj436  
003aaj437  
50  
2
2.8  
3
R
DSon  
(mΩ)  
a
10V  
40  
1.5  
VGS=4.5V  
30  
20  
10  
0
3.5  
4.5  
1
0.5  
0
VGS (V) =10  
5
15  
25  
35  
45  
55  
-60  
0
60  
120  
180  
I
(A)  
T (°C)  
D
j
Fig 10. Drain-source on-state resistance as a function  
of drain current; typical values  
Fig 11. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
PSMN9R8-30MLC  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 15 June 2012  
7 of 14  
PSMN9R8-30MLC  
NXP Semiconductors  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using NextPower Technology  
003aaj438  
10  
V
GS  
(V)  
V
DS  
8
I
D
6 V  
6
4
2
0
24 V  
15 V  
V
GS(pl)  
V
GS(th)  
GS  
VDS  
=
V
Q
Q
GS1  
GS2  
Q
Q
GD  
GS  
Q
G(tot)  
003aaa508  
0
5
10  
15  
Q
(nC)  
G
Fig 12. Gate charge waveform definitions  
Fig 13. Gate-source voltage as a function of gate  
charge; typical values  
003aaj439  
003aaj440  
103  
50  
I
S
Ciss  
C
(A)  
(pF)  
40  
Coss  
30  
20  
102  
Crss  
Tj = 150°C  
10  
Tj = 25 °C  
10  
10-1  
0
1
10  
102  
0
0.3  
0.6  
0.9  
1.2  
V
(V)  
V
(V)  
SD  
DS  
Fig 14. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
Fig 15. Source current as a function of source-drain  
voltage; typical values  
PSMN9R8-30MLC  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 15 June 2012  
8 of 14  
PSMN9R8-30MLC  
NXP Semiconductors  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using NextPower Technology  
003aaf 444  
ID  
(A)  
trr  
ta  
tb  
0
0.25 I  
RM  
IRM  
t (s)  
Fig 16. Reverse recovery timing definition  
PSMN9R8-30MLC  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 15 June 2012  
9 of 14  
PSMN9R8-30MLC  
NXP Semiconductors  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using NextPower Technology  
7. Package outline  
Plastic single ended surface mounted package (LFPAK33); 8 leads  
SOT1210  
A
E
A
e
1
c
1
b
1
E
L
1
mounting  
base  
D
1
D
H
1
4
e
X
b
w
A
c
A
1
C
θ
Lp  
y
C
detail X  
0
1
2.5  
5 mm  
L
scale  
Dimensions  
(1)  
(1)  
(1)  
Unit  
A
A
1
b
b
1
c
c
D
D
E
E
e
e
1
H
L
p
w
y
θ
1
1
°
max 0.90 0.10 0.35 0.35 0.20 0.30 2.70 2.35 3.40 2.45  
mm nom  
3.40 0.25 0.50  
3.20 0.13 0.30  
8
0
0.65 0.65  
0.20 0.10  
°
0.80 0.00 0.25 0.25 0.10 0.20 2.50 1.90 3.20 2.00  
min  
Note  
1. Plastic or metal protrusions of 0.15 mm per side are not included.  
sot1210_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
JEITA  
11-12-19  
12-03-12  
SOT1210  
Fig 17. Package outline SOT1210 (LFPAK33)  
PSMN9R8-30MLC  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 15 June 2012  
10 of 14  
PSMN9R8-30MLC  
NXP Semiconductors  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using NextPower Technology  
8. Revision history  
Table 7.  
Document ID  
PSMN9R8-30MLC v.3 20120615  
Revision history  
Release date  
Data sheet status  
Change notice  
Supersedes  
Product data sheet  
-
PSMN9R8-30MLC v.2  
Modifications:  
Status changed from objective to product.  
Various changes to content.  
PSMN9R8-30MLC v.2 20120607  
Objective data sheet  
-
PSMN9R8-30MLC v.1  
PSMN9R8-30MLC  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 15 June 2012  
11 of 14  
PSMN9R8-30MLC  
NXP Semiconductors  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using NextPower Technology  
9. Legal information  
9.1 Data sheet status  
Document status[1] [2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term 'short data sheet' is explained in section "Definitions".  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product  
status information is available on the Internet at URLhttp://www.nxp.com.  
Right to make changes — NXP Semiconductors reserves the right to make  
9.2 Definitions  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Preview — The document is a preview version only. The document is still  
subject to formal approval, which may result in modifications or additions.  
NXP Semiconductors does not give any representations or warranties as to  
the accuracy or completeness of information included herein and shall have  
no liability for the consequences of use of such information.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer’s own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
9.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with theTerms and conditions of commercial sale of NXP Semiconductors.  
PSMN9R8-30MLC  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 15 June 2012  
12 of 14  
PSMN9R8-30MLC  
NXP Semiconductors  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using NextPower Technology  
Terms and conditions of commercial sale — NXP Semiconductors  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
products are sold subject to the general terms and conditions of commercial  
sale, as published athttp://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
9.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
Export control — This document as well as the item(s) described herein may  
be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Adelante,Bitport,Bitsound,CoolFlux,CoReUse,DESFire,EZ-HV,FabKey,G  
reenChip,HiPerSmart,HITAG,I²C-bus  
logo,ICODE,I-CODE,ITEC,Labelution,MIFARE,MIFARE Plus,MIFARE  
Ultralight,MoReUse,QLPAK,Silicon  
Tuner,SiliconMAX,SmartXA,STARplug,TOPFET,TrenchMOS,TriMedia  
andUCODE — are trademarks of NXP B.V.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. NXP  
Semiconductors accepts no liability for inclusion and/or use of  
non-automotive qualified products in automotive equipment or applications.  
HD Radio andHD Radio logo — are trademarks of iBiquity Digital  
Corporation.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without NXP Semiconductors’ warranty of the  
10. Contact information  
For more information, please visit:http://www.nxp.com  
For sales office addresses, please send an email to:salesaddresses@nxp.com  
PSMN9R8-30MLC  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 3 — 15 June 2012  
13 of 14  
PSMN9R8-30MLC  
NXP Semiconductors  
N-channel 30 V 9.8 mlogic level MOSFET in LFPAK33 using NextPower Technology  
11. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
General description . . . . . . . . . . . . . . . . . . . . . .1  
Features and benefits. . . . . . . . . . . . . . . . . . . . .1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
Quick reference data . . . . . . . . . . . . . . . . . . . . .1  
1.1  
1.2  
1.3  
1.4  
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2  
Ordering information. . . . . . . . . . . . . . . . . . . . . .2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2  
Thermal characteristics . . . . . . . . . . . . . . . . . . .4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11  
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .12  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .12  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
9.1  
9.2  
9.3  
9.4  
10  
Contact information. . . . . . . . . . . . . . . . . . . . . .13  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2012.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 15 June 2012  
Document identifier: PSMN9R8-30MLC  

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