935029530602 [NXP]
F/FAST SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, PDIP14, 0.300 INCH, PLASTIC, MO-001AA, SOT-27-1, DIP-14;
| 型号： | 935029530602 |
| 厂家： | 
NXP |
| 描述： | F/FAST SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, PDIP14, 0.300 INCH, PLASTIC, MO-001AA, SOT-27-1, DIP-14 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总11页 (文件大小：165K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F280B
9-bit odd/even parity generator/checker
Product specification
IC15 Data Handbook
1996 Mar 12
Philips
Semiconductors
Philips Semiconductors
Product specification
9-bit odd/even parity generator/checker
74F280B
FEATURES
PIN CONFIGURATION
• High-impedance NPN base inputs for reduced loading
(20µA in Low and High states)
1
2
3
4
5
14
13
12
11
10
I
I
V
6
CC
• Buffered inputs — one normalized load
I
7
5
NC
I
4
• Word length easily expanded by cascading
• Industrial temperature range available (–40°C to +85°C)
I
I
8
3
Σ
I
E
2
Σ
6
7
9
8
I
O
1
DESCRIPTION
The 74F280B is a 9-bit Parity Generator or Checker commonly used
GND
I
0
to detect errors in high speed data transmission or data retrieval
systems. Both Even (∑ ) and Odd (∑ ) parity outputs are available
E
O
SF00849
for generating or checking even or odd parity on up to 9 bits.
The Even (∑ ) parity output is High when an even number of Data
E
inputs (I - I ) are High. The Odd (∑ ) parity output is High when an
0
8
O
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
odd number of Data inputs are High.
TYPE
Expansion to larger word sizes is accomplished by tying the Even
(∑ ) outputs of up to nine parallel devices to the data inputs of the
E
74F280B
5.5ns
26mA
final stage. This expansion scheme allows an 81-bit data word to be
checked in less than 20ns.
ORDERING INFORMATION
COMMERCIAL RANGE
INDUSTRIAL RANGE
= 5V ±10%,
V
CC
= 5V ±10%,
V
CC
DESCRIPTION
PKG. DWG. #
T
amb
= 0°C to +70°C
T
amb
= –40°C to +85°C
14-pin plastic DIP
14-pin plastic SO
N74F280BN
N74F280BD
I74F280BN
SOT27-1
I74F280BD
SOT108-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
PINS
I - I
DESCRIPTION
Data inputs
1.0/0.033
50/33
20µA/20µA
0
8
∑ , ∑
Parity outputs
1.0mA/20mA
E
O
NOTE:
One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
8
9
10 11 12 13
1
2
4
8
9
2K
10
11
12
13
1
I
I
I
I
I
I
I
I
I
8
0
1
2
3
4
5
6
7
5
6
Σ
Σ
E
Σ
Σ
O
E
O
2
5
6
4
V
=Pin 14
CC
GND=Pin 7
SF00845
SF00846
2
1996 Mar 12
853-0363 16555
Philips Semiconductors
Product specification
9-bit odd/even parity generator/checker
74F280B
LOGIC DIAGRAM
8
I
0
9
I
1
10
5
I
Σ
2
E
11
I
3
12
I
4
13
I
5
6
Σ
O
1
I
6
2
I
7
4
I
8
V
=Pin 14
CC
GND=Pin 7
SF00847
FUNCTION TABLE
INPUTS
OUTPUTS
Number of High Data Inputs (I - I )
∑
∑
O
0
8
E
Even — 0, 2, 4, 6, 8
H
L
Odd — 1, 3, 5, 7, 9
L
H
H = High voltage level
L
= Low voltage level
3
1996 Mar 12
Philips Semiconductors
Product specification
9-bit odd/even parity generator/checker
74F280B
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
UNIT
V
V
Supply voltage
Input voltage
Input current
V
V
CC
IN
I
IN
mA
V
V
Voltage applied to output in High output state
Current applied to output in Low output state
–0.5 to V
40
OUT
OUT
CC
I
mA
°C
°C
°C
Commercial range
Industrial range
0 to +70
–40 to +85
–65 to +150
T
amb
Operating free-air temperature range
Storage temperature
T
stg
RECOMMENDED OPERATING CONDITIONS
LIMITS
Nom
SYMBOL
PARAMETER
UNIT
Max
Min
4.5
2.0
V
CC
V
IH
V
IL
Supply voltage
5.0
5.5
V
V
High-level input voltage
Low-level input voltage
Input clamp current
0.8
–18
–1
V
I
I
I
mA
mA
mA
°C
°C
IK
High-level output current
Low-level output current
OH
OL
20
Commercial range
Industrial range
0
70
T
amb
Operating free-air temperature range
–40
85
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
1
SYMBOL PARAMETER TEST CONDITIONS
UNIT
V
2
MIN
2.5
TYP
MAX
V
V
V
V
V
V
= MIN, V = MAX ±10%V
CC
IL
CC
V
High-level output voltage
OH
= MIN, I = MAX
±5%V
2.7
3.4
0.35
0.35
–0.73
IH
OH
CC
= MIN, V = MAX ±10%V
0.50
0.50
–1.2
100
20
CC
IL
CC
CC
V
V
Low-level output voltage
V
OL
= MIN, I = MAX
±5%V
IH
OL
Input clamp voltage
= MIN, I = I
IK
V
IK
CC
CC
I
I
Input current at maximum input voltage
= 0.0V, V = 7.0V
µA
µA
µA
µA
mA
mA
I
I
Commercial range
I
High-level input current
V = MAX, V = 2.7V
CC I
IH
Industrial range
40
I
I
I
Low-level input current
Short-circuit output current
Supply current (total)
V
CC
V
CC
V
CC
= MAX, V = 0.5V
–20
–150
35
IL
I
3
= MAX
= MAX
–60
OS
CC
26
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T = 25°C.
CC
amb
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
4
1996 Mar 12
Philips Semiconductors
Product specification
9-bit odd/even parity generator/checker
74F280B
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
V
= +25°C
T
V
= 0°C to +70°C
= +5.V ± 10%
T
= -40°C to +85°C
amb
amb
CC
amb
V
= +5.V
= +5.V ± 10%
TEST
CONDITIONS
CC
CC
SYMBOL
PARAMETER
UNIT
C = 50pF,
R = 500Ω
L
C = 50pF,
R = 500Ω
L
C = 50pF,
L
R = 500Ω
L
L
L
Min
Typ
Max
Min
Max
Min
Max
t
t
Propagation delay
I - I to Σ
4.0
4.0
6.5
7.0
9.0
10.0
3.5
3.5
10.0
11.1
3.0
3.5
11.0
12.0
ns
ns
PLH
PHL
Waveform 1, 2
Waveform 1, 2
0
8
E
74F280B
t
t
Propagation delay
I - I to Σ
4.0
4.0
6.5
7.0
9.0
10.0
3.5
3.5
10.0
11.0
3.0
3.5
11.0
12.0
ns
ns
PLH
PHL
0
8
O
AC WAVEFORMS
For all waveforms, V =1.5V.
M
V
V
M
V
M
V
M
M
I
0
- I
8
I
0
- I
8
t
t
PHL
t
t
PLH
PHL
PLH
Σ
Σ
O
E,
V
V
M
V
V
M
M
M
Σ
Σ
O
E,
SF00848
SF00850
Waveform 1. Propagation Delay for Inverting Outputs
Waveform 2. Propagation Delay for Non-Inverting Outputs
TEST CIRCUIT AND WAVEFORM
t
w
AMP (V)
0V
V
CC
90%
90%
NEGATIVE
PULSE
V
V
M
M
10%
10%
V
V
OUT
IN
PULSE
GENERATOR
D.U.T.
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
t
t )
T
L
t
t )
TLH ( r
THL ( f
AMP (V)
0V
90%
M
90%
POSITIVE
PULSE
V
V
M
10%
10%
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
R
L
C
L
R
T
=
=
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
family
74F
V
rep. rate
t
w
t
t
THL
amplitude
M
TLH
Termination resistance should be equal to Z
pulse generators.
of
OUT
2.5ns 2.5ns
3.0V
1.5V
1MHz
500ns
SF00006
5
1996 Mar 12
Philips Semiconductors
Product specification
74F280B
9-bit parity odd/even parity generator/checker
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
6
1996 Mar 12
Philips Semiconductors
Product specification
74F280B
9-bit parity odd/even parity generator/checker
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
7
1996 Mar 12
Philips Semiconductors
Product specification
74F280B
9-bit parity odd/even parity generator/checker
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1999
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Date of release: 12-99
Document order number:
9397 750 06706
Philips
Semiconductors
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74F280B; 9-bit
odd/even parity
generator/checker
download datasheet
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Block diagram
Features
Applications
Datasheet
Buy online
Parametrics
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General description
The 74F280B is a 9-bit Parity Generator or Checker commonly used to detect errors in high speed data
transmission or data retrieval systems. Both Even (∑E) and Odd (∑O) parity outputs are available for generating
or checking even or odd parity on up to 9 bits.
Catalog by
System
•
Cross-reference
Packages
•
•
The Even (∑E) parity output is High when an even number of Data inputs (I0 - I8) are High. The Odd (∑O) parity
End of Life
information
Distributors Go
Here!
•
•
output is High when an odd number of Data inputs are High.
Expansion to larger word sizes is accomplished by tying the Even (∑E) outputs of up to nine parallel devices to
the data inputs of the final stage. This expansion scheme allows an 81-bit data word to be checked in less than
20ns.
Models
•
•
SoC solutions
Features
●
●
●
●
High-impedance NPN base inputs for reduced loading (20µA in Low and High states)
Buffered inputs - one normalized load
Word length easily expanded by cascading
Industrial temperature range available (-40°C to +85°C)
Applications
AN202_1: Testing and specifying FAST logic (date 01-Jun-87)
AN2021_1: Thermal considerations for FAST logic products (date 13-Mar-95)
AN203_2: Test Fixtures for High Speed Logic (date 02-Apr-98)
AN216_2: Arbitration in shared resource systems (date 18-Jul-88)
Datasheet
Type
number
Title
Publication
release date
Datasheet status Page
File Datasheet
count size
(kB)
74F280B
9-bit odd/even parity
generator/checker
3/12/1996
Product
specification
8
90
Download
Blockdiagram(s)
Block diagram of
N74F280BN
Parametrics
Type
number
Package Description
Propagation Voltage No. Power
Logic
Switching Drive
Pins Considerations Levels Capability
Output
Delay(ns)
of Dissipation
9-Bit Odd/Even
SOT108-
5 Volts
+
I74F280BD
I74F280BN
N74F280BD
N74F280BN
Parity
1 (SO14)
10~15
14 None
14 None
14 None
14 None
TTL
TTL
TTL
TTL
Low
Generator/Checker
9-Bit Odd/Even
SOT27-1
5 Volts
+
Parity
Generator/Checker
10~15
Low
Low
Low
(DIP14)
9-Bit Odd/Even
SOT108-
5 Volts
+
Parity
1 (SO14)
10~15
Generator/Checker
9-Bit Odd/Even
SOT27-1
5 Volts
+
Parity
Generator/Checker
10~15
(DIP14)
Products, packages, availability and ordering
Type
North
Ordering code Marking/Packing Package Device status Buy online
Discretes
number
American
type number
(12NC)
packing info
Standard Marking
I74F280BD I74F280BD 9350 295 20602 * Tube
(Signetics)
SOT108-1
(SO14)
Full production
Full production
Standard Marking
* Reel Pack,
SMD, 13"
SOT108-1
(SO14)
I74F280B D 9350 295 20623
(Signetics)
Standard Marking
SOT27-1
(DIP14)
I74F280BN I74F280BN 9350 295 30602 * Tube
(Signetics)
Standard Marking
N74F280BD N74F280BD 9338 290 10602 * Tube
(Signetics)
Full production
Full production
SOT108-1
(SO14)
Standard Marking
* Reel Pack,
SMD, 13"
SOT108-1
(SO14)
N74F280BD-
T
9338 290 10623
Full production
Full production
(Signetics)
Standard Marking
N74F280BN N74F280BN 9338 290 00602 * Tube
(Signetics)
SOT27-1
(DIP14)
Products in the above table are all in production. Some variants are discontinued; click here for information on
these variants.
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or related to the type number(s) as listed on this page. The similar products page includes products from the
same catalog tree(s), relevant selection guides and products from the same functional category.
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