935173410118 [NXP]
ABT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, 7.50 MM, PLASTIC, MO-118, SOT-370-1, SSOP-48;
| 型号： | 935173410118 |
| 厂家： | 
NXP |
| 描述： | ABT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, 7.50 MM, PLASTIC, MO-118, SOT-370-1, SSOP-48 驱动 光电二极管 输出元件 |
| 文件： | 总13页 (文件大小：117K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74ABT16374B
16-bit D-type flip-flop;
positive-edge trigger (3-State)
Product data
2004 Mar 08
Supersedes data of 2004 Mar 01
Philips
Semiconductors
Philips Semiconductors
Product data
16-bit D-type flip-flop; positive-edge trigger
(3-State)
74ABT16374B
DESCRIPTION
FEATURES
The 74ABT16374B high-performance BiCMOS device combines
low static and dynamic power dissipation with high speed and high
output drive.
• Two 8-bit positive edge triggered registers
• Live insertion/extraction permitted
• Power-up 3-State
The 74ABT16374B has two 8-bit, edge triggered registers, with each
register coupled to eight 3-State output buffers. The two sections of
each register are controlled independently by the clock (nCP) and
Output Enable (nOE) control gates.
• Power-up reset
• Multiple V and GND pins minimize switching noise
CC
• 3-State output buffers
• Output capability: +64 mA/–32 mA
• Latch-up protection exceeds 500mA per JEDEC Std 17
Each register is fully edge triggered. The state of each D input, one
set-up time before the LOW-to-HIGH clock transition, is transferred
to the corresponding flip-flop’s Q output.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. Each
active-LOW Output Enable (nOE) controls all eight 3-State buffers
for its register independent of the clock operation.
• ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
When nOE is LOW, the stored data appears at the outputs for that
register. When nOE is HIGH, the outputs for that register are in the
high-impedance “OFF” state, which means they will neither drive nor
load the bus.
QUICK REFERENCE DATA
CONDITIONS
= 25 °C; GND = 0 V
SYMBOL
PARAMETER
TYPICAL
UNIT
T
amb
t
t
Propagation delay
nCP to nQx
2.6
2.2
PLH
PHL
C = 50 pF; V = 5 V
ns
L
CC
C
Input capacitance
Output capacitance
V = 0 V or V
CC
4
7
pF
pF
IN
I
C
V = 0V or V ; 3-State
O CC
OUT
CCZ
I
Outputs disabled; V = 5.5 V
500
8
µA
mA
CC
Quiescent supply current
I
Outputs LOW; V = 5.5 V
CC
CCL
ORDERING INFORMATION
T
amb
= –40 °C to +85 °C
Package
Name
Type number
Description
Version
74ABT16374BB
QFP52
plastic quad flat package; 52 leads (lead length 1.6 mm); body 10 × 10 × 2.0 mm
plastic thin shrink small outline package; 48 leads; body width 6.1 mm
plastic shrink small outline package; 48 leads; body width 7.5 mm
SOT379-1
SOT362-1
SOT370-1
74ABT16374BDGG
74ABT16374BDL
TSSOP48
SSOP48
2
2004 Mar 08
Philips Semiconductors
Product data
16-bit D-type flip-flop; positive-edge trigger
(3-State)
74ABT16374B
PIN CONFIGURATION
TSSOP48 and SSOP48 pinning
QFP52 pinning
1
2
48
47
1OE
1Q0
1Q1
GND
1Q2
1Q3
1CP
1D0
3
46 1D1
GND
1D2
4
45
44
V
1
2
3
4
5
6
7
8
9
39
V
CC
CC
5
1Q4
1Q5
GND
1Q6
1Q7
GND
2Q0
2Q1
38 1D4
37 1D5
36 GND
35 1D6
34 1D7
33 GND
32 2D0
31 2D1
30 GND
29 2D2
28 2D3
6
43 1D3
7
42
41
40
39
38
37
36
35
34
33
32
31
30
V
V
CC
CC
8
1Q4
1Q5
1D4
1D5
9
74ABT16374BB
GND
GND
10
11
12
13
14
15
16
17
18
19
QFP52
1Q6
1Q7
2Q0
2Q1
GND
1D6
1D7
2D0
2D1
GND
GND 10
2Q2 11
2Q3 12
2Q2
2Q3
2D2
2D3
V
13
27
V
CC
CC
V
V
CC
CC
2Q4
2D4
2Q5 20
29 2D5
SW02219
21
22
23
24
28
27
26
25
GND
2Q6
GND
2D6
2Q7
2OE
2D7
2CP
SA00326
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
TSSOP and SSOP
QFP52
47, 46, 44, 43, 41, 40, 38, 37
36, 35, 33, 32, 30, 29, 27, 26
44, 43, 41, 40, 38, 37, 35, 34
32, 31, 29, 28, 26, 25, 23, 22
1D0 – 1D7
2D0 – 2D7
Data inputs
Data outputs
2, 3, 5, 6, 8, 9, 11, 12
13, 14, 16, 17, 19, 20, 22, 23
48, 49, 51, 52, 2, 3, 5, 6
8, 9, 11, 12, 14, 15, 17, 18
1Q0 – 1Q7
2Q0 – 2Q7
1, 24
47, 19
45, 21
1OE, 2OE
1CP, 2CP
Output enable inputs (active-LOW)
Clock pulse inputs (active rising edge)
48, 25
4, 7, 10, 16, 20, 24, 30, 33,
36, 42, 46, 50
4, 10, 15, 21, 28, 34, 39, 45
7, 18, 31, 42
GND
Ground (0 V)
1, 13, 27, 39
V
CC
Positive supply voltage
3
2004 Mar 08
Philips Semiconductors
Product data
16-bit D-type flip-flop; positive-edge trigger
(3-State)
74ABT16374B
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
1
48
24
25
47 46 44 43 41 40 38 37
1OE
1CP
2OE
2CP
1EN
C1
2EN
C2
1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7
1CP
48
1
1OE
47
46
44
43
2
1D
1
1D0
1D1
1D2
1D3
1D4
1D5
1D6
1D7
2D0
1Q0
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
2Q0
1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7
3
5
2
3
5
6
8
9
11 12
6
36 35 33 32 30 29 27 26
41
40
8
9
2D0 2D21 2D2 2D3 2D4 2D5 2D6 2D7
38
37
11
12
13
25
24
2CP
2OE
36
2
2D
2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7
35
33
14
16
2D1
2D2
2D3
2D4
2D5
2D6
2D7
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
13 14 16 17 19 20 22 23
SH00078
32
30
29
17
19
20
27
26
22
23
SH00077
LOGIC DIAGRAM
nD0
nD1
nD2
nD3
nD4
nD5
nD6
nD7
D
D
D
D
D
D
D
D
CP
Q
CP
Q
CP
Q
CP
Q
CP
Q
CP
Q
CP
Q
CP Q
nCP
nOE
nQ0
nQ1
nQ2
nQ3
nQ4
nQ5
nQ6
nQ7
SA00327
FUNCTION TABLE
INPUTS
OUTPUTS
nQ0 – nQ7
INTERNAL
REGISTER
OPERATING MODE
nOE
nCP
nDx
L
L
↑
↑
l
h
L
H
L
H
Load and read register
Hold
L
↑
X
NC
NC
H
H
↑
↑
X
nDx
NC
nDx
Z
Z
Disable outputs
H
h
L
l
=
=
=
=
HIGH voltage level
HiIGH voltage level one set-up time prior to the HIGH-to-LOW E transition
LOW voltage level
LOW voltage level one set-up time prior to the HIGH-to-LOW E transition
NC= No change
X
Z
↑
=
=
=
=
Don’t care
High-impedance “off” state
LOW-to-HIGH clock transition
Not a LOW-to-HIGH clock transition
↑
4
2004 Mar 08
Philips Semiconductors
Product data
16-bit D-type flip-flop; positive-edge trigger
(3-State)
74ABT16374B
1, 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
UNIT
V
V
CC
I
IK
–0.5 to +7.0
–18
DC input diode current
V < 0 V
I
mA
V
3
V
I
DC input voltage
–1.2 to +7.0
–50
I
DC output diode current
V
O
< 0 V
mA
V
OK
3
V
OUT
DC output voltage
output in Off or HIGH state
output in LOW state
–0.5 to +5.5
128
mA
mA
°C
I
DC output current
OUT
output in HIGH state
–64
T
stg
Storage temperature range
–65 to 150
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 °C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
4.5
0
MAX
V
CC
DC supply voltage
5.5
V
V
V
I
Input voltage
V
CC
V
HIGH-level input voltage
LOW-level Input voltage
HIGH-level output current
LOW-level output current
Input transition rise or fall rate
Operating free-air temperature range
2.0
–
–
V
IH
V
0.8
–32
64
V
IL
I
–
mA
mA
ns/V
°C
OH
I
OL
–
∆t/∆v
0
10
T
amb
–40
+85
5
2004 Mar 08
Philips Semiconductors
Product data
16-bit D-type flip-flop; positive-edge trigger
(3-State)
74ABT16374B
DC ELECTRICAL CHARACTERISTICS
LIMITS
T
= –40 °C
to +85 °C
amb
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25 °C
UNIT
MIN
TYP
–0.9
2.9
MAX
–1.2
–
MIN
–
MAX
–1.2
–
V
Input clamp voltage
V
V
V
V
V
V
V
V
V
= 4.5 V; I = –18 mA
–
2.5
3.0
2.0
–
V
V
IK
CC
CC
CC
CC
CC
CC
CC
CC
CC
IK
= 4.5 V; I = –3 mA; V = V or V
2.5
3.0
2.0
–
OH
I
IL
IH
IH
V
OH
HIGH-level output voltage
= 5.0 V; I = –3 mA; V = V or V
3.4
–
–
V
OH
I
IL
= 4.5 V; I = –32 mA; V = V or V
IH
2.4
–
–
V
OH
I
IL
V
OL
LOW-level output voltage
= 4.5 V; I = 64 mA; V = V or V
IH
0.42
0.13
0.01
±5.0
0.55
0.55
±1
0.55
0.55
±1
V
OL
I
IL
3
V
RST
Power-up output voltage
= 5.5 V; I = 1 mA; V = GND or V
CC
–
–
V
O
I
I
Input leakage current
= 5.5 V; V = V or GND
–
–
µA
µA
I
I
CC
I
Power-off leakage current
= 0.0 V; V or V ≤ 4.5 V
–
±100
–
±100
OFF
O
I
Power-up/down 3-State
= 2.1 V; V = 0.5 V;
O
CC
I
–
±5.0
±50
–
±50
µA
PU/PD
4
output current
V = GND or V ; V
I
= GND
OE
I
3-State output HIGH current
3-State output LOW current
V
= 5.5 V; V = 2.7 V; V = V or V
IH
–
–
0.5
10
–
–
10
µA
µA
OZH
CC
CC
O
I
IL
I
V
= 5.5 V; V = 0.5 V; V = V or V
IH
–0.5
–10
–10
OZL
O
I
IL
Output HIGH leakage
current
I
V
= 5.5 V; V = 5.5 V; V = GND or V
CC
–
–50
–
5.0
–70
0.5
50
–180
2
–
–50
–
50
–180
2
µA
mA
mA
CEX
CC
O
I
1
I
O
Output current
V
V
= 5.5 V; V = 2.5 V
O
CC
= 5.5 V; Outputs HIGH;
CC
I
I
CCH
V = GND or V
I
CC
V
CC
= 5.5 V; Outputs LOW;
I
Quiescent supply current
–
–
–
8
0.5
5
19
2
–
–
–
19
2
mA
mA
µA
CCL
V = GND or V
I
CC
V
CC
= 5.5 V; Outputs 3-State;
CCZ
V = GND or V
I
CC
Additional supply current
V
CC
= 5.5 V; one input at 3.4 V,
∆I
100
100
CC
2
per input pin
other inputs at V or GND
CC
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4 V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V between 0 V and 2.1 V with a transition time of up to 10 msec. From V = 2.1 V to V = 5 V ± 10% a
CC
CC
CC
transition time of up to 100 µsec is permitted.
5. Unused pins at V or GND.
CC
AC CHARACTERISTICS
GND = 0 V, t = t = 2.5 ns, C = 50 pF, R = 500 Ω
R
F
L
L
LIMITS
T
V
= +25 °C
= +5.0 V
T
V
= –40 to +85 °C
= +5.0V ± 0.5 V
amb
CC
amb
CC
SYMBOL
PARAMETER
WAVEFORM
UNIT
MIN
TYP
MAX
MIN
MAX
f
Maximum clock frequency
1
1
180
260
–
–
–
MHz
ns
MAX
t
t
Propagation delay
nCP to nQx
1.7
1.4
2.6
2.2
4.0
3.4
1.7
1.4
4.7
3.9
PLH
PHL
t
t
Output enable time
to HIGH and LOW level
3
4
1.3
1.3
2.4
2.3
3.7
3.4
1.3
1.3
4.7
4.6
PZH
PZL
ns
ns
t
t
Output disable time
from HIGH and LOW level
3
4
1.9
1.7
3.1
2.6
4.6
4.0
1.9
1.7
5.5
4.4
PHZ
PLZ
6
2004 Mar 08
Philips Semiconductors
Product data
16-bit D-type flip-flop; positive-edge trigger
(3-State)
74ABT16374B
AC SET-UP REQUIREMENTS
GND = 0 V, t = t = 2.5 ns, C = 50 pF, R = 500 Ω
R
F
L
L
LIMITS
T
V
= +25 °C
= +5.0 V
T
V
= –40 to +85 °C
= +5.0 V ± 0.5 V
amb
CC
amb
CC
SYMBOL
PARAMETER
WAVEFORM
UNIT
MIN
TYP
MIN
t (H)
t (L)
s
Set-up time, HIGH or LOW
nDx to nCP
1.0
1.0
0.3
0.1
1.0
1.0
s
2
2
1
ns
ns
ns
t (H)
Hold time, HIGH or LOW
nDx to nCP
1.0
1.0
–0.1
–0.3
1.0
1.0
h
t (L)
h
t (H)
nCP pulse width
HIGH or LOW
2.8
2.8
1.2
1.5
2.8
2.8
w
t (L)
w
AC WAVEFORMS
V
M
= 1.5V, V = GND to 3.0V
IN
1/f
MAX
V
V
OE
M
M
nCP
nQx
VM
t
VM
VM
t
t
PZH
PHZ
t
(H)
t (L)
w
w
V
V
OH
OH
t
PHL
PLH
–0.3V
0V
nQx
V
M
VM
VM
SA00328
SH00079
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
Waveform 3. 3-State Output Enable Time to HIGH Level and
Output Disable Time from HIGH Level
nDx
nCP
V
V
V
V
M
M
M
M
OE
V
V
M
M
t (H)
t
(H)
t (L)
t (L)
h
s
h
s
t
t
PLZ
PZL
V
V
M
M
V
M
nQx
V
V
+ 0.3V
OL
OL
NOTE: The shaded areas indicate when the input is permitted to
change for predictable output performance.
SA00329
SH00080
Waveform 2. Data Set-up and Hold Times
Waveform 4. 3-State Output Enable Time to LOW Level and
Output Disable Time from LOW Level
7
2004 Mar 08
Philips Semiconductors
Product data
16-bit D-type flip-flop; positive-edge trigger
(3-State)
74ABT16374B
TEST CIRCUIT AND WAVEFORM
t
W
V
AMP (V)
90%
CC
90%
7.0 V
NEGATIVE
PULSE
V
V
M
10%
M
10%
R
L
0 V
(t
V
V
OUT
IN
PULSE
GENERATOR
D.U.T.
t
t
(t
(t
)
t
t
)
THL
F
TLH
R
)
(t )
F
R
R
L
C
TLH
R
THL
T
L
AMP (V)
90%
M
90%
POSITIVE
PULSE
V
V
M
Test Circuit for 3-State Outputs
10%
10%
t
W
0 V
SWITCH POSITION
V
= 1.5 V
M
TEST
SWITCH
Input Pulse Definition
t
closed
PLZ
PZL
t
closed
open
All other
INPUT PULSE REQUIREMENTS
DEFINITIONS
R = Load resistor; see AC CHARACTERISTICS for value.
L
FAMILY
Amplitude
3.0 V
Rep. Rate
1 MHz
t
t
t
F
W
R
C = Load capacitance includes jig and probe capacitance;
L
see AC CHARACTERISTICS for value.
74ABT
500 ns 2.5 ns 2.5 ns
R = Termination resistance should be equal to Z
T
of
OUT
pulse generators.
SA00654
8
2004 Mar 08
Philips Semiconductors
Product data
16-bit D-type flip-flop; positive-edge trigger
(3-State)
74ABT16374B
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm
SOT370-1
9
2004 Mar 08
Philips Semiconductors
Product data
16-bit D-type flip-flop; positive-edge trigger
(3-State)
74ABT16374B
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
SOT362-1
10
2004 Mar 08
Philips Semiconductors
Product data
16-bit D-type flip-flop; positive-edge trigger
(3-State)
74ABT16374B
QFP52: plastic quad flat package; 52 leads (lead length 1.6 mm); body 10 x 10 x 2.0 mm
SOT379-1
11
2004 Mar 08
Philips Semiconductors
Product data
16-bit D-type flip-flop; positive-edge trigger
(3-State)
74ABT16374B
REVISION HISTORY
Rev
Date
Description
_4
20040308
Product data (9397 750 13014). Supersedes data of 2004 Mar 01 (9397 750 12988).
Modifications:
• Add type number 74ABT16374BB, QFP52 pin configuration, and SOT379-1 package outline.
_3
_2
_1
20040301
19980227
19950928
Product data (9397 750 12988); 853-1752 ECN 01–A15430 of 27 January 2004.
Replaces data sheet 74ABT_H16374B_2 of 1998 Feb 27 (9397 750 03496).
Product specification (9397 750 03496); ECN 853-1752 19027 of 27 February 1998.
Supersedes data of 1995 Sep 28.
12
2004 Mar 08
Philips Semiconductors
Product data
16-bit D-type flip-flop; positive-edge trigger
(3-State)
74ABT16374B
Data sheet status
Product
status
Definitions
[1]
Level
Data sheet status
[2] [3]
I
Objective data
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Product data
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limitingvaluesdefinition— Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no
representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree
to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated
viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys
nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,
copyright, or mask work right infringement, unless otherwise specified.
Koninklijke Philips Electronics N.V. 2004
Contact information
All rights reserved. Printed in U.S.A.
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
Date of release: 03-04
9397 750 13014
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Document order number:
Philips
Semiconductors
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