935269164115 [NXP]
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, PLASTIC, SOT-23, SO-5, Power Management Circuit;型号: | 935269164115 |
厂家: | NXP |
描述: | IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, PLASTIC, SOT-23, SO-5, Power Management Circuit 光电二极管 |
文件: | 总14页 (文件大小:157K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
NE56610/11/12-XX
System reset
Product data
2001 Jun 19
Supersedes data of 2001 Apr 24
File under Integrated Circuits, Standard Analog
Philips
Semiconductors
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
GENERAL DESCRIPTION
The NE56610/11/12-XX series is a family of devices designed to
generate a reset signal for a variety of microprocessor and logic
systems. Accurate reset signals are generated during momentary
power interruptions or when ever power supply voltages sag to
intolerable levels. The NE56610/11/12 incorporates an internal timer
to provide reset delay and ensure proper operating voltage has been
attained. In addition, a manual reset pin (M/R) is available. An Open
Collector output topology provides adaptability for a wide variety of
logic and microprocessor systems.
NE56610/11/12 is available in the SOT23-5 surface mount package.
FEATURES
APPLICATIONS
• 12 V maximum operating voltage
• Microcomputer systems
DC
• Low operating voltage (0.65 V)
• Manual Reset input
• Logic systems
• Battery monitoring systems
• Back-up power supply circuits
• Voltage detection circuits
• Mechanical reset circuits
• SOT23-5 surface mount package
• Offered in reset thresholds of 2.5, 2.7, 2.9, 3.9, 4.2, 4.5 V
DC
• Internal reset delay timer
– NE56610 (50 ms typical)
– NE56611 (100 ms typical)
– NE56612 (200 ms typical)
SIMPLIFIED DEVICE DIAGRAM
V
DD
M/R
1
5
V
NE56610/11/12-XX
DD
R
PU
V
CC
V
OUT
4
R
R
RESET
CPU
RESET
DELAY
V
REF
GND
3
2 SUB
GND
SL01362
Figure 1. Simplified device diagram.
2
2001 Jun 19
853–2246 26559
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
TEMPERATURE TYPICAL
RANGE
RESET DELAY
NAME
DESCRIPTION
plastic small outline package; 5 leads
(see dimensional drawing)
NE56610-XXGW SOT23-5, SOT25, SO5
–20 to +75 °C
50 ms
plastic small outline package; 5 leads
(see dimensional drawing)
NE56611-XXGW
SOT23-5, SOT25, SO5
–20 to +75 °C
–20 to +75 °C
100 ms
200 ms
plastic small outline package; 5 leads
(see dimensional drawing)
NE56612-XXGW SOT23-5, SOT25, SO5
NOTE:
Each device has six detection voltage options, indicated by the XX on the ‘Type number’.
XX
25
27
29
39
42
45
DETECT VOLTAGE (Typical)
2.5 V
2.7 V
2.9 V
3.9 V
4.2 V
4.5 V
Part number marking
Each device is marked with a four letter code. The first three letters designate the product. The fourth letter, represented by ‘x’, is a date tracking
code. For example, ACNB is device ACN (the NE56610-25 reset) produced in time period ‘B’.
Part number
NE56610-25
NE56610-27
NE56610-29
NE56610-39
NE56610-42
NE56610-45
Marking
A C N x
A C M x
A C L x
A C K x
A C J x
A C H x
Part number
NE56611-25
NE56611-27
NE56611-29
NE56611-39
NE56611-42
NE56611-45
Marking
A C V x
A C U x
A C T x
A C S x
A C R x
A C P x
Part number
NE56612-25
NE56612-27
NE56612-29
NE56612-39
NE56612-42
NE56612-45
Marking
A C B x
A C A x
A C Z x
A C Y x
A C X x
A C W x
PIN CONFIGURATION
PIN DESCRIPTION
PIN
SYMBOL
DESCRIPTION
1
M/R
Manual Reset input.
Connect to ground when not using.
M/R
SUB
GND
1
2
3
5
4
V
V
CC
2
3
4
5
SUB
GND
Substrate pin. Connect to ground.
Ground
NE56610-XX
NE56611-XX
NE56612-XX
V
Reset HIGH output pin
Positive power supply input
OUT
CC
OUT
V
SL01361
Figure 2. Pin configuration.
MAXIMUM RATINGS
SYMBOL
PARAMETER
MIN.
–0.3
–0.3
–20
–40
–
MAX.
12
UNIT
V
V
V
Power supply voltage
CC
M/R
Manual Reset input voltage
12
V
T
Operating ambient temperature
Storage temperature
75
°C
amb
T
stg
125
150
°C
P
Power dissipation
mW
3
2001 Jun 19
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
ELECTRICAL CHARACTERISTICS
Characteristics noted with M/R pin connected to ground. Typical values reflect appropriate average value at T
= 25 °C.
amb
TEST
CIRCUIT
SYMBOL
PARAMETER
CONDITIONS
falling; R = 470 Ω; V ≤ 0.4 V
PART #
MIN.
TYP.
MAX. UNIT
–45
–42
–39
–29
–27
–25
All
4.3
4.0
4.5
4.2
4.7
4.4
V
V
V
S
Threshold detection
V
CC
L
OL
3.7
3.9
4.1
V
2.75
2.55
2.35
30
2.90
2.70
2.50
50
3.05
2.85
2.65
100
V
V
V
1
∆V
Hysteresis
∆V = V (rising V ) – V (falling V );
mV
S
S
SH
CC
SL
CC
Fig. 20
R = 470 Ω
L
∆T /∆V
Threshold temperature
coefficient
R = 470 Ω;
All
–
±0.01
–
%/°C
C
S
L
–20 °C ≤ T
≤ +75 °C
amb
V
LOW-level output voltage
Output leakage current
V
= V
– 0.05 V; R = 470 Ω
All
All
–
–
0.01
–
0.4
±0.1
500
25
V
OL
CC
S(min)
L
I
I
I
t
V
= 10 V
µA
µA
µA
ms
ms
ms
µs
LO
CC
Circuit current (output LOW)
Circuit current (output HIGH)
V
= V
– 0.05 V; R = ∞
All
–
300
15
CCL
CCH
DLH
CC
S(min)
L
V
= V
/ 0.85 V; R = ∞
All
–
CC
S(typ)
L
NE56610
NE56611
NE56612
30
60
120
–
50
75
Reset delay time HIGH
(Note 1)
R = 4.7 kΩ; C = 100 pF
L L
100
200
20
150
300
–
2
Fig. 21
t
Reset delay time LOW
(Note 2)
R = 4.7 kΩ; C = 100 pF
L
All
DHL
L
V
I
Operating supply voltage
Output sink current 1
Output sink current 2
R = 4.7 kΩ; V ≤ 0.4 V
All
All
All
–
0.65
–
0.85
–
V
OPL
L
OL
V
= V
– 0.05 V; R = 0
–8.0
–6.0
mA
mA
1
OL1
CC
CC
S(min)
L
Fig. 20
I
V
= V
– 0.05 V; R = 0;
–
–
OL2
S(min)
L
–20 °C ≤ T
≤ +75 °C
amb
V
HIGH-level M/R threshold
voltage (Note 3)
All
All
All
All
2.0
–
–
10
–
–
60
0.8
–
V
µA
V
M/RH
I
HIGH-level M/R threshold
current
V
M/RH
= 2.0 V
M/RH
V
M/RL
LOW-level M/R threshold
voltage
–0.3
15
t
M/R pulse width (Note 4)
–
µs
M/R
NOTES:
1. t measured with V = (V
– 0.4 V) and abruptly transitioning to (V
+ 0.4 V) and abruptly transitioning to (V
+ 0.4 V). t
– 0.4 V). t
is the duration from V transition HIGH to
CC
DLH
CC
S(typ)
S(typ)
S(typ)
DLH
output transition HIGH.
2. t measured with V = (V
is the duration from V transition LOW to
DHL
CC
S(typ)
DHL
CC
output transition LOW.
3. Ramp M/R voltage until output RESET goes LOW.
4. Minimum M/R pulse width for detection.
4
2001 Jun 19
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
TYPICAL PERFORMANCE CURVES
500
400
300
200
100
0.10
THRESHOLD NORMALIZED TO 25 °C
V
= V
– 0.05 V
CC
S(min)
R
(PULL-UP TO V ) 470 Ω
R = ∞
L
L
CC
V
≤ 0.4 V
OL
0.05
0.00
–0.05
–0.10
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
T , AMBIENT TEMPERATURE (°C)
amb
T , AMBIENT TEMPERATURE (°C)
amb
SL01363
SL01334
Figure 3. Normalized detection versus temperature.
Figure 4. Circuit ON current versus temperature.
30
25
80
∆V = V – V
V
= V
+ 0.85 V
S
SH
SL
CC
S(typ)
R
(PULL-UP TO V ) = 470 Ω
R = ∞
L
L
CC
70
20
15
60
50
40
–50
10
–50
–25
0
25
50
75
100
125
–25
0
25
50
75
100
125
T , AMBIENT TEMPERATURE (°C)
amb
T , AMBIENT TEMPERATURE (°C)
amb
SL01365
SL01366
Figure 5. Detection hysteresis versus temperature.
Figure 6. Circuit OFF current versus temperature.
900
120
V
= V
S(min)
– 0.05 V
V ≤ 0.4 V
OL
CC
R
(PULL-UP TO V ) = 470 Ω
R = 4.7 kΩ
L
L
CC
800
700
600
500
400
100
80
60
40
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
T , AMBIENT TEMPERATURE (°C)
amb
T , AMBIENT TEMPERATURE (°C)
amb
SL01367
SL01368
Figure 7. LOW-level output voltage versus temperature.
Figure 8. Operating supply voltage versus temperature.
5
2001 Jun 19
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
70
25
20
V
R
= V
= 0
– 0.05 V
V
V
= 5.0 V
CC
= 2.0 V
M/RH
CC
S(min)
L
60
50
40
30
15
10
5
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
T , AMBIENT TEMPERATURE (°C)
amb
T , AMBIENT TEMPERATURE (°C)
amb
SL01369
SL01370
Figure 9. Output ON current versus temperature.
Figure 10. M/R input HIGH current versus temperature.
250
225
200
175
150
1.6
R
C
= 4.7 kΩ
= 100 pF
V
= 5.0 V
CC
L
L
SA56612
1.4
1.2
1.0
0.8
0.6
125
SA56611
100
75
SA56610
50
50
25
–50
–25
0
25
75
100
125
–50
–25
0
25
50
75
100
125
T , AMBIENT TEMPERATURE (°C)
amb
T , AMBIENT TEMPERATURE (°C)
amb
SL01376
SL01377
Figure 11. Reset delay time HIGH versus temperature.
Figure 12. M/R threshold HIGH versus temperature.
500
400
5.0
4.0
14
R
C
= 4.7 kΩ
= 100 pF
R = 470 Ω
L
L
L
V
OUT
T
= 25 °C
amb
13
12
11
10
300
200
100
0
3.0
2.0
1.0
0
∆V
S
I
CC
–50
–25
0
25
50
75
100
125
0
1.0
2.0
V , SUPPLY VOLTAGE (V)
CC
3.0
4.0
5.0
T
, AMBIENT TEMPERATURE (°C)
amb
SL01378
SL01379
Figure 13. Reset delay time LOW versus temperature.
Figure 14. I and V
versus supply voltage.
OUT
CC
6
2001 Jun 19
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
40
V
= V
S(min)
– 0.05 V
CC
R
= 0
35
L
T
amb
= 25 °C
30
25
20
15
10
5
0
0
–0.2
–0.4
–0.6
–0.8
–1.0
V
, OUTPUT VOLTAGE (V)
OUT
SL01378
Figure 15. Output sink current versus output voltage.
7
2001 Jun 19
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
TECHNICAL DESCRIPTION
The NE56610/11/12-XX devices comprise a family of devices
designed to monitor the supply voltage and output a RESET signal
whenever the supply voltage sags below an acceptable system level
or when supply voltage interruptions occur. Each of the three
devices of the family are available with a fixed detection threshold
voltage (2.5, 2.7, 2.9, 3.9, 4.2, 4.5 V). The device family is very
versatile and adaptable for a wide variety of applications.
Incorporating a delay in the output RESET prevents output
oscillations from occurring and helps ensure system supply voltages
are adequate and stabilized before the microprocessor is placed into
full operation. Where there is little or no delay in output RESET,
there is a possibility of output oscillations occurring, particularly
where high impedance supply sources are used.
In addition, the devices have a manual reset (M/R) pin, which when
pulled to a HIGH voltage state, forces a RESET signal at the output.
The M/R pin should always be connected to ground when manual
reset is not used.
The devices are designed to have a detection threshold hysteresis
of 50 mV typical. When the supply voltage delivered to the device
falls to the detection sense level (V ), a RESET is output and not
S
released until the supply voltage rises to the level of V or greater.
S
The output of the NE56610/11/12 utilizes a low side open collector
These levels are termed V (synonymous with V ) and V , and the
L
S
H
topology, requiring the user to use an external pull-up resistor (R
)
PU
difference of V – V = V
(the hysteresis voltage value).
H
L
HYS
to the V power source. Although this may be regarded as a
CC
Internally, the devices incorporate a fixed internal digital timer which,
when activated, produces a fixed internal delay before a RESET
signal is output. This delay can not be influenced externally. The
NE56510 has an internal delay of 50 ms, while the NE56611 and
NE56612 have internal delays of 100 ms and 200 ms respectively.
disadvantage, it is an advantage in many sensitive applications. The
open drain output topology does not have the capability of sourcing
reset current to a microprocessor when both are operated from a
common supply. It is for this reason the device family offers a safe
inter-connect to a wide variety of microprocessors.
5
V
CC
DELAY
R
OSC
T
Q
4
R
V
RESET
OUT
R
R
R
R
3
2
GND
SUB
R
R
M/R
1
NE56610/11/12-XX
SL01382
Figure 16. Functional diagram
8
2001 Jun 19
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
TIMING DIAGRAM
The Timing Diagram shown in Figure 17 depicts the operation of the
device. Letters indicate events on the TIME axis.
E-F: Between ‘E’ and ‘F’, V recovers and starts to rise.
CC
F: At event ‘F’, V reaches the upper threshold (V ). Once again,
CC
SH
A: At start-up, event ‘A’, the V and V
(RESET) voltages begin
the t fixed internal delay time is initiated.
DLH
CC
OUT
to rise. The reset voltage initially starts to rise but then abruptly
G: At event ‘G’, V is above the V undervoltage detection
CC
SL
returns to a LOW voltage state. This is due to V reaching a level
CC
voltage and the t
fixed internal delay time has elapsed. At this
DLH
(approximately 0.8 V) which activates the internal bias circuitry
point the device releases the hold on V
HIGH state.
and V
goes to a
OUT
OUT
asserting a RESET state at V
.
OUT
B: At event ‘B’, the fixed internal delay time (t
) is initiated. This
DLH
H-K: At event ‘H’, V is normal, but a manual reset voltage (HIGH
CC
is caused and coincident to V rising to the threshold level of V
.
SH
CC
voltage state) has been applied to the M/R pin. This forces the
output into a reset (LOW voltage state). Removal of the manual
reset voltage, at ‘J’, from the M/R pin initiates the fixed internal delay
At this level the device is in full operation. The output remains in a
low voltage state as V rises above V . This is normal.
CC
SH
C: At event ‘C’, V is above the undervoltage detection threshold
time, and at ‘K’, the internal delay time has elapsed and V
to a HIGH voltage state.
goes
OUT
CC
(V ) and the fixed internal delay time (t
) has elapsed. At this
DLH
SL
instant the device releases the hold on V
goes to a high state.
and V
(RESET)
OUT
OUT
L: At event ‘L’, V sags to the V undervoltage threshold level
and the output goes into low voltage reset condition.
CC
SL
In a microprocessor-based system these events remove the reset
from the microprocessor, allowing the microprocessor to be fully
functional.
M: At event ‘M’, the V voltage has deteriorated to a level where
normal internal circuit bias is no longer able to maintain the device
CC
and V
reset assertion is no longer be guaranteed. As a result,
OUT
D-E: At event ‘D’, V begins to ramp down and V
follows. V
V may exhibit a slight rise to something less than 0.8 V. As V
OUT CC
CC
OUT
CC
continues to fall until the undervoltage threshold (V ) is reached at
decays even further, V
reset also decays to zero.
SL
OUT
‘E’. This causes the device to generate a reset signal.
∆V
S
V
SH
V
= V
SL
SS
V
V
CC
V
V
OUT
RESET
t
t
t
DLH
DLH
DLH
V
0
M/R
V
RES
A
B
C
D
E
F
G
H
J
K
L
M
TIME
SL01381
Figure 17. Timing diagram.
9
2001 Jun 19
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
APPLICATION INFORMATION
When the manual reset is not needed, the M/R, manual reset pin is
connected to ground as shown in Figure 18. A capacitor connected
TO CPU
RESET PIN
TO V
CC
from V to ground is recommended when the V supply
CC
CC
R
PU
impedance is appreciably high. This may be the situation with a poor
quality or aged battery.
MANUAL
SWITCH
5
4
V
V
OUT
CC
TO CPU
RESET PIN
TO V
CC
R
PU
M/R
1
SUB
2
GND
3
5
4
V
V
OUT
CC
CLAMP
DIODE
R
PD
M/R
1
SUB
2
GND
3
SL01384
Figure 19. Manual Reset circuit
When a manual reset is used, it is suggested a resistor (R ) be
PU
connected from the M/R pin to ground so as to provide a pull-down
ground reference for the M/R pin when not in use. This will reduce
the possibility of an induced erroneous voltage being imposed on
the M/R pin. This can be a solution in noisy applications where the
manual reset line is of considerable length and subject to picking up
induced voltages. The M/R pin can be pulled to a HIGH voltage
state whenever a manual reset is imposed. The only disadvantage
to this is a small amount of additional current flow through the
pull-down ground reference resistor when the M/R pin is pulled to a
HIGH state.
SL01383
Figure 18. Typical hard reset circuit
Figure 19 shows a circuit with a manual reset switch. When the
manual switch is closed, V reset is a low voltage state.
reset is a HIGH voltage state.
As a precaution, a clamp diode is placed from the M/R pin to ground
to ensure that the pin does not go below –0.3 V.
OUT
Conversely, when it is opened, V
OUT
TEST CIRCUITS
A2
R
PU
A1
5
4
R
PU
V
V
OUT
CC
5
4
10 µF/10 V
V1
V
V
OUT
CC
INPUT
PULSE
M/R
1
SUB
2
GND
3
5.0 V
V
M/R
1
SUB
2
GND
3
CC
V2
10 µF/10 V
CRT
C
L
100 pF
V
M/R
CRT = OSCILLOSCOPE
INPUT PULSE
V
+ 0.4 V
– 0.4 V
S(typ)
A = DC AMPMETER
V = DC VOLTMETER
V
S(typ)
SL01385
0 V
Figure 20. Test circuit 1
SL01386
Figure 21. Test circuit 2
10
2001 Jun 19
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
PACKING METHOD
The NE56610/11/12 is packed in reels, as shown in Figure 22.
GUARD
BAND
TAPE
TAPE DETAIL
REEL
ASSEMBLY
COVER TAPE
CARRIER TAPE
BARCODE
LABEL
BOX
SL01305
Figure 22. Tape and reel packing method
11
2001 Jun 19
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
SOT23-5: plastic small outline package; 5 leads; body width 1.5 mm
1.2
1.0
0.55
0.41
0.22
0.08
3.00
2.70
1.70
1.50
0.55
0.35
0.025
1.35
12
2001 Jun 19
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
NOTES
13
2001 Jun 19
Philips Semiconductors
Product data
System reset
NE56610/11/12-XX
Data sheet status
Product
status
Definitions
[1]
Data sheet status
[2]
Objective data
Development
Qualification
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
Preliminary data
Product data
This data sheet contains data from the preliminary specification. Supplementary data will be
published at a later date. Philips Semiconductors reserves the right to change the specification
without notice, in order to improve the design and supply the best possible product.
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply.
Changes will be communicated according to the Customer Product/Process Change Notification
(CPCN) procedure SNW-SQ-650A.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on
the Internet at URL http://www.semiconductors.philips.com.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 2001
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Date of release: 06-01
Document order number:
9397 750 08452
Philips
Semiconductors
相关型号:
935269168115
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, PLASTIC, SOT-23, SO-5, Power Management Circuit
NXP
935269171115
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, PLASTIC, SOT-23, SO-5, Power Management Circuit
NXP
935269172115
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, 1.50 MM, PLASTIC, SOT-23, SOT-25, SO-5, Power Management Circuit
NXP
935269174115
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, 1.50 MM, PLASTIC, SOT-23, SOT-25, SO-5, Power Management Circuit
NXP
935269176115
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, PLASTIC, SOT-23, SO-5, Power Management Circuit
NXP
935269177115
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, PLASTIC, SOT-23, SO-5, Power Management Circuit
NXP
935269178115
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, PLASTIC, SOT-23, SO-5, Power Management Circuit
NXP
935269192112
IC 8 I/O, PIA-GENERAL PURPOSE, PDSO16, 7.50 MM, PLASTIC, MS-013, SOT-162-1, SO-16, Parallel IO Port
NXP
935269192118
IC 8 I/O, PIA-GENERAL PURPOSE, PDSO16, 7.50 MM, PLASTIC, MS-013, SOT-162-1, SO-16, Parallel IO Port
NXP
935269193112
IC 8 I/O, PIA-GENERAL PURPOSE, PDSO16, 5.30 MM, PLASTIC, MO-150, SOT-338-1, SSOP-16, Parallel IO Port
NXP
935269193118
IC 8 I/O, PIA-GENERAL PURPOSE, PDSO16, 5.30 MM, PLASTIC, MO-150, SOT-338-1, SSOP-16, Parallel IO Port
NXP
©2020 ICPDF网 联系我们和版权申明