935278866118 [NXP]
LIQUID CRYSTAL DISPLAY DRIVER, PDSO40, PLASTIC, VSOP-40;
| 型号： | 935278866118 |
| 厂家： | 
NXP |
| 描述： | LIQUID CRYSTAL DISPLAY DRIVER, PDSO40, PLASTIC, VSOP-40 驱动 光电二极管 接口集成电路 |
| 文件： | 总28页 (文件大小：141K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
PCF8577C
LCD direct/duplex driver with
I2C-bus interface
1998 Jul 30
Product specification
Supersedes data of 1997 Mar 28
File under Integrated Circuits, IC12
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
CONTENTS
1
2
3
4
5
6
FEATURES
GENERAL DESCRIPTION
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
Hardware subaddress A0, A1, A2
Oscillator A0/OSC
User-accessible registers
Auto-incremented loading
Direct drive mode
Duplex mode
Power-on reset
Slave address
I2C-bus protocol
Display memory mapping
7
CHARACTERISTICS OF THE I2C-BUS
7.1
7.2
7.3
7.4
Bit transfer
Start and stop conditions
System configuration
Acknowledge
8
LIMITING VALUES
9
HANDLING
10
11
12
13
DC CHARACTERISTICS
AC CHARACTERISTICS
APPLICATION INFORMATION
CHIP DIMENSIONS AND BONDING PAD
LOCATIONS
14
15
PACKAGE OUTLINES
SOLDERING
15.1
Plastic dual in-line packages
By dip or wave
Repairing soldered joints
Plastic small outline packages
By wave
By solder paste reflow
Repairing soldered joints (by hand-held
soldering iron or pulse-heated solder tool)
15.1.1
15.1.2
15.2
15.2.1
15.2.2
15.2.3
16
17
18
DEFINITIONS
LIFE SUPPORT APPLICATIONS
PURCHASE OF PHILIPS I2C COMPONENTS
1998 Jul 30
2
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
1
FEATURES
• Direct/duplex drive modes with up to
32/64 LCD-segment drive capability per device
• Operating supply voltage: 2.5 to 6 V
• Low power consumption
• I2C-bus interface
2
GENERAL DESCRIPTION
• Optimized pinning for single plane wiring
• Single-pin built-in oscillator
The PCF8577C is a single chip, silicon gate CMOS circuit.
It is designed to drive liquid crystal displays with up to
32 segments directly, or 64 segments in a duplex
configuration.
• Auto-incremented loading across device subaddress
boundaries
• Display memory switching in direct drive mode
• May be used as I2C-bus output expander
• System expansion up to 256 segments
• Power-on reset blanks display
The two-line I2C-bus interface substantially reduces wiring
overheads in remote display applications. I2C-bus traffic is
minimized in multiple IC applications by automatic address
incrementing, hardware subaddressing and display
memory switching (direct drive mode).To allow partial VDD
shutdown the ESD protection system of the SCL and SDA
• I2C-bus address: 0111 0100.
pins does not use a diode connected to VDD
.
3
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
PCF8577CP
DIP40
plastic dual in-line package; 40 leads (600 mil)
SOT129-1
PCF8577CT
PCF8577CT
PCF8577CU/10
VSO40
plastic very small outline package; 40 leads
VS040 in blister tape
SOT158A
−
−
−
−
chip on film-frame-carrier (FFC)
4
BLOCK DIAGRAM
1
S32
39
SCL
SEGMENT BYTE
BACKPLANE
AND
SEGMENT
DRIVERS
REGISTERS
AND
MULTIPLEX
LOGIC
2
INPUT
FILTERS
I C - BUS
2
I C - BUS
CONTROLLER
40
32
33
S1
BP1
SDA
34
36
37
A2/BP2
A1
A0/OSC
35
V
DD
POWER -
ON
RESET
CONTROL REGISTER
AND
OSCILLATOR
AND
DIVIDER
PCF8577C
COMPARATOR
38
V
SS
MGA727
Fig.1 Block diagram.
3
1998 Jul 30
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
5
PINNING
SYMBOL
PIN
DESCRIPTION
S32 to S1
BP1
1 to 32 segments outputs
1
2
3
4
5
6
7
8
9
S32
S31
S30
S29
S28
S27
S26
40 SDA
33
34
cascade sync input/backplane
output
39
38
37
36
35
SCL
V
A2/BP2
hardware address line and
cascade sync input/backplane
output
SS
A0/OSC
A1
VDD
35
36
37
positive supply voltage
V
DD
A1
hardware address line input
34 A2/BP2
33
A0/OSC
hardware address line and
oscillator pin input
S25
S24
BP1
VSS
38
39
40
negative supply voltage
I2C-bus clock line input
I2C-bus data line input/output
32 S1
31 S2
30 S3
29 S4
28 S5
SCL
SDA
S23 10
S22 11
PCF8577C
12
S20 13
S21
14
15
27
S19
S18
S6
26 S7
25 S8
24 S9
23 S10
22 S11
21 S12
S17 16
S16 17
S15 18
S14 19
20
S13
MGA725
Fig.2 Pin configuration.
1998 Jul 30
4
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
6
FUNCTIONAL DESCRIPTION
6.3
User-accessible registers
There are nine user-accessible 1-byte registers. The first
is a control register which is used to control the loading of
data into the segment byte registers and to select display
options. The other eight are segment byte registers, split
into two banks of storage, which store the segment data.
The set of even numbered segment byte registers is called
BANK A. Odd numbered segment byte registers are called
BANK B.
6.1
Hardware subaddress A0, A1, A2
The hardware subaddress lines A0, A1 and A2 are used to
program the device subaddress for each PCF8577C
connected to the I2C-bus. Lines A0 and A2 are shared with
OSC and BP2 respectively to reduce pin-out
requirements.
1. Line A0 is defined as LOW (logic 0) when this pin is
used for the local oscillator or when connected to VSS
Line A0 is defined as HIGH (logic 1) when connected
to VDD
.
There is one slave address for the PCF8577C (see Fig.6).
All addressed devices load the second byte into the control
register and each device maintains an identical copy of the
control byte in the control register at all times (see I2C-bus
protocol, Fig.7), i.e. all addressed devices respond to
control commands sent on the I2C-bus.
.
2. Line A1 must be defined as LOW (logic 0) or as HIGH
(logic 1) by connection to VSS or VDD respectively.
3. In the direct drive mode the second backplane signal
BP2 is not used and the A2/BP2 pin is exclusively the
A2 input. Line A2 is defined as LOW (logic 0) when
connected to VSS or, if this is not possible, by leaving
it unconnected (internal pull-down). Line A2 is defined
The control register is shown in more detail in Fig.3.
The least-significant bits select which device and which
segment byte register is loaded next. This part of the
register is therefore called the Segment Byte Vector
(SBV).
as HIGH (logic 1) when connected to VDD
.
4. In the duplex drive mode the second backplane signal
BP2 is required and the A2 signal is undefined. In this
mode device selection is made exclusively from
lines A0 and A1.
The upper three bits of the SBV (V5 to V3) are compared
with the hardware subaddress input signals A2, A1
and A0. If they are the same then the device is enabled for
loading, if not the device ignores incoming data but
remains active.
6.2
Oscillator A0/OSC
The three least-significant bits of the SBV (V2 to V0)
address one of the segment byte registers within the
enabled chip for loading segment data.
The PCF8577C has a single-pin built-in oscillator which
provides the modulation for the LCD segment driver
outputs. One external resistor and one external capacitor
are connected to the A0/OSC pin to form the oscillator (see
Figs 15 and 16). For correct start-up of the oscillator after
power on, the resistor and capacitor must be connected to
the same VSS/VDD as the chip. In an expanded system
containing more than one PCF8577C the backplane
signals are usually common to all devices and only one
oscillator is required. The devices which are not used for
the oscillator are put into the cascade mode by connecting
the A0/OSC pin to either VDD or VSS depending on the
required state for A0. In the cascade mode each
The control register also has two display control bits.
These bits are named MODE and BANK. The MODE bit
selects whether the display outputs are configured for
direct or duplex drive displays. The BANK bit allows the
user to display BANK A or BANK B.
6.4
Auto-incremented loading
After each segment byte is loaded the SBV is incremented
automatically. Thus auto-incremented loading occurs if
more than one segment byte is received in a data transfer.
PCF8577C is synchronized from the backplane signal(s).
Since the SBV addresses both device and segment
registers in all addressed chips, auto-incremented loading
may proceed across device boundaries provided that the
hardware subaddresses are arranged contiguously.
1998 Jul 30
5
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
CONTROL REGISTER
SEGMENT BYTE REGISTERS
DISPLAY SEGMENT BYTE VECTOR
CONTROL
(SBV)
msb
lsb
msb
lsb
V5
0
2
4
6
V4 V3 V2 V1 V0
segment byte
register
address
(1) (1)
comparison
BANK 'A'
A2 A1 A0
1
3
5
7
device
subaddress
BANK 'B'
0
1
BANK 'A'
BANK 'B'
BANK
0
1
DIRECT DRIVE
DUPLEX DRIVE
DISPLAY
MODE
MGA733
(1) Bits ignored in duplex mode.
Fig.3 PCF8577C register organization.
OFF
ON
V
DD
BP1
V
SS
V
DD
Segment x
(Sx)
V
SS
V
V
SS
DD
0
BP1 Sx
(V
V
)
DD
SS
1
MGA737
f
LCD
Von(rms) = VDD − VSS; Voff(rms) = 0.
Fig.4 Direct drive mode display output waveforms.
6
1998 Jul 30
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
6.5
Direct drive mode
6.6
Duplex mode
The PCF8577C is set to the direct drive mode by loading
the MODE control bit with logic 0. In this mode only four
bytes are required to store the data for the 32 segment
drivers. Setting the BANK bit to logic 0 selects even bytes
(BANK A), setting the BANK bit to logic 1 selects odd bytes
(BANK B).
The PCF8577C is set to the duplex mode by loading the
MODE bit with logic 1. In this mode a second backplane
signal (BP2) is needed and pin A2/BP2 is used for this;
therefore A2 and its equivalent SBV bit V5 are undefined.
The SBV auto-increments by one between loaded bytes.
All of the segment bytes are required to store data for the
32 segment drivers and the BANK bit is ignored.
In the direct drive mode the SBV is auto-incremented by
two after the loading of each segment byte register. This
means that auto-incremented loading of BANK A or
BANK B is possible. Either bank may be completely or
partially loaded irrespective of which bank is being
displayed. Direct drive output waveforms are shown in
Fig.4.
Duplex mode output waveforms are shown in Fig.5.
OFF / OFF
ON / OFF
OFF / ON
ON / ON
V
DD
0.5 (V
V
)
)
BP1
BP2
DD
SS
V
SS
V
DD
0.5 (V
V
DD
SS
V
SS
V
DD
Segment x
(Sx)
V
SS
V
V
SS
DD
0.5 (V
V
)
)
DD
SS
0
BP1 Sx
0.5 (V
DD
V
SS
(V
DD
V
)
SS
V
V
SS
DD
0.5 (V
V
)
)
DD
SS
0
BP2 Sx
0.5 (V
V
SS
DD
(V
DD
V
)
SS
1
f
MGA738
LCD
Von(rms) = 0.791 (VDD − VSS); Voff(rms) = 0.354 (VDD − VSS).
Von (rms)
= 2.236
-----------------------
Voff (rms)
Fig.5 Duplex mode display output waveforms.
7
1998 Jul 30
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
I2C-bus protocol
6.7
Power-on reset
6.9
The PCF8577C I2C-bus protocol is shown in Fig.7.
At power-on reset the PCF8577C resets to a defined
starting condition as follows:
The PCF8577C is a slave receiver and has a fixed slave
address (see Fig.6). All PCF8577Cs with the same slave
address acknowledge the slave address in parallel.
The second byte is always the control byte and is loaded
into the control register of each PCF8577C connected to
the I2C-bus. All addressed devices acknowledge the
control byte. Subsequent data bytes are loaded into the
segment registers of the selected device. Any number of
data bytes may be loaded in one transfer and in an
expanded system rollover of the SBV from 111 111 to
000 000 is allowed. If a stop (P) condition is given after the
control byte acknowledge the segment data will remain
unchanged. This allows the BANK bit to be toggled without
changing the segment register contents. During loading of
segment data only the selected PCF8577C gives an
acknowledge. Loading is terminated by generating a stop
(P) condition.
1. Both backplane outputs are set to VSS in master mode;
to 3-state in cascade mode
2. All segment outputs are set to VSS
3. The segment byte registers and control register are
cleared
4. The I2C-bus interface is initialized.
6.8
Slave address
The PCF8577C slave address is shown in Fig.6.
Before any data is transmitted on the I2C-bus, the device
which should respond is addressed first. The addressing is
always done with the first byte transmitted after the start
procedure.
S
0
1
1
1
0
1
0
0
A
SLAVE ADDRESS
MGA731
Fig.6 PCF8577C slave address.
acknowledge by
all PCF8577C
acknowledge by
all PCF8577C
acknowledge by
selected PCF8577C only
msb
lsb
SEGMENT
BYTE VECTOR
S
A
SEGMENT DATA
A
P
SLAVE ADDRESS
0
A
control byte
n bytes
R/W
auto increment
segment byte vector
MGA732
Fig.7 I2C-bus protocol.
8
1998 Jul 30
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
6.10 Display memory mapping
The mapping between the eight segment registers and the segment outputs S1 to S32 is given in Tables 1 and 2.
Since only one register bit per segment is needed in the direct drive mode, the BANK bit allows swapping of display
information. If BANK is set to logic 0 even bytes (BANK A) are displayed; if BANK is set to logic 1 odd bytes (BANK B)
are displayed. BP1 is always used for the backplane output in the direct drive mode. In duplex mode even bytes
(BANK A) correspond to backplane 1 (BP1) and odd bytes (BANK B) correspond to backplane 2 (BP2).
Table 1 Segment byte-segment driver mapping in direct drive mode
SEGMENT/
BIT/
REGISTER
V
2
V
1
V
0
MSB
7
LSB BACK-
MODE BANK
6
5
4
3
2
1
0
PLANE
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
2
3
4
5
6
7
S8
S7
S6
S5
S4
S3
S2
S1
S1
BP1
BP1
BP1
BP1
BP1
BP1
BP1
BP1
S8
S7
S6
S5
S4
S3
S2
S16
S16
S24
S24
S32
S32
S15
S15
S23
S23
S31
S31
S14
S14
S22
S22
S30
S30
S13
S13
S21
S21
S29
S29
S12
S12
S20
S20
S28
S28
S11
S11
S19
S19
S27
S27
S10
S10
S18
S18
S26
S26
S9
S9
S17
S17
S25
S25
Mapping example: bit 0 of register 7 controls the LCD segment S25 if BANK bit is a logic 1.
Table 2 Segment byte-segment driver mapping in duplex mode
SEGMENT/
BIT/
REGISTER
V
2
V
1
V
0
MSB
7
LSB BACK-
MODE BANK(1)
6
5
4
3
2
1
0
PLANE
1
1
1
1
1
1
1
1
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
2
3
4
5
6
7
S8
S7
S6
S5
S4
S3
S2
S1
S1
BP1
BP2
BP1
BP2
BP1
BP2
BP1
BP2
S8
S7
S6
S5
S4
S3
S2
S16
S16
S24
S24
S32
S32
S15
S15
S23
S23
S31
S31
S14
S14
S22
S22
S30
S30
S13
S13
S21
S21
S29
S29
S12
S12
S20
S20
S28
S28
S11
S11
S19
S19
S27
S27
S10
S10
S18
S18
S26
S26
S9
S9
S17
S17
S25
S25
Note
1. Where X = don’t care.
Mapping example: bit 7 of register 5 controls the LCD segment S24/BP2.
1998 Jul 30
9
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
CHARACTERISTICS OF THE I2C-BUS
7.4
Acknowledge
7
The I2C-bus is for 2-way, 2-line communication between
different ICs or modules. The two lines are a serial data
line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when
connected to the output stages of a device. Data transfer
may be initiated only when the I2C-bus is not busy.
The number of data bytes transferred between the start
and stop conditions from transmitter to receiver is not
limited. Each byte is followed by one acknowledge bit.
The acknowledge bit is a HIGH level put on the I2C-bus by
the transmitter whereas the master generates an extra
acknowledge related clock pulse. A slave receiver which is
addressed must generate an acknowledge after the
reception of each byte. Also a master must generate an
acknowledge after the reception of each byte that has
been clocked out of the slave transmitter. The device that
acknowledges has to pull down the SDA line during the
acknowledge clock pulse, set-up and hold times must be
taken into account. A master receiver must signal an end
of data to the transmitter by not generating an
7.1
Bit transfer
One data bit is transferred during each clock pulse.
The data on the SDA line must remain stable during the
HIGH period of the clock pulse as changes in the data line
at this time will be interpreted as control signals.
7.2
Start and stop conditions
acknowledge on the last byte that has been clocked out of
the slave. In this event the transmitter must leave the data
line HIGH to enable the master to generate a stop
condition.
Both data and clock lines remain HIGH when the I2C-bus
is not busy. A HIGH-to-LOW transition of the data line,
while the clock is HIGH is defined as the start condition (S).
A LOW-to-HIGH transition of the data line while the clock
is HIGH is defined as the stop condition (P).
7.3
System configuration
A device generating a message is a ‘transmitter’, a device
receiving a message is the ‘receiver’. The device that
controls the message is the ‘master’ and the devices which
are controlled by the master are the ‘slaves’.
SDA
SCL
data line
stable;
data valid
change
of data
allowed
MBA607
Fig.8 Bit transfer.
1998 Jul 30
10
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
SDA
SDA
SCL
SCL
S
P
STOP condition
START condition
MBA608
Fig.9 Definition of the start and stop conditions.
SDA
SCL
MASTER
TRANSMITTER /
RECEIVER
SLAVE
TRANSMITTER /
RECEIVER
MASTER
TRANSMITTER /
RECEIVER
SLAVE
RECEIVER
MASTER
TRANSMITTER
MBA605
Fig.10 System configuration.
clock pulse for
acknowledgement
START
condition
SCL FROM
MASTER
2
9
1
8
DATA OUTPUT
BY TRANSMITTER
S
DATA OUTPUT
BY RECEIVER
MBA606 - 1
Fig.11 Acknowledgement on the I2C-bus.
11
1998 Jul 30
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
8
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS
VDD supply voltage
VI
MIN.
−0.5
MAX.
UNIT
+8.0
VDD + 0.5
+50
V
input voltage on pin
−0.5
−50
−20
−25
−
V
I
DD; ISS
VDD or VSS current
mA
mA
mA
II
DC input current
+20
IO
DC output current
+25
Ptot
PO
Tstg
power dissipation per package note 1
power dissipation per output
storage temperature
500
mW
mW
°C
−
100
−65
+150
Note
1. Reduce by 7.7 mW/K when Tamb > 60 °C.
9
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe it is
desirable to take normal precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC12
under “Handling MOS Devices”.
10 DC CHARACTERISTICS
VDD = 2.5 to 6 V; VSS = 0 V; Tamb = −40 to 85 °C; unless otherwise specified.
SYMBOL
Supply
PARAMETER
CONDITIONS
MIN.
TYP.(1)
MAX.
UNIT
VDD
IDD
supply voltage
2.5
−
6
V
supply current for
non-specified inputs at VDD or
VSS
no load; fSCL = 100 kHz;
50
125
µA
µA
µA
Rosc = 1 MΩ;
Cosc = 680 pF
no load; fSCL = 0;
−
−
25
25
75
Rosc = 1 MΩ;
Cosc = 680 pF
no load; fSCL = 0;
Rosc = 1 MΩ;
40
Cosc = 680 pF; VDD = 5 V;
Tamb = 25 °C
no load; fSCL = 0; direct
−
10
20
µA
mode; A0/OSC = VDD
;
VDD = 5 V; Tamb = 25 °C
VPOR
power-on reset level
note 2
−
1.1
2.0
V
Input A0
VIL(A0)
VIH(A0)
LOW-level input voltage
HIGH-level input voltage
0
−
−
0.05
VDD
V
V
V
DD − 0.05
1998 Jul 30
12
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
SYMBOL
Input A1
PARAMETER
CONDITIONS
MIN.
TYP.(1)
MAX.
UNIT
VIL(A1)
VIH(A1)
LOW-level input voltage
HIGH-level input voltage
0
−
−
0.3VDD
VDD
V
0.7VDD
V
Input A2
VIL(A2)
VIH(A2)
LOW-level input voltage
HIGH-level input voltage
0
−
−
0.10
VDD
V
V
V
DD − 0.10
Input SCL; SDA
VIL(SCL; SDA) LOW-level input voltage
VIH(SCL; SDA) HIGH-level input voltage
0
−
−
−
0.3VDD
V
0.7VDD
6
7
V
Ci
input capacitance
note 3
−
pF
Output SDA
IOL
LOW-level output current
VOL = 0.4 V; VDD = 5 V
VI = VDD or VSS
VI = VDD or VSS
VI = VDD
3
−
−
mA
µA
µA
µA
µA
µA
A1; SCL; SDA
IL1
leakage current
−1
−5
−5
−1
−
−
+1
+5
−
A2/BP2; BP1
IL2
leakage current
−
A2/BP2
Ipd
pull-down current
leakage current
−1.5
−
A0/OSC
IL3
VI = VDD
−
Oscillator
IOSC
start-up current
VI = VSS
1.2
5
LCD outputs
VDC
IOL1
DC component of LCD driver
−
±20
−
−
mV
mA
LOW-level segment output
current
VDD = 5 V; VOL = 0.8 V;
note 4
0.3
−
IOH1
RBP
HIGH-level segment output
current
VDD = 5 V;
VOH = VDD − 0.8 V; note 4
−
−
−
−0.3
mA
backplane output resistance
(BP1; BP2)
VO = VSS or VDD or
1⁄2(VSS + VDD); note 5
0.4
5
kΩ
Notes
1. Typical conditions: VDD = 5 V; Tamb = 25 °C.
2. Resets all logic when VDD < VPOR
.
3. Periodically sampled, not 100% tested.
4. Outputs measured one at a time.
5. Outputs measured one at a time; VDD = 5 V; Iload = 100 µA.
1998 Jul 30
13
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
11 AC CHARACTERISTICS
VDD = 2.5 to 6 V; Tamb = −40 to 85 °C; unless otherwise specified. All the timing values are valid within the operating
supply voltage and ambient temperature range and refer to VIL and VIH with an input voltage swing of VSS to VDD
.
SYMBOL
PARAMETER
display frequency
CONDITIONS
MIN.
TYP.(1)
90
MAX.
120
UNIT
Hz
fLCD
tBS
Cosc = 680 pF; Rosc = 1 MΩ 65
driver delays with test loads
VDD = 5 V
−
20
100
µs
I2C-bus
fSCL
SCL clock frequency
−
−
−
−
−
−
−
−
−
−
−
−
−
100
100
−
kHz
ns
µs
µs
µs
µs
µs
µs
µs
ns
ns
µs
tSW
tolerable spike width on I2C-bus Tamb = 25 °C
I2C-bus free time
−
tBUF
4.7
4.0
4.0
4.7
4.0
−
tSU;STA
tHD;STA
tLOW
tHIGH
tr
START condition set-up time
START condition hold time
SCL LOW time
−
−
−
SCL HIGH time
−
SCL and SDA rise time
SCL and SDA fall time
data set-up time
1.0
0.3
−
tf
−
tSU;DAT
tHD;DAT
tSU;STO
250
0
data hold time
−
STOP condition set-up time
4.0
−
Note
1. Typical conditions: VDD = 5 V; Tamb = 25 °C.
1.5 kΩ
6.8 kΩ
SCL, SDA
V
S32 to S1
(pins 1 to 32)
(V
V
) / 2
DD
DD
SS
(pins 39, 40)
MGA730
Fig.12 Test loads.
1998 Jul 30
14
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
0.5 V
0.5 V
(V
(V
= 5 V)
Sx
DD
DD
t
BS
V
0.5 V
0.5 V
DD
2
= 5 V)
BP1, BP2
MGA729
Fig.13 Driver timing waveforms.
SDA
SCL
SDA
t
f
t
t
BUF
LOW
t
t
t
SU;DAT
t
HD;STA
r
t
HD;DAT
HIGH
t
SU;STA
MGA728
t
SU;STO
Fig.14 I2C-bus timing diagram; rise and fall times refer to VIL and VIH.
1998 Jul 30
15
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
DIRECT DRIVE LCD DISPLAY
32 33
backplane
256
1
64
S2
S1
S2
S1
S2
S1
BP1
BP2
BP1
BP2
BP1
BP2
A2
A2
A2
V
V
V
V
DD
DD
DD
DD
A1
A0 OSC
C
osc
A1
A0
A1
A0
R
OSC
osc
OSC
V
V
V
V
SS
SS
SCL
SDA
SS
SCL
SDA
SS
SCL
SDA
SCL
SDA
S31
S32
S31
S32
S31
PCF8577C
PCF8577C
PCF8577C
S32
device subaddress
A2.A1.A0 = 000
device subaddress
A2.A1.A0 = 001
device subaddress
A2.A1.A0 = 111
MGA735
Fig.15 Direct display driver; expansion to 256 segments using eight PCF8577Cs.
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
BP2
DUPLEX LCD DISPLAY
32 33
BP1
128
1
64
S2
S1
S2
S1
S2
S1
BP1
BP2
BP1
BP2
BP1
BP2
A2
A2
A2
V
V
V
V
DD
DD
A1
A0 OSC
DD
DD
A1
A0 OSC
C
osc
A1
A0
R
OSC
osc
V
V
V
V
SS
SS
SCL
SDA
SS
SCL
SDA
SS
SCL
SDA
S31
S32
S31
S32
S31
S32
SCL
SDA
PCF8577C
PCF8577C
PCF8577C
device subaddress
A1.A0 = 00
device subaddress
A1.A0 = 01
device subaddress
A1.A0 = 11
MGA736
Fig.16 Duplex display; expansion to 2 × 128 segments using four PCF8577Cs.
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
32 output lines
S2
S1
BP1
BP2
A2
V
V
DD
DD
A1
A0 OSC
V
V
SS
SS
SCL
SDA
SCL
SDA
S31
S32
PCF8577C
device subaddress
A2, A1, A0 = 000
expansion
MGA734
MODE bit must always be set to logic 0 (direct drive).
BANK switching is permitted.
BP1 must always be connected to VSS and A0/OSC must be connected to either VDD or VSS (no LCD modulation).
Fig.17 Use of PCF8577C as a 32-bit output expander in I2C-bus application.
1998 Jul 30
18
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
13 CHIP DIMENSIONS AND BONDING PAD LOCATIONS
5
6
4
3
2
1
40 39 38 37
36
35
34
33
32
31
30
29
28
27
26
25
V
S27
S26
S25
S24
S23
S22
S21
S20
S19
S18
DD
7
A2/BP2
BP1
S1
8
9
10
11
12
13
14
15
16
S2
x
2.31
mm
0
S3
0
S4
y
S5
PCF8577C
S6
S7
17 18 19 20 21 22 23 24
2 mm
Chip area = 4.62 mm2.
MGA726
Thickness = 381 ±25 µm.
n-substrate (back) connected to VDD
.
Bonding pad dimensions = 110 µm × 110 µm.
Fig.18 Bonding pad locations.
handbook, halfpage
MBE924
Fig.19 Reference marks.
1998 Jul 30
19
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
Table 3 Bonding pad locations (dimensions in µm)
All x and y co-ordinates are referenced to the centre of the chip, see Fig.18.
PAD POSITION CENTRED
PAD POSITION CENTRED
SIGNAL
SIGNAL
x
y
x
y
S32
S31
S30
S29
S28
S27
S26
S25
S24
S23
S22
S21
S20
S19
S18
S17
S16
S15
S14
S13
S12
S11
−86
−257
−428
−599
−836
−836
−836
−836
−836
−836
−836
−836
−836
−836
−836
−836
−599
−428
−257
−86
941
941
S10
S9
427
598
836
836
836
836
836
836
836
836
836
836
836
836
598
427
256
85
−941
−941
−941
−770
−599
−428
−257
−86
941
S8
941
S7
941
S6
769
S5
598
S4
427
S3
256
S2
85
85
S1
256
−86
BP1
A2/BP2
VDD
A1
427
−257
−428
−599
−770
−941
−941
−941
−941
−941
−941
−941
598
769
941
A0/OSC
VSS
SCL
SDA
941
941
941
941
Recpats
C
F
−586
−580
−699
85
663
256
1998 Jul 30
20
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
14 PACKAGE OUTLINES
DIP40: plastic dual in-line package; 40 leads (600 mil)
SOT129-1
D
M
E
A
2
A
L
A
1
c
e
w M
Z
b
1
(e )
1
b
M
H
40
21
pin 1 index
E
1
20
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
(1)
(1)
Z
1
2
w
UNIT
mm
b
b
c
D
E
e
e
L
M
M
1
1
E
H
max.
min.
max.
max.
1.70
1.14
0.53
0.38
0.36
0.23
52.50
51.50
14.1
13.7
3.60
3.05
15.80
15.24
17.42
15.90
4.7
0.51
4.0
2.54
0.10
15.24
0.60
0.254
0.01
2.25
0.067
0.045
0.021
0.015
0.014
0.009
2.067
2.028
0.56
0.54
0.14
0.12
0.62
0.60
0.69
0.63
inches
0.19
0.020
0.16
0.089
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-01-14
SOT129-1
051G08
MO-015AJ
1998 Jul 30
21
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
VSO40: plastic very small outline package; 40 leads
SOT158-1
D
E
A
X
c
y
H
v
M
A
E
Z
40
21
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
detail X
1
20
w
M
b
p
e
0
5
scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(2)
(1)
UNIT
mm
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
0.3
0.1
2.45
2.25
0.42
0.30
0.22
0.14
15.6
15.2
7.6
7.5
12.3
11.8
1.7
1.5
1.15
1.05
0.6
0.3
2.70
0.11
0.25
0.762
0.03
2.25
0.089
0.2
0.1
0.1
7o
0o
0.012 0.096
0.004 0.089
0.017 0.0087 0.61
0.012 0.0055 0.60
0.30
0.29
0.48
0.46
0.067 0.045
0.059 0.041
0.024
0.012
inches
0.010
0.008 0.004 0.004
Notes
1. Plastic or metal protrusions of 0.4 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-01-24
SOT158-1
1998 Jul 30
22
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
Several techniques exist for reflowing; for example,
15 SOLDERING
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
15.1 Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
15.3.2 WAVE SOLDERING
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(order code 9398 652 90011).
Wave soldering techniques can be used for all VSO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
15.2 DIP
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
15.2.1 SOLDERING BY DIPPING OR BY WAVE
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
15.2.2 REPAIRING SOLDERED JOINTS
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
15.3.3 REPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
15.3 VSO
15.3.1 REFLOW SOLDERING
Reflow soldering techniques are suitable for all VSO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
1998 Jul 30
23
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
16 DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
17 LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
18 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1998 Jul 30
24
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
NOTES
1998 Jul 30
25
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
NOTES
1998 Jul 30
26
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I2C-bus interface
PCF8577C
NOTES
1998 Jul 30
27
Philips Semiconductors – a worldwide company
Argentina: see South America
Middle East: see Italy
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +61 2 9805 4455, Fax. +61 2 9805 4466
Tel. +31 40 27 82785, Fax. +31 40 27 88399
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010,
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Fax. +43 160 101 1210
Tel. +64 9 849 4160, Fax. +64 9 849 7811
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
Norway: Box 1, Manglerud 0612, OSLO,
220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Belgium: see The Netherlands
Brazil: see South America
Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 689 211, Fax. +359 2 689 102
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. +48 22 612 2831, Fax. +48 22 612 2327
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381
Portugal: see Spain
Romania: see Italy
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Colombia: see South America
Czech Republic: see Austria
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,
Tel. +65 350 2538, Fax. +65 251 6500
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,
Tel. +45 32 88 2636, Fax. +45 31 57 0044
Slovakia: see Austria
Slovenia: see Italy
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615800, Fax. +358 9 61580920
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. +27 11 470 5911, Fax. +27 11 470 5494
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,
Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427
South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 23 53 60, Fax. +49 40 23 536 300
Tel. +55 11 821 2333, Fax. +55 11 821 2382
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,
Spain: Balmes 22, 08007 BARCELONA,
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240
Tel. +34 93 301 6312, Fax. +34 93 301 4107
Hungary: see Austria
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745
India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263
Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
Tel. +1 800 234 7381
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Uruguay: see South America
Vietnam: see Singapore
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors,
Internet: http://www.semiconductors.philips.com
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
415106/1200/04/pp28
Date of release: 1998 Jul 30
Document order number: 9397 750 04197
相关型号：
935278931115
LVC/LCX/Z SERIES, TRIPLE 1-INPUT INVERT GATE, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-252, SOT833-1, SON-8
NXP
935278954112
0.04W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO8, 3.90 MM, PLASTIC, MS-012, SOT-96-1, SOP-8
NXP
935278954115
0.04W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO8, 3.90 MM, PLASTIC, MS-012, SOT-96-1, SOP-8
NXP
935278996115
AUP/ULP/V SERIES, 2-INPUT NAND GATE, PDSO6, 1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, SON-6
NXP
935278996132
AUP/ULP/V SERIES, 2-INPUT NAND GATE, PDSO6, 1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, SON-6
NXP
©2020 ICPDF网 联系我们和版权申明