935318707564 [NXP]

RF Power Field-Effect Transistor;
935318707564
型号: 935318707564
厂家: NXP    NXP
描述:

RF Power Field-Effect Transistor

文件: 总17页 (文件大小:420K)
中文:  中文翻译
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Document Number: A2T18H455W23N  
Rev. 0, 5/2016  
Freescale Semiconductor  
Technical Data  
RF Power LDMOS Transistor  
A2T18H455W23NR6  
N--Channel Enhancement--Mode Lateral MOSFET  
This 87 W asymmetrical Doherty RF power LDMOS transistor is designed for  
cellular base station applications requiring very wide instantaneous bandwidth  
capability covering the frequency range of 1805 to 1880 MHz.  
1805–1880 MHz, 87 W AVG., 31.5 V  
AIRFAST RF POWER LDMOS  
TRANSISTOR  
1800 MHz  
Typical Doherty Single--Carrier W--CDMA Performance: VDD = 31.5 Vdc,  
DQA = 1080 mA, VGSB = 0.25 Vdc, Pout = 87 W Avg., Input Signal  
PAR = 9.9 dB @ 0.01% Probability on CCDF.  
I
G
Output PAR  
(dB)  
ACPR  
(dBc)  
ps  
D
Frequency  
1805 MHz  
1840 MHz  
1880 MHz  
(dB)  
14.5  
15.2  
15.9  
(%)  
48.1  
48.2  
48.4  
8.1  
8.1  
8.0  
–32.7  
–33.0  
–33.8  
OM--1230--4L2S  
PLASTIC  
Features  
Advanced High Performance In--Package Doherty  
High Thermal Conductivity Packaging Technology for Reduced Thermal  
Resistance  
(2)  
6
5
VBW  
A
Designed for Wide Instantaneous Bandwidth Applications  
Greater Negative Gate--Source Voltage Range for Improved Class C  
Operation  
Able to Withstand Extremely High Output VSWR and Broadband Operating  
Conditions  
Designed for Digital Predistortion Error Correction Systems  
Carrier  
RF /V  
1
2
RF /V  
outA DSA  
inA GSA  
(1)  
RF /V  
inB GSB  
RF /V  
outB DSB  
4
3
Peaking  
(2)  
VBW  
B
(Top View)  
Note: Exposed backside of the package is  
the source terminal for the transistors.  
Figure 1. Pin Connections  
1. Pin connections 4 and 5 are DC coupled  
and RF independent.  
2. Device cannot operate with V current  
DD  
supplied through pin 3 and pin 6.  
Freescale Semiconductor, Inc., 2016. All rights reserved.  
Table 1. Maximum Ratings  
Rating  
Symbol  
Value  
Unit  
Vdc  
Vdc  
Vdc  
C  
Drain--Source Voltage  
V
–0.5, +65  
–6.0, +10  
32, +0  
DSS  
Gate--Source Voltage  
V
GS  
DD  
Operating Voltage  
V
Storage Temperature Range  
Case Operating Temperature Range  
T
stg  
–65 to +150  
–40 to +125  
–40 to +225  
T
C
C  
(1,2)  
Operating Junction Temperature Range  
T
J
C  
Table 2. Thermal Characteristics  
(2,3)  
Characteristic  
Symbol  
Value  
Unit  
Thermal Resistance, Junction to Case  
R
0.23  
C/W  
JC  
Case Temperature 77C, 87 W Avg., W--CDMA, 31.5 Vdc, I  
= 1080 mA, V  
= 0.25 Vdc,  
GSB  
DQA  
1840 MHz  
Table 3. ESD Protection Characteristics  
Test Methodology  
Class  
Human Body Model (per JESD22--A114)  
Machine Model (per EIA/JESD22--A115)  
Charge Device Model (per JESD22--C101)  
2
B
IV  
Table 4. Moisture Sensitivity Level  
Test Methodology  
Rating  
Package Peak Temperature  
Unit  
Per JESD22--A113, IPC/JEDEC J--STD--020  
3
260  
C  
Table 5. Electrical Characteristics (T = 25C unless otherwise noted)  
A
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
(4)  
Off Characteristics  
Zero Gate Voltage Drain Leakage Current  
I
I
10  
5
Adc  
Adc  
Adc  
DSS  
DSS  
GSS  
(V = 65 Vdc, V = 0 Vdc)  
DS  
GS  
Zero Gate Voltage Drain Leakage Current  
(V = 32 Vdc, V = 0 Vdc)  
DS  
GS  
Gate--Source Leakage Current  
(V = 5 Vdc, V = 0 Vdc)  
I
1
GS  
DS  
On Characteristics -- Side A, Carrier  
Gate Threshold Voltage  
V
1.05  
2.1  
1.2  
2.5  
2.2  
2.9  
0.3  
Vdc  
Vdc  
Vdc  
GS(th)  
(V = 10 Vdc, I = 200 Adc)  
DS  
D
Gate Quiescent Voltage  
(V = 31.5 Vdc, I = 1080 mAdc, Measured in Functional Test)  
V
GSA(Q)  
DD  
DA  
Drain--Source On--Voltage  
(V = 10 Vdc, I = 2.0 Adc)  
V
0.05  
0.15  
DS(on)  
GS  
D
On Characteristics -- Side B, Peaking  
Gate Threshold Voltage  
V
0.8  
1.2  
1.6  
0.3  
Vdc  
Vdc  
GS(th)  
(V = 10 Vdc, I = 300 Adc)  
DS  
D
Drain--Source On--Voltage  
(V = 10 Vdc, I = 3 Adc)  
V
0.05  
0.15  
DS(on)  
GS  
D
1. Continuous use at maximum temperature will affect MTTF.  
2. MTTF calculator available at http://www.nxp.com/RF/calculators.  
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955.  
4. Each side of device measured separately.  
(continued)  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
2
Table 5. Electrical Characteristics (T = 25C unless otherwise noted) (continued)  
A
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
(1,2,3)  
Functional Tests — 1805 MHz  
(In Freescale Doherty Test Fixture, 50 ohm system) V = 31.5 Vdc, I  
= 1080 mA, V = 0.25 Vdc,  
GSB  
DD  
DQA  
P
= 87 W Avg., f = 1805 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.  
out  
ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.  
Power Gain  
G
14.0  
43.0  
7.3  
14.5  
48.1  
8.1  
17.0  
dB  
%
ps  
D
Drain Efficiency  
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF  
PAR  
dB  
dBc  
Adjacent Channel Power Ratio  
ACPR  
–32.7  
–29.0  
(1,2,3)  
Functional Tests — 1880 MHz  
(In Freescale Doherty Test Fixture, 50 ohm system) V = 31.5 Vdc, I  
= 1080 mA, V = 0.25 Vdc,  
GSB  
DD  
DQA  
P
= 87 W Avg., f = 1880 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.  
out  
ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.  
Power Gain  
G
14.0  
43.0  
7.3  
15.9  
48.4  
8.0  
17.0  
dB  
%
ps  
D
Drain Efficiency  
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF  
Adjacent Channel Power Ratio  
PAR  
dB  
dBc  
ACPR  
–33.8  
–29.0  
(3)  
Load Mismatch (In Freescale Doherty Test Fixture, 50 ohm system) I  
= 1080 mA, V  
= 0.25 Vdc, f = 1840 MHz  
No Device Degradation  
DQA  
GSB  
VSWR 10:1 at 32 Vdc, 575 W CW Output Power  
(3 dB Input Overdrive from 417 W CW Rated Power)  
(3)  
Typical Performance  
(In Freescale Doherty Test Fixture, 50 ohm system) V = 31.5 Vdc, I  
= 1080 mA, V = 0.25,  
GSB  
DD  
DQA  
1805–1880 MHz Bandwidth  
P
P
@ 1 dB Compression Point, CW  
P1dB  
P3dB  
436  
589  
–21  
W
W
out  
out  
(4)  
@ 3 dB Compression Point  
AM/PM  
(Maximum value measured at the P3dB compression point across  
the 1805–1880 MHz frequency range)  
VBW Resonance Point  
VBW  
140  
MHz  
res  
(IMD Third Order Intermodulation Inflection Point)  
Gain Flatness in 75 MHz Bandwidth @ P = 87 W Avg.  
G
1.4  
dB  
out  
F
Gain Variation over Temperature  
G  
0.012  
dB/C  
(–30C to +85C)  
Output Power Variation over Temperature  
P1dB  
0.007  
dB/C  
(–30C to +85C)  
Table 6. Ordering Information  
Device  
Tape and Reel Information  
Package  
OM--1230--4L2S  
A2T18H455W23NR6  
R6 Suffix = 150 Units, 56 mm Tape Width, 13--inch Reel  
1. V  
and V  
must be tied together and powered by a single DC power supply.  
DDB  
DDA  
2. Part internally matched both on input and output.  
3. Measurements made with device in an asymmetrical Doherty configuration.  
4. P3dB = P  
+ 7.0 dB where P  
is the average output power measured using an unclipped W--CDMA single--carrier input signal where  
avg  
avg  
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
3
V
V
C13  
DDA  
A2T18H455W23N  
Rev. 3  
GGA  
C30  
C31  
C26  
C34  
C27  
C16  
C11  
R1  
C18  
C15  
C24  
C1  
C21  
C22  
C6  
C5  
Z1  
R3  
C
P
C10  
C4  
C7  
C8  
C9  
C23  
C17  
C19  
R2  
C28  
C25  
C2  
C3  
C12  
C20  
C29  
C35  
C33  
C32  
V
D76804  
Note: V  
C14  
GGB  
V
DDB  
and V  
must be tied together and powered by a single DC power supply.  
DDB  
DDA  
Figure 1. A2T18H455W23NR6 Test Circuit Component Layout  
Table 7. A2T18H455W23NR6 Test Circuit Component Designations and Values  
Part  
Description  
10 pF Chip Capacitors  
Part Number  
Manufacturer  
Murata  
C1, C2, C3, C4, C5, C15,  
C16, C17, C18  
GQM2195C2E100JB12D  
C6  
C7  
C8  
C9  
C10  
1 pF Chip Capacitor  
2.4 pF Chip Capacitor  
0.7 pF Chip Capacitor  
1.3 pF Chip Capacitor  
0.2 pF Chip Capacitor  
10 F Chip Capacitors  
GQM2195C2E1R0BB12D  
GQM2195C2E2R4BB12D  
GQM2195C2ER70BB12D  
GQM2195C2E1R3BB12D  
800B0R2BT500XT  
Murata  
Murata  
Murata  
Murata  
ATC  
C11, C12, C24, C25, C26,  
C27, C28, C29  
GRM32ER61H106KA12L  
Murata  
C13, C14, C30, C31, C32,  
C33  
10 F Chip Capacitors  
C5750X7S2A106M230KE  
TDK  
C19, C20  
C21  
10 pF Chip Capacitors  
ATC800B100JT500XT  
ATC800B0R3BT500XT  
ATC800B6R8BT500XT  
ATC800B8R2BT500XT  
MCGPR63V477M13X26  
WCR0805-3R3FI  
ATC  
0.3 pF Chip Capacitor  
ATC  
C22  
6.8 pF Chip Capacitor  
ATC  
C23  
8.2 pF Chip Capacitor  
ATC  
C34, C35  
R1, R2  
R3  
470 F, 63 V Electrolytic Capacitors  
3.3 , 1/8 W Chip Resistors  
50 , 10 W Termination  
Multicomp  
Welwyn  
Anaren  
Anaren  
MTL  
060120A25X50-2  
Z1  
1800–2200 MHz Band, 90, 2 dB Doherty Coupler  
X3C20F1-02S  
PCB  
Rogers RO4350B, 0.020, = 3.66  
D76804  
r
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
4
TYPICAL CHARACTERISTICS — 1805–1880 MHz  
18  
17.5  
17  
51  
50  
49  
48  
V
= 31.5 Vdc, P = 87 W (Avg.), I  
= 1080 mA, V  
= 0.25 Vdc  
DD  
out  
DQA  
GSB  
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth  
D
16.5  
16  
Input Signal PAR = 9.9 dB @ 0.01%  
Probability on CCDF  
47  
G
ps  
15.5  
15  
–1.7  
–1.8  
–26  
–28  
–30  
–32  
–34  
–36  
PARC  
14.5  
14  
–1.9  
–2  
ACPR  
13.5  
13  
–2.1  
–2.2  
1760 1780 1800 1820 1840 1860 1880 1900 1920  
f, FREQUENCY (MHz)  
Figure 2. Single--Carrier Output Peak--to--Average Ratio Compression  
(PARC) Broadband Performance @ Pout = 87 Watts Avg.  
0
V
DD  
= 31.5 Vdc, P = 31 W (PEP), I  
= 1080 mA  
out  
DQA  
V
GSB  
= 0.25 Vdc, Two--Tone Measurements  
(f1 + f2)/2 = Center Frequency of 1840 MHz  
–15  
–30  
–45  
–60  
–75  
IM3--U  
IM3--L  
IM5--L  
IM5--U  
IM7--L  
IM7--U  
1
10  
TWO--TONE SPACING (MHz)  
100  
300  
Figure 3. Intermodulation Distortion Products  
versus Two--Tone Spacing  
–30  
–31  
–32  
–33  
–34  
–35  
–36  
16.5  
16  
1
0
60  
55  
V
= 31.5 Vdc, I  
= 1080 mA, V  
= 0.25 Vdc, f = 1840 MHz  
GSB  
DD  
DQA  
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth  
–1 dB = 64 W  
D
15.5  
15  
50  
45  
40  
35  
30  
–1  
–2  
–3  
ACPR  
G
ps  
–2 dB = 92 W  
14.5  
14  
–3 dB = 119 W  
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF  
PARC  
–4  
–5  
13.5  
30  
60  
90  
120  
150  
180  
P
, OUTPUT POWER (WATTS)  
out  
Figure 4. Output Peak--to--Average Ratio  
Compression (PARC) versus Output Power  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
5
TYPICAL CHARACTERISTICS — 1805–1880 MHz  
18  
17  
60  
–10  
–20  
–30  
–40  
–50  
–60  
–70  
V
= 31.5 Vdc, I  
= 1080 mA, V  
= 0.25 Vdc  
GSB  
1880 MHz  
DD  
DQA  
Single--Carrier W--CDMA, 3.84 MHz  
Channel Bandwidth Input Signal  
PAR = 9.9 dB @ 0.01% Probability on CCDF  
50  
40  
30  
20  
10  
0
1840 MHz  
16  
15  
14  
13  
12  
G
ps  
1840 MHz  
1880 MHz  
1805 MHz  
ACPR  
1805 MHz  
1880 MHz  
1840 MHz  
D
1805 MHz  
1
10  
100  
500  
P
, OUTPUT POWER (WATTS) AVG.  
out  
Figure 5. Single--Carrier W--CDMA Power Gain, Drain  
Efficiency and ACPR versus Output Power  
17  
V
P
= 31.5 Vdc  
= 0 dBm  
DD  
Gain  
in  
16  
I
= 1080 mA  
= 0.25 Vdc  
DQA  
V
GSB  
15  
14  
13  
12  
11  
1700 1750 1800  
1850 1900 1950 2000 2050 2100  
f, FREQUENCY (MHz)  
Figure 6. Broadband Frequency Response  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
6
Table 8. Carrier Side Load Pull Performance — Maximum Power Tuning  
V
= 31.5 Vdc, I  
= 758 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle  
DD  
DQA  
Max Output Power  
P1dB  
(1)  
Z
AM/PM  
()  
f
Z
Z
in  
()  
load  
()  
D
source  
()  
(%)  
53.9  
50.5  
50.3  
Gain (dB)  
(dBm)  
(W)  
(MHz)  
1800  
1840  
1880  
1.95 – j6.68  
2.39 + j6.81  
1.02 – j2.85  
0.88 – j3.16  
0.84 – j3.24  
17.3  
52.6  
184  
–14  
–14  
–16  
2.49 – j7.21  
3.51 – j8.21  
3.13 + j7.24  
4.17 + j7.60  
16.9  
17.2  
52.7  
52.6  
185  
183  
Max Output Power  
P3dB  
(2)  
Z
()  
AM/PM  
()  
f
Z
Z
()  
load  
D
source  
()  
in  
(%)  
53.0  
51.4  
50.4  
Gain (dB)  
(dBm)  
(W)  
(MHz)  
1800  
1840  
1880  
1.95 – j6.68  
2.26 + j7.13  
0.96 – j3.04  
0.88 – j3.24  
0.84 – j3.36  
14.9  
53.4  
218  
–19  
–20  
–21  
2.49 – j7.21  
3.51 – j8.21  
2.98 + j7.75  
4.21 + j8.41  
14.8  
15.0  
53.4  
53.3  
219  
214  
(1) Load impedance for optimum P1dB power.  
(2) Load impedance for optimum P3dB power.  
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.  
= Impedance as measured from gate contact to ground.  
= Measured impedance presented to the output of the device at the package reference plane.  
source  
in  
load  
Table 9. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning  
V
= 31.5 Vdc, I  
= 758 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle  
DD  
DQA  
Max Drain Efficiency  
P1dB  
(1)  
Z
AM/PM  
()  
f
Z
Z
in  
()  
load  
()  
D
source  
()  
(%)  
66.7  
65.2  
62.9  
Gain (dB)  
(dBm)  
(W)  
(MHz)  
1800  
1840  
1880  
1.95 – j6.68  
2.33 + j7.08  
2.57 – j1.37  
2.25 – j1.61  
1.87 – j2.06  
20.3  
49.8  
96  
–22  
–22  
–24  
2.49 – j7.21  
3.51 – j8.21  
3.15 + j7.49  
3.93 + j6.87  
20.2  
20.1  
49.9  
50.2  
97  
106  
Max Drain Efficiency  
P3dB  
(2)  
Z
()  
AM/PM  
()  
f
Z
Z
()  
load  
D
source  
()  
in  
(%)  
66.1  
65.0  
62.3  
Gain (dB)  
(dBm)  
(W)  
(MHz)  
1800  
1840  
1880  
1.95 – j6.68  
2.29 + j7.35  
2.51 – j1.37  
1.93 – j1.94  
1.82 – j2.29  
18.3  
50.5  
112  
–30  
–28  
–31  
2.49 – j7.21  
3.51 – j8.21  
3.04 + j7.85  
3.86 + j7.31  
17.9  
17.9  
51.2  
51.3  
132  
135  
(1) Load impedance for optimum P1dB efficiency.  
(2) Load impedance for optimum P3dB efficiency.  
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.  
= Impedance as measured from gate contact to ground.  
= Measured impedance presented to the output of the device at the package reference plane.  
source  
in  
load  
Input Load Pull  
Tuner and Test  
Circuit  
Output Load Pull  
Tuner and Test  
Circuit  
Device  
Under  
Test  
Z
Z
in  
Z
load  
source  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
7
Table 10. Peaking Side Load Pull Performance — Maximum Power Tuning  
V
= 31.5 Vdc, V  
= 0 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle  
DD  
GSB  
Max Output Power  
P1dB  
(1)  
Z
AM/PM  
()  
f
Z
Z
in  
()  
load  
()  
D
source  
()  
(%)  
49.8  
49.6  
50.1  
Gain (dB)  
(dBm)  
(W)  
(MHz)  
1800  
1840  
1880  
0.99 – j5.23  
0.91 + j5.01  
1.00 – j2.79  
0.98 – j2.99  
0.98 – j3.11  
12.9  
54.9  
309  
–27  
–28  
–33  
1.13 – j5.22  
1.24 – j5.77  
1.04 + j5.21  
1.24 + j5.52  
13.4  
13.5  
54.9  
54.9  
307  
312  
Max Output Power  
P3dB  
(2)  
Z
()  
AM/PM  
()  
f
Z
Z
()  
load  
D
source  
()  
in  
(%)  
52.8  
52.6  
52.7  
Gain (dB)  
(dBm)  
(W)  
(MHz)  
1800  
1840  
1880  
0.99 – j5.23  
0.90 + j5.14  
1.04 – j2.95  
1.03 – j3.11  
1.03 – j3.24  
10.8  
55.6  
365  
–34  
–35  
–40  
1.13 – j5.22  
1.24 – j5.77  
1.05 + j5.37  
1.27 + j5.73  
11.3  
11.5  
55.6  
55.6  
363  
366  
(1) Load impedance for optimum P1dB power.  
(2) Load impedance for optimum P3dB power.  
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.  
= Impedance as measured from gate contact to ground.  
= Measured impedance presented to the output of the device at the package reference plane.  
source  
in  
load  
Table 11. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning  
V
= 31.5 Vdc, V  
= 0 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle  
DD  
GSB  
Max Drain Efficiency  
P1dB  
(1)  
Z
AM/PM  
()  
f
Z
Z
in  
()  
load  
()  
D
source  
()  
(%)  
62.9  
62.9  
63.1  
Gain (dB)  
(dBm)  
(W)  
(MHz)  
1800  
1840  
1880  
0.99 – j5.23  
0.83 + j5.01  
2.93 – j2.55  
2.66 – j2.09  
2.13 – j2.13  
14.2  
53.5  
223  
–34  
–36  
–39  
1.13 – j5.22  
1.24 – j5.77  
0.92 + j5.19  
1.10 + j5.49  
14.8  
14.8  
53.3  
53.5  
212  
226  
Max Drain Efficiency  
P3dB  
(2)  
Z
()  
AM/PM  
()  
f
Z
Z
()  
load  
D
source  
()  
in  
(%)  
61.8  
61.9  
62.5  
Gain (dB)  
(dBm)  
(W)  
(MHz)  
1800  
1840  
1880  
0.99 – j5.23  
0.84 + j5.13  
2.93 – j2.72  
2.72 – j2.18  
2.37 – j2.18  
12.2  
54.0  
252  
–43  
–46  
–50  
1.13 – j5.22  
1.24 – j5.77  
0.95 + j5.35  
1.15 + j5.70  
12.7  
12.8  
53.8  
53.9  
239  
247  
(1) Load impedance for optimum P1dB efficiency.  
(2) Load impedance for optimum P3dB efficiency.  
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.  
= Impedance as measured from gate contact to ground.  
= Measured impedance presented to the output of the device at the package reference plane.  
source  
in  
load  
Input Load Pull  
Tuner and Test  
Circuit  
Output Load Pull  
Tuner and Test  
Circuit  
Device  
Under  
Test  
Z
Z
in  
Z
load  
source  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
8
P1dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1840 MHz  
0
0
-- 1  
-- 2  
-- 3  
-- 4  
-- 5  
-- 6  
-- 1  
48.5  
E
E
-- 2  
-- 3  
-- 4  
-- 5  
-- 6  
64  
56  
54  
58  
62  
60  
P
P
P
50  
52  
51  
50.5  
52  
51.5  
50  
49.5  
49  
1
2
1
2
0
3
4
5
6
0
3
4
5
6
REAL ()  
REAL ()  
Figure 8. P1dB Load Pull Ffficiency Contours (%)  
Figure 7. P1dB Load Pull Output Power Contours (dBm)  
0
-- 1  
-- 2  
-- 3  
-- 4  
-- 5  
-- 6  
0
-- 2 6  
E
20.5  
-- 2 4  
-- 1 8  
-- 2 2  
-- 2 0  
-- 1  
20  
19.5  
E
-- 2  
-- 3  
-- 4  
-- 5  
-- 6  
19  
P
P
-- 1 6  
18.5  
-- 1 4  
18  
17.5  
-- 1 2  
17  
-- 1 0  
1
2
1
2
0
3
4
5
6
0
3
4
5
6
REAL ()  
REAL ()  
Figure 10. P1dB Load Pull AM/PM Contours ()  
Figure 9. P1dB Load Pull Gain Contours (dB)  
NOTE:  
P
E
= Maximum Output Power  
= Maximum Drain Efficiency  
Gain  
Drain Efficiency  
Linearity  
Output Power  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
9
P3dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1840 MHz  
0
-- 1  
-- 2  
-- 3  
-- 4  
-- 5  
-- 6  
0
50  
-- 1  
52  
54  
E
E
-- 2  
-- 3  
-- 4  
-- 5  
-- 6  
56  
64  
58  
60  
62  
P
P
53  
52  
52.5  
51.5  
51  
50.5  
50  
49.5  
1
2
1
2
0
3
4
5
6
0
3
4
5
6
REAL ()  
REAL ()  
Figure 11. P3dB Load Pull Output Power Contours (dBm)  
Figure 12. P3dB Load Pull Efficiency Contours (%)  
0
0
18.5  
-- 3 0 -- 2 8  
-- 2 6  
-- 3 2  
-- 1  
-- 1  
-- 2  
-- 3  
-- 4  
-- 5  
-- 6  
-- 2 4  
-- 2 2  
18  
E
E
-- 2  
17.5  
-- 3  
P
17  
P
-- 1 8  
-- 1 6  
-- 2 0  
16.5  
16  
15.5  
-- 4  
-- 5  
-- 6  
15  
1
2
1
2
0
3
4
5
6
0
3
4
5
6
REAL ()  
REAL ()  
Figure 14. P3dB Load Pull AM/PM Contours ()  
Figure 13. P3dB Load Pull Gain Contours (dB)  
NOTE:  
P
E
= Maximum Output Power  
= Maximum Drain Efficiency  
Gain  
Drain Efficiency  
Linearity  
Output Power  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
10  
P1dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1840 MHz  
0
-- 1  
-- 2  
-- 3  
-- 4  
-- 5  
-- 6  
0
-- 1  
-- 2  
-- 3  
-- 4  
-- 5  
-- 6  
E
E
62  
60  
P
P
58  
53.5  
56  
54  
54  
52  
53  
52  
48  
52.5  
50  
51.5  
51  
46  
1
2
1
2
0
3
4
5
6
0
3
4
5
6
REAL ()  
REAL ()  
Figure 15. P1dB Load Pull Output Power Contours (dBm)  
Figure 16. P1dB Load Pull Ffficiency Contours (%)  
0
0
-- 1  
-- 1  
-- 2  
-- 3  
-- 4  
-- 5  
-- 6  
-- 4 0  
-- 3 8  
-- 2  
E
E
-- 3 6  
14.5  
-- 3 4  
-- 3 2  
P
P
-- 3  
-- 4  
-- 5  
-- 6  
-- 2 8  
-- 2 6  
-- 3 0  
14  
13.5  
-- 2 4  
13  
11  
12.5  
12  
11.5  
1
2
1
2
0
3
4
5
6
0
3
4
5
6
REAL ()  
REAL ()  
Figure 18. P1dB Load Pull AM/PM Contours ()  
Figure 17. P1dB Load Pull Gain Contours (dB)  
NOTE:  
P
E
= Maximum Output Power  
= Maximum Drain Efficiency  
Gain  
Drain Efficiency  
Linearity  
Output Power  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
11  
P3dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1840 MHz  
0
-- 1  
-- 2  
-- 3  
-- 4  
-- 5  
-- 6  
0
51.5  
52  
-- 1  
-- 2  
60  
E
E
58  
-- 3  
-- 4  
-- 5  
-- 6  
P
P
56  
54  
55  
54.5  
54  
52  
53.5  
50  
48  
53  
52  
52.5  
46  
1
2
0
3
4
5
6
1
2
0
3
4
5
6
REAL ()  
REAL ()  
Figure 19. P3dB Load Pull Output Power Contours (dBm)  
Figure 20. P3dB Load Pull Ffficiency Contours (%)  
0
0
-- 1  
-- 1  
-- 2  
-- 3  
-- 4  
-- 5  
-- 6  
-- 5 0  
-- 4 8  
-- 2  
-- 3  
E
E
-- 4 6  
-- 3 6  
12.5  
-- 4 4  
-- 4 2  
P
P
12  
-- 4 0  
-- 4  
11.5  
-- 3 8  
-- 5  
11  
9
10.5  
9.5  
10  
-- 3 4  
-- 6  
1
2
0
3
4
5
6
1
2
0
3
4
5
6
REAL ()  
REAL ()  
Figure 22. P3dB Load Pull AM/PM Contours ()  
Figure 21. P3dB Load Pull Gain Contours (dB)  
NOTE:  
P
E
= Maximum Output Power  
= Maximum Drain Efficiency  
Gain  
Drain Efficiency  
Linearity  
Output Power  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
12  
PACKAGE DIMENSIONS  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
13  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
14  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
15  
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS  
Refer to the following resources to aid your design process.  
Application Notes  
AN1907: Solder Reflow Attach Method for High Power RF Devices in Over--Molded Plastic Packages  
AN1955: Thermal Measurement Methodology of RF Power Amplifiers  
Engineering Bulletins  
EB212: Using Data Sheet Impedances for RF LDMOS Devices  
Software  
Electromigration MTTF Calculator  
.s2p File  
Development Tools  
Printed Circuit Boards  
To Download Resources Specific to a Given Part Number:  
1. Go to http://www.nxp.com/RF  
2. Search by part number  
3. Click part number link  
4. Choose the desired resource from the drop down menu  
REVISION HISTORY  
The following table summarizes revisions to this document.  
Revision  
Date  
Description  
0
May 2016  
Initial Release of Data Sheet  
A2T18H455W23NR6  
RF Device Data  
Freescale Semiconductor, Inc.  
16  
Information in this document is provided solely to enable system and software  
implementers to use Freescale products. There are no express or implied copyright  
licenses granted hereunder to design or fabricate any integrated circuits based on the  
information in this document.  
How to Reach Us:  
Home Page:  
freescale.com  
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Freescale reserves the right to make changes without further notice to any products  
herein. Freescale makes no warranty, representation, or guarantee regarding the  
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liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation consequential or incidental  
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address: freescale.com/SalesTermsandConditions.  
Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc.,  
Reg. U.S. Pat. & Tm. Off. Airfast is a trademark of Freescale Semiconductor, Inc. All  
other product or service names are the property of their respective owners.  
E 2016 Freescale Semiconductor, Inc.  
Document Number: A2T18H455W23N  
Rev. 0, 5/2016  

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