A2T18H160-24SR3 [NXP]
RF POWER, FET;
| 型号： | A2T18H160-24SR3 |
| 厂家： | 
NXP |
| 描述： | RF POWER, FET |
| 文件： | 总16页 (文件大小：454K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Document Number: A2T18H160--24S
Rev. 0, 11/2015
Freescale Semiconductor
Technical Data
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
This 28 W asymmetrical Doherty RF power LDMOS transistor is designed for
cellular base station applications covering the frequency range of 1805 to
1880 MHz.
A2T18H160--24SR3
1800 MHz
1805–1880 MHz, 28 W AVG., 28 V
AIRFAST RF POWER LDMOS
TRANSISTOR
Typical Doherty Single--Carrier W--CDMA Performance: VDD = 28 Vdc,
IDQA = 400 mA, VGSB = 0.65 Vdc, Pout = 28 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
G
Output PAR
(dB)
ACPR
(dBc)
ps
D
Frequency
1805 MHz
1840 MHz
1880 MHz
(dB)
17.9
17.8
17.8
(%)
49.9
49.3
50.2
7.7
7.7
7.8
–32.0
–33.8
–34.7
NI--780S--4L2L
Features
Advanced High Performance In--Package Doherty
Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
(1)
6
5
VBW
A
Carrier
Designed for Digital Predistortion Error Correction Systems
RF /V
1
2
RF /V
outA DSA
inA GSA
RF /V
inB GSB
RF /V
outB DSB
4
3
Peaking
(1)
VBW
B
(Top View)
Figure 1. Pin Connections
1. Device cannot operate with the V current
DD
supplied through pin 3 and pin 6.
Freescale Semiconductor, Inc., 2015. All rights reserved.
Table 1. Maximum Ratings
Rating
Symbol
Value
Unit
Vdc
Vdc
Vdc
C
Drain--Source Voltage
V
–0.5, +65
–6.0, +10
32, +0
DSS
Gate--Source Voltage
V
GS
DD
Operating Voltage
V
Storage Temperature Range
Case Operating Temperature Range
T
stg
–65 to +150
–40 to +150
–40 to +225
T
C
C
(1,2)
Operating Junction Temperature Range
T
J
C
Table 2. Thermal Characteristics
(2,3)
Characteristic
Symbol
Value
Unit
Thermal Resistance, Junction to Case
R
0.45
C/W
JC
Case Temperature 75C, 28 W Avg., W--CDMA, 28 Vdc, I
= 400 mA,
DQA
V
= 0.65 Vdc, 1840 MHz
GSB
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
Machine Model (per EIA/JESD22--A115)
Charge Device Model (per JESD22--C101)
2
B
IV
Table 4. Electrical Characteristics (T = 25C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
(4)
Off Characteristics
Zero Gate Voltage Drain Leakage Current
I
I
—
—
—
—
—
—
10
1
Adc
Adc
Adc
DSS
DSS
GSS
(V = 65 Vdc, V = 0 Vdc)
DS
GS
Zero Gate Voltage Drain Leakage Current
(V = 32 Vdc, V = 0 Vdc)
DS
GS
Gate--Source Leakage Current
(V = 5 Vdc, V = 0 Vdc)
I
1
GS
DS
On Characteristics -- Side A, Carrier
Gate Threshold Voltage
V
0.8
1.4
0.1
1.2
1.8
1.6
2.2
0.3
Vdc
Vdc
Vdc
GS(th)
(V = 10 Vdc, I = 60 Adc)
DS
D
Gate Quiescent Voltage
(V = 28 Vdc, I = 400 mAdc, Measured in Functional Test)
V
GSA(Q)
DD
D
Drain--Source On--Voltage
(V = 10 Vdc, I = 0.6 Adc)
V
0.15
DS(on)
GS
D
On Characteristics -- Side B, Peaking
Gate Threshold Voltage
V
0.8
0.1
1.2
1.6
0.3
Vdc
Vdc
GS(th)
(V = 10 Vdc, I = 100 Adc)
DS
D
Drain--Source On--Voltage
(V = 10 Vdc, I = 1.0 Adc)
V
0.15
DS(on)
GS
D
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf/calculators.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf and search for AN1955.
4. Each side of device measured separately.
(continued)
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
2
Table 4. Electrical Characteristics (T = 25C unless otherwise noted) (continued)
A
Characteristic
Symbol
Min
Typ
Max
Unit
(1,2)
Functional Tests
(In Freescale Doherty Test Fixture, 50 ohm system) V = 28 Vdc, I
= 400 mA, V
= 0.65 Vdc, P = 28 W Avg.,
DD
DQA
GSB
out
f = 1805 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in
3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
G
17.3
47.5
7.3
17.9
49.9
7.7
20.3
—
dB
%
ps
D
Drain Efficiency
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
PAR
—
dB
dBc
Adjacent Channel Power Ratio
ACPR
—
–32.0
–29.5
(2)
Load Mismatch
(In Freescale Doherty Test Fixture, 50 ohm system) I
= 400 mA, V
= 0.65 Vdc, f = 1840 MHz
No Device Degradation
DQA
GSB
VSWR 10:1 at 32 Vdc, 158 W CW Output Power
(3 dB Input Overdrive from 100 W CW Rated Power)
(2)
Typical Performance
(In Freescale Doherty Test Fixture, 50 ohm system) V = 28 Vdc, I
= 400 mA, V
= 0.65 Vdc, 1805–1880 MHz
DD
DQA
GSB
Bandwidth
P
P
@ 1 dB Compression Point, CW
P1dB
P3dB
—
—
—
126
—
—
—
W
W
out
out
(3)
@ 3 dB Compression Point
182
AM/PM
–10.3
(Maximum value measured at the P3dB compression point across
the 1805–1880 MHz frequency range)
VBW Resonance Point
VBW
—
135
—
MHz
res
(IMD Third Order Intermodulation Inflection Point)
Gain Flatness in 75 MHz Bandwidth @ P = 28 W Avg.
G
—
—
0.04
—
—
dB
out
F
Gain Variation over Temperature
G
0.008
dB/C
(–30C to +85C)
Output Power Variation over Temperature
P1dB
—
0.003
—
dB/C
(–30C to +85C)
Table 5. Ordering Information
Device
Tape and Reel Information
Package
A2T18H160--24SR3
R3 Suffix = 250 Units, 44 mm Tape Width, 13--inch Reel
NI--780S--4L2L
1. Part internally matched both on input and output.
2. Measurements made with device in an asymmetrical Doherty configuration.
3. P3dB = P
+ 7.0 dB where P
is the average output power measured using an unclipped W--CDMA single--carrier input signal where
avg
avg
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
3
V
GGA
C14
--
R2
C15
A2T18H160--24S
Rev. 2
C1
C2
C16
C17
R3
C3
C4
C
C18
C19
C6
C5
C7
Z1
C8
C9
P
C20
R1
C10
C11
C21
D68661
C24
C12
C13
R4
C22
C23
R5
C25
V
GGB
Figure 2. A2T18H160--24SR3 Test Circuit Component Layout
Table 6. A2T18H160--24SR3 Test Circuit Component Designations and Values
Part
Description
Part Number
D58628
Manufacturer
MTL
PCB
C1, C13, C16, C17, C22,
C24
10 F Chip Capacitors
C5750X7S2A106M230KB
TDK
C2, C4, C8, C12, C15, C19, 12 pF Chip Capacitors
C23
ATC600F120JT250XT
ATC
C3
1.8 pF Chip Capacitor
ATC600F1R8BT250XT
ATC600F0R3BT250XT
ATC600F1R0BT250XT
ATC600F2R0BT250XT
ATC600F0R5BT250XT
227CKS050M
ATC
C5, C6
C7
0.3 pF Chip Capacitors
ATC
1.0 pF Chip Capacitor
ATC
C9
2.0 pF Chip Capacitor
ATC
C10, C11, C20
C14, C25
C18
0.5 pF Chip Capacitors
ATC
220 F, 50 V Electrolytic Capacitors
9.1 pF Chip Capacitor
Illinois Capacitor
ATC
ATC600F9R1BT250XT
ATC600F1R5BT250XT
C10A50Z4
C21
1.5 pF Chip Capacitor
ATC
R1
50 , 4 W Chip Resistor
Anaren
Vishay
Vishay
Anaren
MTL
R2, R5
R3, R4
Z1
20 K, 1/4 W Chip Resistors
5.6 , 1/4 W Chip Resistors
1700–2000 MHz Band, 90, 5 dB Directional Coupler
CRCW120620K0JNEA
CRCW12065R60FKEA
X3C19P1-05S
PCB
Rogers RO4350B, 0.020, = 3.66
D68661
r
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
4
TYPICAL CHARACTERISTICS
53
52
51
50
49
18.3
18.2
18.1
18
V
= 28 Vdc, P = 28 W (Avg.), I
= 400 mA, V
= 0.65 Vdc
GSB
DD
out
DQA
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB
@ 0.01% Probability on CCDF
D
17.9
17.8
17.7
17.6
17.5
17.4
17.3
–2
–26
–28
–30
G
ps
–2.1
–2.2
–2.3
–2.4
–2.5
PARC
–32
–34
ACPR
–36
1760 1780 1800 1820 1840 1860 1880 1900 1920
f, FREQUENCY (MHz)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 28 Watts Avg.
0
V
V
= 28 Vdc, P = 34 W (PEP), I
= 400 mA
DD
out
DQA
= 0.65 Vdc, Two--Tone Measurements
GSB
–15
–30
–45
–60
–75
(f1 + f2)/2 = Center Frequency of 1840 MHz
IM3--U
IM3--L
IM5--L
IM5--U
IM7--L
IM7--U
1
10
TWO--TONE SPACING (MHz)
100
200
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
18.2
18
1
0
60
–28
V
= 28 Vdc, I
= 400 mA, V
= 0.65 Vdc
GSB
DD
DQA
f = 1840 MHz, Single--Carrier W--CDMA
3.84 MHz Channel Bandwidth
55
50
45
40
35
30
–30
–32
–34
–36
–38
–40
D
ACPR
17.8
17.6
17.4
17.2
17
–1
–2
–3
–4
–5
–1 dB = 16 W
G
ps
–2 dB = 26 W
–3 dB = 37 W
Input Signal PAR = 9.9 dB
@ 0.01% Probability on CCDF
PARC
10
20 30
40
50
60
P
, OUTPUT POWER (WATTS)
out
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS
65
55
45
35
25
15
5
22
20
18
16
14
12
10
–5
D
V
V
= 28 Vdc, I
GSB
= 400 mA
DD
DQA
= 0.65 Vdc
1880 MHz
1805 MHz
–15
–25
–35
–45
–55
–65
1840 MHz
ACPR
1805 MHz
1880 MHz
1840 MHz
1840 MHz
G
ps
1880 MHz
1805 MHz
Single--Carrier W--CDMA, 3.84 MHz Channel
Bandwidth, Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
1
10
100
200
P
, OUTPUT POWER (WATTS) AVG.
out
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
24
21
Gain
18
15
V
P
= 28 Vdc
= 0 dBm
= 400 mA
12
9
DD
in
I
DQA
V
= 0.65 Vdc
GSB
6
1500 1600 1700 1800 1900 2000 2100 2200 2300
f, FREQUENCY (MHz)
Figure 7. Broadband Frequency Response
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
6
Table 7. Carrier Side Load Pull Performance — Maximum Power Tuning
V
= 28 Vdc, I
= 408 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
DQA
Max Output Power
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
61.5
61.6
60.2
Gain (dB)
(dBm)
(W)
(MHz)
1805
1840
1880
2.25 – j8.58
2.88 – j9.59
4.30 – j10.4
2.61 + j7.74
4.68 – j7.50
4.73 – j8.14
4.76 – j8.44
20.1
48.7
73
–15
–15
–15
2.95 + j8.30
3.95 + j8.89
20.0
20.0
48.7
48.6
75
72
Max Output Power
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
62.3
62.6
61.3
Gain (dB)
(dBm)
(W)
(MHz)
1805
1840
1880
2.25 – j8.58
2.53 + j8.36
4.68 – j8.41
4.71 – j8.78
4.89 – j9.14
18.0
49.4
87
–22
–23
–22
2.88 – j9.59
4.30 – j10.4
2.91 + j9.02
4.06 + j9.90
17.9
18.0
49.4
49.3
87
85
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Table 8. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning
V
= 28 Vdc, I
= 408 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
DQA
Max Drain Efficiency
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
71.5
71.9
71.0
Gain (dB)
(dBm)
(W)
(MHz)
1805
1840
1880
2.25 – j8.58
2.88 – j9.59
4.30 – j10.4
2.13 + j7.81
7.94 – j3.73
7.67 – j3.36
7.25 – j3.56
22.2
47.2
52
–27
–29
–29
2.33 + j8.41
3.13 + j9.13
22.1
22.3
47.0
46.9
50
49
Max Drain Efficiency
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
72.0
72.3
71.1
Gain (dB)
(dBm)
(W)
(MHz)
1805
1840
1880
2.25 – j8.58
2.17 + j8.29
7.63 – j6.11
7.53 – j5.64
6.95 – j5.06
19.8
48.4
70
–31
–32
–34
2.88 – j9.59
4.30 – j10.4
2.41 + j8.94
3.27 + j9.86
19.7
19.8
48.3
48.0
67
63
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Z
Z
in
Z
load
source
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
7
Table 9. Peaking Side Load Pull Performance — Maximum Power Tuning
V
= 28 Vdc, V
= 0.65 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
GSB
Max Output Power
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
56.5
55.7
56.0
Gain (dB)
(dBm)
(W)
(MHz)
1805
1840
1880
2.70 – j9.87
2.49 + j9.58
3.97 – j9.45
3.81 – j9.81
4.09 – j10.1
15.5
50.5
112
–30
–31
–31
3.29 – j10.6
5.01 – j11.4
2.89 + j10.3
4.06 + j11.3
15.4
15.5
50.5
50.5
113
111
Max Output Power
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
56.6
57.0
56.7
Gain (dB)
(dBm)
(W)
(MHz)
1805
1840
1880
2.70 – j9.87
2.51 + j10.1
3.84 – j9.87
3.92 – j10.2
4.17 – j10.5
13.3
51.2
132
–38
–39
–39
3.29 – j10.6
5.01 – j11.4
2.95 + j10.8
4.34 + j12.1
13.3
13.4
51.2
51.1
133
129
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Table 10. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
V
= 28 Vdc, V
= 0.65 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
GSB
Max Drain Efficiency
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
69.4
69.8
69.7
Gain (dB)
(dBm)
(W)
(MHz)
1805
1840
1880
2.70 – j9.87
2.08 + j9.49
8.64 – j6.58
8.17 – j6.08
7.22 – j5.33
16.8
48.9
78
–35
–36
–36
3.29 – j10.6
5.01 – j11.4
2.35 + j10.1
3.22 + j11.2
16.8
16.8
48.9
48.7
77
73
Max Drain Efficiency
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
67.9
68.6
68.3
Gain (dB)
(dBm)
(W)
(MHz)
1805
1840
1880
2.70 – j9.87
2.17 + j10.0
8.72 – j7.75
8.30 – j7.39
7.94 – j6.26
14.6
49.7
92
–43
–44
–45
3.29 – j10.6
5.01 – j11.4
2.54 + j10.8
3.64 + j12.1
14.7
14.8
49.7
49.4
94
87
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Z
Z
in
Z
load
source
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
8
P1dB – TYPICAL CARRIER LOAD PULL CONTOURS — 1840 MHz
0
–2
–4
–6
–8
0
45
45.5
48.5
46
44.5
–2
46.5
E
E
–4
–6
–8
70
66
68
48
47
47.5
P
P
48
64
–10
–12
–10
–12
62
47.5
47
56
60
58
4
6
8
12
14
4
6
8
12
14
2
10
2
10
REAL ()
REAL ()
Figure 9. P1dB Load Pull Efficiency Contours (%)
Figure 8. P1dB Load Pull Output Power Contours (dBm)
0
0
23.5
–2
–4
–6
–8
–2
–30
–28
E
E
–4
–26
–24
–22
–6
23
22.5
22
21.5
–20
–18
–8
P
P
21
20.5
20
–10
–12
–10
–12
–16
–14
19.5
4
6
8
12
14
4
6
8
12
14
2
10
2
10
REAL ()
REAL ()
Figure 10. P1dB Load Pull Gain Contours (dB)
Figure 11. P1dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
9
P3dB – TYPICAL CARRIER LOAD PULL CONTOURS — 1840 MHz
0
–2
–4
–6
–8
0
46
64
45.5
46.5
–2
–4
47
68
72
E
E
–6
–8
66
64
48
47.5
70
P
P
49
48.5
–10
–12
–10
–12
62
60
56
58
60
4
6
8
12
14
2
10
4
6
8
12
14
2
10
REAL ()
REAL ()
Figure 12. P3dB Load Pull Output Power Contours (dBm)
Figure 13. P3dB Load Pull Efficiency Contours (%)
0
0
20.5
19.5
19
18.5
18
17.5
17
–2
–2
–4
–6
–8
20
21
–36
–34
–4
–6
–8
–32
E
E
–30
–28
P
P
–26
–24
–10
–12
–10
–12
–20
–22
4
6
8
12
14
4
6
8
12
14
2
10
2
10
REAL ()
REAL ()
Figure 14. P3dB Load Pull Gain Contours (dB)
Figure 15. P3dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
10
P1dB – TYPICAL PEAKING LOAD PULL CONTOURS — 1840 MHz
0
–2
0
46.5
47
62
–2
64
47.5
–4
–4
66
62
48
–6
–6
–8
E
E
68
48.5
–8
49
50
P
P
–10
–12
–14
–10
–12
–14
60
58
54
49.5
56
2
4
6
10
12
14
2
4
6
10
12
14
0
8
0
8
REAL ()
REAL ()
Figure 16. P1dB Load Pull Output Power Contours (dBm)
Figure 17. P1dB Load Pull Efficiency Contours (%)
0
–2
–4
0
–44
–42
–40
–2
–4
–38
–36
–34
–6
–8
–6
E
E
16.5
–8
–32
P
P
–10
–12
–14
–10
–12
–14
14.5
16
13
14
15.5
–30
15
13.5
2
4
6
10
12
14
2
4
6
10
12
14
0
8
0
8
REAL ()
REAL ()
Figure 18. P1dB Load Pull Gain Contours (dB)
Figure 19. P1dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
11
P3dB – TYPICAL PEAKING LOAD PULL CONTOURS — 1840 MHz
0
–2
0
47
47.5
48
–2
–4
–6
66
–4
48.5
64
–6
68
62
60
49
E
E
–8
–8
–10
–12
–14
–10
P
4
P
51
50.5
58
–12
–14
52
56
50
54
49.5
54
2
6
10
12
14
2
4
6
10
12
14
0
8
0
8
REAL ()
REAL ()
Figure 20. P3dB Load Pull Output Power Contours (dBm)
Figure 21. P3dB Load Pull Efficiency Contours (%)
0
–2
–4
–6
0
–2
–4
–50
–48
–46
–6
–44
14.5
–42
–40
E
E
–8
–8
–10
–12
–14
–10
–12
–14
P
P
4
12
14
–38
11
13.5
13
–36
12.5
11.5
2
4
6
10
12
14
2
6
10
12
14
0
8
0
8
REAL ()
REAL ()
Figure 22. P3dB Load Pull Gain Contours (dB)
Figure 23. P3dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
12
PACKAGE DIMENSIONS
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
13
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
14
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
Electromigration MTTF Calculator
RF High Power Model
s2p File
Development Tools
Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.freescale.com/rf
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
Nov. 2015
Initial Release of Data Sheet
A2T18H160--24SR3
RF Device Data
Freescale Semiconductor, Inc.
15
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Document Number: A2T18H160--24S
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