BF1105WR [NXP]
N-channel dual-gate MOS-FETs; N沟道双栅极的MOS- FET的![BF1105WR](http://pdffile.icpdf.com/pdf1/p00045/img/icpdf/BF1105_235950_icpdf.jpg)
型号: | BF1105WR |
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描述: | N-channel dual-gate MOS-FETs |
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DISCRETE SEMICONDUCTORS
DATA SHEET
BF1105; BF1105R; BF1105WR
N-channel dual-gate MOS-FETs
Product specification
1997 Dec 02
Supersedes data of 1997 Dec 01
File under Discrete Semiconductors, SC07
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
FEATURES
PINNING
PIN
• Short channel transistor with high
forward transfer admittance to input
capacitance ratio
DESCRIPTION
3
4
1
2
3
4
source
drain
• Low noise gain controlled amplifier
up to 1 GHz.
gate 2
gate 1
2
1
• Internal self-biasing circuit to
ensure good cross-modulation
performance during AGC and good
DC stabilization.
Top view
MSB035
BF1105R marking code: NAp.
Fig.2 Simplified outline
(SOT143R).
APPLICATIONS
• VHF and UHF applications with 5 V
supply voltage, such as television
tuners and professional
communications equipment.
3
4
page
4
1
3
lfpage
DESCRIPTION
Enhancement type N-channel
field-effect transistor with source and
substrate interconnected. Integrated
diodes between gates and source
protect against excessive input
voltage surges. The BF1105,
BF1105R and BF1105WR are
encapsulated in the SOT143B,
SOT143R and SOT343R plastic
packages respectively.
2
2
1
Top view
MSB014
Top view
MSB842
BF1105 marking code: NEp.
BF1105WR marking code: NA.
Fig.1 Simplified outline
(SOT143B).
Fig.3 Simplified outline
(SOT343R).
QUICK REFERENCE DATA
SYMBOL
PARAMETER
drain-source voltage
CONDITIONS
MIN.
TYP. MAX. UNIT
VDS
ID
−
−
7
V
drain current
−
−
30
200
−
mA
mW
mS
pF
Ptot
yfs
total power dissipation
forward transfer admittance
input capacitance at gate 1
reverse transfer capacitance
noise figure
T
amb ≤ 80 °C
−
−
25
−
31
2.2
25
1.7
−
Cig1-ss
Crss
F
2.7
40
2.5
−
f = 1 MHz
−
fF
f = 800 MHz
−
dB
Xmod
Tj
cross-modulation
input level for k = 1% at 40 dB AGC 100
dBµV
°C
operating junction temperature
−
−
150
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.
1997 Dec 02
2
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
drain-source voltage
CONDITIONS
MIN.
MAX.
UNIT
VDS
ID
−
−
−
−
−
7
V
drain current
30
mA
mA
mA
mW
°C
IG1
IG2
Ptot
Tstg
Tj
gate 1 current
±10
±10
200
+150
+150
gate 2 current
total power dissipation
storage temperature
operating junction temperature
T
amb ≤ 80 °C; note 1; see Fig.4
−65
−
°C
Note
1. Device mounted on a printed-circuit board.
MGM243
250
handbook, halfpage
P
tot
(mW)
200
150
100
50
0
0
40
80
120
160
T
(°C)
amb
Fig.4 Power derating curve.
1997 Dec 02
3
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
350
UNIT
K/W
K/W
Rth j-a
Rth j-s
thermal resistance from junction to ambient in free air note 1
thermal resistance from junction to soldering point
200
Note
1. Device mounted on a printed-circuit board.
STATIC CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
V(BR)DSS
drain-source breakdown voltage
VG1-S = VG2-S = 0; ID = 10 µA
7
−
−
V
V(BR)G1-SS gate 1-source breakdown voltage VG2-S = 0; ID = 0; IG1-S = 10 µA
V(BR)G2-SS gate 2-source breakdown voltage VG1-S = VDS = 0; IG2-S = 10 µA
7
7
−
−
V
−
−
V
VG2-S (th) gate 2-source threshold voltage
VG1-S = 5 V; VDS = 5 V; ID = 20 µA 0.3
0.8
−
1.2
16
50
20
V
IDSX
self-biasing drain current
gate 1 cut-off current
gate 2 cut-off current
VG2-S = 4 V; VDS = 5 V
8
−
−
mA
nA
nA
IG1-SS
IG2-SS
VG1-S = 5 V; VG2-S = 0; ID = 0
VG1-S = VDS = 0; VG2-S = 4 V
−
−
DYNAMIC CHARACTERISTICS
Common source; Tamb = 25 °C; VG2-S = 4 V; VDS = 5 V; self-biasing current; unless otherwise specified.
SYMBOL
yfs
PARAMETER
CONDITIONS
MIN.
25
TYP. MAX. UNIT
forward transfer admittance pulsed; Tj = 25 °C
input capacitance at gate 1 f = 1 MHz
input capacitance at gate 2 f = 1 MHz
31
−
mS
pF
pF
pF
fF
Cig1-ss
Cig2-ss
Coss
Crss
−
−
−
−
−
−
2.2
1.6
1.2
25
2.7
−
output capacitance
f = 1 MHz
−
reverse transfer capacitance f = 1 MHz
40
2.5
−
F
noise figure
power gain
f = 800 MHz; YS = YS opt
1.7
38
dB
dB
Gp
GS = 2 mS; BS = BS opt; GL = 0.5 mS;
BL = BL opt; f = 200 MHz; see Fig.16
GS = 3.3 mS; BS = BS opt; GL = 1 mS;
BL = BL opt; f = 800 MHz; see Fig.17
−
20
−
−
−
−
dB
Xmod
cross-modulation
input level for k = 1% at 0 dB AGC;
fw = 50 MHz; funw = 60 MHz; see Fig.18
85
100
dBµV
dBµV
input level for k = 1% at 40 dB AGC;
fw = 50 MHz; funw = 60 MHz; see Fig.18
−
1997 Dec 02
4
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
MGM245
MGM244
40
25
handbook, halfpage
handbook, halfpage
V
= 1.7 V
I
G1
D
I
D
(mA)
(mA)
20
V
= 4 V
1.6 V
G2-S
3.5 V
3 V
30
1.5 V
1.4 V
15
10
5
2.5 V
2 V
20
10
1.3 V
1.2 V
1.1 V
1 V
1.5 V
1 V
0
0
0
0.5
1
1.5
2
2.5
(V)
0
2
4
6
8
V
(V)
DS
V
G1
VG2-S = 4 V.
VDS = 5 V.
Tj = 25 °C.
Tj = 25 °C.
Fig.5 Output characteristics; typical values.
Fig.6 Transfer characteristics; typical values.
MGM247
MGM246
16
40
handbook, halfpage
handbook, halfpage
I
D
y
fs
(mS)
V
= 4 V
3.5 V
G2-S
(mA)
12
30
(1)
(2)
(3)
3 V
8
4
0
20
10
0
(4) (5)
2.5 V
I
2 V
0
1
2
3
4
V
5
(V)
0
10
20
30
D (mA)
G2-S
(1) VDS = 5 V.
(2) VDS = 4.5 V.
(3) VDS = 4 V.
(4) VDS = 3.5 V.
(5) VDS = 3 V.
VDS = 5 V.
Tj = 25 °C.
Fig.7 Forward transfer admittance as a function
of drain current; typical values.
Fig.8 Drain current as a function of gate 2
voltage; typical values.
1997 Dec 02
5
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
fMGM248
MGM249
16
16
handbook, halfpage
handbook, halfpage
I
I
D
D
(mA)
(mA)
12
12
8
4
0
8
4
0
0
2
4
6
8
−8
−6
−4
−2
0
V
(V)
I
(µA)
DS
G1
VG2-S = 4 V.
VDS = 5 V; VG2-S = 4 V; Tj = 25 °C.
Tj = 25 °C.
Fig.9 Drain current as a function of drain-source
voltage; typical values.
Fig.10 Drain current as a function of gate 1 current;
typical values.
MGM250
110
handbook, halfpage
V
unw
(dBµV)
100
90
80
0
20
40
60
gain reduction (dB)
VDS = 5 V; VG2nom = 4 V; IDnom = Iself bias; fw = 50 MHz;
funw = 60 MHz; Tamb = 25 °C.
Fig.11 Unwanted voltage for 1% cross-modulation
as a function of gain reduction;
typical values (see Fig.18).
1997 Dec 02
6
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
MGM251
MGM252
2
3
3
10
−10
10
handbook, halfpage
handbook, halfpage
y
is
|y
|
ϕ
rs
(µS)
rs
(mS)
(deg)
10
ϕ
rs
rs
2
2
10
−10
b
is
1
|y
|
−10
10
g
is
−1
10
−2
−1
10
1
10
3
3
2
10
10
2
10
10
10
f (MHz)
f (MHz)
VDS = 5 V; VG2-S = 4 V.
VDS = 5 V; VG2-S = 4 V.
D = 12 mA; Tamb = 25 °C.
ID = 12 mA; Tamb = 25 °C.
I
Fig.12 Input admittance as a function of frequency;
typical values.
Fig.13 Reverse transfer admittance and phase as
a function of frequency; typical values.
MGM253
MGM254
2
2
10
−10
10
handbook, halfpage
handbook, halfpage
y
|y
|
ϕ
os
fs
(mS)
fs
(mS)
(deg)
b
|y
|
os
fs
1
−10
10
g
os
−1
10
ϕ
fs
−2
−1
3
1
10
10
3
2
2
10
10
10
10
10
f (MHz)
f (MHz)
VDS = 5 V; VG2-S = 4 V.
VDS = 5 V; VG2-S = 4 V.
ID = 12 mA; Tamb = 25 °C.
ID = 12 mA; Tamb = 25 °C.
Fig.14 Forward transfer admittance and phase as
a function of frequency; typical values.
Fig.15 Output admittance as a function of
frequency; typical values.
1997 Dec 02
7
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
V
V
AGC
DS
1 nF
2 µH
1 nF
1 nF
1 nF
output
47 kΩ
50 Ω
L2
1 nF
G2
G1
D
BF1105
BF1105R
BF1105WR
5.5 pF
C1
10 pF
S
input
50 Ω
15
pF
BB405
L1
330 kΩ
1 nF
BB405
V
330 kΩ
1 nF
1 nF
input
V
output
tun
tun
MGM255
VDS = 5 V, GS= 2 mS, GL = 0.5 mS, f = 200 MHz.
L1 = 45 nH, 4 turns, internal diameter = 4 mm, 0.8 mm copper wire.
L2 = 160 nH, 3 turns, internal diameter = 8 mm, 0.8 mm copper wire; tapped at approximately half a turn from the cold side, to set GL = 0.5 mS.
C1 adjusted for GS = 2 mS.
Fig.16 Gain test circuit.
V
V
AGC
1 nF
DS
1 nF
47 kΩ
L3
1 nF
1 nF
L2
G2
G1
D
S
output
50 Ω
BF1105
BF1105R
BF1105WR
1 nF
L1
input
0.5 to 3.5 pF
4 to 40 pF
50 Ω
MGM256
2 to 18 pF
0.5 to 3.5 pF
VDS = 5 V, GS= 3.3 mS, GL = 1 mS, f = 800 MHz.
L1 = 2 cm, silvered 0.8 mm copper wire 4 mm above ground plane.
L2 = 2 cm, silvered 0.8 mm copper wire 4 mm above ground plane.
L3 = 11 turns 0.5 mm copper wire without spacing, internal diameter = 3 mm, L = approx. 200 nH.
Fig.17 Gain test circuit.
1997 Dec 02
8
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
V
V
G2
DS
4.7 nF
10 kΩ
47 µH
4.7 nF
10 nF
G2
G1
D
BF1105
BF1105R
BF1105WR
10 nF
R1 =
50 Ω
S
R
gen
50 Ω
50 Ω
MGM257
V
i
Fig.18 Cross-modulation test set-up.
Table 1 Scattering parameters: VDS = 5 V; VG2-S = 4 V; ID = 12 mA
S11
S21
S12
S22
f
MAGNITUDE ANGLE MAGNITUDE ANGLE MAGNITUDE ANGLE MAGNITUDE ANGLE
(MHz)
(ratio)
(deg)
(ratio)
(deg)
(ratio)
(deg)
(ratio)
(deg)
50
100
200
300
400
500
600
700
800
900
1000
0.994
0.991
0.982
0.968
0.956
0.937
0.918
0.897
0.878
0.858
0.840
−3.8
−7.5
3.060
3.047
3.004
2.932
2.896
2.815
2.735
2.651
2.575
2.482
2.396
175.4
170.9
162.1
153.4
145.3
137.1
129.2
121.5
114.0
106.5
99.5
0.000
0.002
0.003
0.004
0.006
0.007
0.007
0.008
0.008
0.008
0.008
86.9
86.1
82.7
79.7
77.8
76.7
76.3
76.7
79.7
82.2
88.0
0.985
0.983
0.980
0.976
0.972
0.967
0.961
0.955
0.948
0.941
0.935
−2.1
−4.2
−14.7
−21.7
−28.8
−35.4
−41.8
−48.1
−54.0
−59.9
−65.5
−8.3
−12.1
−16.2
−20.0
−23.7
−27.3
−30.9
−34.4
−37.9
Table 2 Noise data: VDS = 5 V; VG2-S = 4 V; ID = 12 mA
Γopt
f
Fmin
(dB)
Rn
(Ω)
(MHz)
(ratio)
(deg)
39.7
800
1.5
0.674
37.15
1997 Dec 02
9
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
PACKAGE OUTLINES
Plastic surface mounted package; 4 leads
SOT143B
D
B
E
A
X
y
H
v
M
A
E
e
b
p
w
M
B
4
3
Q
A
A
1
c
1
2
L
p
b
1
e
1
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
max
UNIT
A
b
b
c
D
E
e
e
H
L
p
Q
v
w
y
p
1
1
E
1.1
0.9
0.48
0.38
0.88
0.78
0.15
0.09
3.0
2.8
1.4
1.2
2.5
2.1
0.45
0.15
0.55
0.45
0.1
mm
1.9
1.7
0.2
0.1
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
97-02-28
SOT143B
1997 Dec 02
10
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
Plastic surface mounted package; reverse pinning; 4 leads
SOT143R
D
B
E
A
X
y
H
v
M
A
E
e
b
w
M
B
p
3
4
Q
A
A
1
c
2
1
L
p
b
1
e
1
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
max
UNIT
A
b
b
c
D
E
e
e
H
L
p
Q
v
w
y
p
1
1
E
1.1
0.9
0.48
0.38
0.88
0.78
0.15
0.09
3.0
2.8
1.4
1.2
2.5
2.1
0.55
0.25
0.45
0.25
0.1
mm
1.9
1.7
0.2
0.1
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
97-03-10
SOT143R
1997 Dec 02
11
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
Plastic surface mounted package; reverse pinning; 4 leads
SOT343R
D
B
E
A
X
H
v
M
A
y
E
e
3
4
Q
A
A
1
c
2
1
L
p
w
M
B
b
p
b
1
e
1
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
max
A
UNIT
b
b
c
D
E
e
e
H
E
L
Q
v
w
y
p
p
1
1
0.4
0.3
1.1
0.8
0.7
0.5
0.25
0.10
2.2
1.8
1.35
1.15
2.2
2.0
0.45
0.15
0.23
0.13
mm
0.1
1.15
0.2
0.2
0.1
1.3
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
SOT343R
97-05-21
1997 Dec 02
12
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
DEFINITIONS
Data Sheet Status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1997 Dec 02
13
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
NOTES
1997 Dec 02
14
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FETs
BF1105; BF1105R; BF1105WR
NOTES
1997 Dec 02
15
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Tel. +27 11 470 5911, Fax. +27 11 470 5494
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615800, Fax. +358 9 61580920
South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 821 2382
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,
Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 3 301 6312, Fax. +34 3 301 4107
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 23 53 60, Fax. +49 40 23 536 300
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 481 7730
Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,
Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
Uruguay: see South America
Vietnam: see Singapore
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381
Middle East: see Italy
For all other countries apply to: Philips Semiconductors,
Internet: http://www.semiconductors.philips.com
International Marketing & Sales Communications, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1997
SCA56
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
117067/00/03/pp16
Date of release: 1997 Dec 02
Document order number: 9397 750 03136
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