BSN254AMO [NXP]

TRANSISTOR 300 mA, 250 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, PLASTIC, SOT-54 (TO-92) VARIANT, 3 PIN, FET General Purpose Small Signal;
BSN254AMO
型号: BSN254AMO
厂家: NXP    NXP
描述:

TRANSISTOR 300 mA, 250 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, PLASTIC, SOT-54 (TO-92) VARIANT, 3 PIN, FET General Purpose Small Signal

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DISCRETE SEMICONDUCTORS  
DATA SHEET  
BSN254  
BSN254A  
N-channel enhancement mode  
vertical D-MOS transistors  
April 1995  
Product specification  
File under Discrete Semiconductors, SC13b  
Philips Semiconductors  
Product specification  
N-channel enhancement mode vertical  
D-MOS transistors  
BSN254  
BSN254A  
DESCRIPTION  
QUICK REFERENCE DATA  
N-channel enhancement mode  
vertical D-MOS transistors in TO-92  
variant envelope and designed for  
use as line current interrupters in  
telephone sets and for application in  
relay, high-speed and  
Drain-source voltage  
VDS  
ID  
max.  
max.  
max.  
250 V  
300 mA  
1 W  
Drain current (DC)  
Total power dissipation up to Tamb = 25 °C  
Drain-source on-resistance  
ID = 300 mA; VGS = 10 V  
Ptot  
typ.  
max.  
5.0 Ω  
7.0 Ω  
RDS(on)  
line-transformer drivers.  
Gate-source threshold voltage  
VGS(th)  
max.  
2 V  
FEATURES  
Direct interface to C-MOS, TTL,  
PINNING (BSN254)  
etc.  
1 = gate  
High-speed switching  
No second breakdown  
Low RDS (on)  
2 = drain  
3 = source  
PINNING (BSN254A)  
1 = source  
2 = gate  
3 = drain  
PIN CONFIGURATION - TO-92 VARIANT  
d
s
handbook, halfpage  
1
2
3
g
MAM146  
Note: Various pinnings are available on request.  
Fig.1 Simplified outline and symbol.  
April 1995  
2
Philips Semiconductors  
Product specification  
N-channel enhancement mode vertical  
D-MOS transistors  
BSN254  
BSN254A  
RATINGS  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
Drain-source voltage  
VDS  
± VGSO  
ID  
max.  
250 V  
20 V  
Gate-source voltage (open drain)  
Drain current (DC)  
max.  
max.  
max.  
max.  
300 mA  
1.2 A  
1 W  
Drain current (peak)  
IDM  
Ptot  
Tstg  
Tj  
Total power dissipation up to Tamb = 25 °C (note 1)  
Storage temperature range  
Junction temperature  
65 to + 150 °C  
max.  
150 °C  
THERMAL RESISTANCE  
From junction to ambient (note 1)  
Note  
Rth j-a  
=
125 K/W  
1. Device mounted on printed-circuit board, max. lead length 4 mm, mounting pad for drain lead min. 10 mm × 10 mm.  
CHARACTERISTICS  
Tj = 25 °C unless otherwise specified  
Drain-source breakdown voltage  
ID = 10 µA; VGS = 0  
V(BR) DSS  
min.  
max.  
max.  
250 V  
1 µA  
Drain-source leakage current  
VDS = 200 V; VGS = 0  
IDSS  
Gate-source leakage current  
± VGS = 20 V; VDS = 0  
± IGSS  
100 nA  
Gate threshold voltage  
ID = 1 mA; VDS = VGS  
min.  
max.  
0.8 V  
2.0 V  
VGS(th)  
Drain-source on-resistance  
ID = 300 mA; VGS = 10 V  
typ.  
max.  
5.0 Ω  
7.0 Ω  
RDS (on)  
RDS(on)  
Yfs  
ID = 20 mA; VGS = 2.4 V  
Transfer admittance  
max.  
10 Ω  
min.  
typ.  
200 mS  
400 mS  
ID = 300 mA; VDS = 25 V  
Input capacitance at f = 1 MHz  
VDS = 25 V; VGS = 0  
typ.  
max.  
65 pF  
90 pF  
Ciss  
April 1995  
3
Philips Semiconductors  
Product specification  
N-channel enhancement mode vertical  
D-MOS transistors  
BSN254  
BSN254A  
Output capacitance at f = 1 MHz  
typ.  
max.  
20 pF  
30 pF  
V
DS = 25 V; VGS = 0  
Coss  
Feedback capacitance at f = 1 MHz  
VDS = 25 V; VGS = 0  
typ.  
max.  
5 pF  
15 pF  
Crss  
Switching times (see Figs 2 and 3)  
typ.  
max.  
5 ns  
10 ns  
ID = 250 mA; VDD = 50 V; VGS = 0 to 10 V  
ton  
typ.  
max.  
20 ns  
30 ns  
toff  
V
= 50 V  
handbook, halfpage  
INPUT  
handbook, halfpage  
90 %  
DD  
10 %  
90 %  
10 V  
0 V  
OUTPUT  
I
D
50  
10 %  
MSA631  
t
t
off  
on  
MBB692  
Fig.2 Switching times test circuit.  
Fig.3 Input and output waveforms.  
MRC238  
MDA712  
1.2  
2
handbook, halfpage  
handbook, halfpage  
I
D
P
(A)  
tot  
V
= 10 V  
6 V  
1.6  
(W)  
GS  
5 V  
0.8  
1.2  
0.8  
4 V  
0.4  
3 V  
2 V  
0.4  
0
0
0
0
50  
100  
150  
200  
(°C)  
2
4
6
8
10  
(V)  
T
V
DS  
amb  
Fig.4 Power derating curve.  
Fig.5 Output characteristics; Tj = 25 °C; typical  
values.  
April 1995  
4
Philips Semiconductors  
Product specification  
N-channel enhancement mode vertical  
D-MOS transistors  
BSN254  
BSN254A  
MDA713  
MDA714  
4
10  
2
handbook, halfpage  
handbook, halfpage  
I
D
I
(A)  
D
(mA)  
1.6  
V
= 10 V  
5 V  
4 V  
GS  
3
10  
1.2  
0.8  
3 V  
2
10  
0.4  
0
10  
0
4
8
12  
R
16  
()  
0
2
4
6
8
10  
(V)  
V
DSon  
GS  
Fig.6 Transfer characteristic; VDS = 10 V;  
Fig.7 On-resistance as a function of drain current;  
Tj = 25 °C; typical value.  
Tj = 25 °C; typical values.  
MDA716  
MDA715  
200  
1.4  
handbook, halfpage  
handbook, halfpage  
C
(pF)  
k
160  
1.2  
120  
80  
1
0.8  
0.6  
C
C
iss  
40  
oss  
rss  
C
0
0
5
10  
15  
20  
V
25  
(V)  
50  
0
50  
100  
150  
T (°C)  
j
DS  
Fig.9  
VGS(th)at Tj  
----------------------------------------  
k =  
;
Fig.8 Capacitances as a function of drain-source  
voltage; VGS = 0; f = 1 MHz; Tj = 25 °C;  
typical values.  
VGS(th)at 25 °C  
VGS(th) at 1 mA; typical values  
April 1995  
5
Philips Semiconductors  
Product specification  
N-channel enhancement mode vertical  
D-MOS transistors  
BSN254  
BSN254A  
MDA717  
2.8  
k
2.4  
2
(1)  
(2)  
1.6  
1.2  
0.8  
0.4  
50  
0
50  
100  
150  
T (°C)  
j
Fig.10  
RDS (on) at Tj  
--------------------------------------------  
k =  
;
RDS (on) at 25 °C  
typical values.  
April 1995  
6
Philips Semiconductors  
Product specification  
N-channel enhancement mode vertical  
D-MOS transistors  
BSN254  
BSN254A  
PACKAGE OUTLINES  
Plastic single-ended leaded (through hole) package; 3 leads (on-circle)  
SOT54 variant  
c
L
2
E
d
A
L
b
1
2
e
1
e
D
3
b
1
L
1
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
L
L
2
1
UNIT  
mm  
A
b
b
c
D
d
E
e
e
L
1
1
max  
max  
5.2  
5.0  
0.48  
0.40  
0.66  
0.56  
0.45  
0.40  
4.8  
4.4  
1.7  
1.4  
4.2  
3.6  
14.5  
12.7  
2.54  
1.27  
2.5  
2.5  
Notes  
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
97-04-14  
SOT54 variant  
TO-92  
SC-43  
April 1995  
7
Philips Semiconductors  
Product specification  
N-channel enhancement mode vertical  
D-MOS transistors  
BSN254  
BSN254A  
DEFINITIONS  
Data sheet status  
Objective specification  
Preliminary specification  
Product specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
April 1995  
8
Philips Semiconductors  
Product specification  
N-channel enhancement mode vertical  
D-MOS transistors  
BSN254  
BSN254A  
NOTES  
April 1995  
9
Philips Semiconductors  
Product specification  
N-channel enhancement mode vertical  
D-MOS transistors  
BSN254  
BSN254A  
NOTES  
April 1995  
10  
Philips Semiconductors  
Product specification  
N-channel enhancement mode vertical  
D-MOS transistors  
BSN254  
BSN254A  
NOTES  
April 1995  
11  
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Internet: http://www.semiconductors.philips.com  
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825  
© Philips Electronics N.V. 1997  
SCA54  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
137107/00/01/pp12  
Date of release: April 1995  
Document order number: 9397 750 02462  
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N-channel enhancement mode vertical D-MOS transistors in TO-92 variant envelop  
use as line current interrupters in telephone sets and for application in relay, high-sp  
transformer drivers.  
Cross reference  
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End of Life information  
Datahandbook system  
l Direct interface to C-MOS, TTL, etc.  
l High-speed switching  
l No second breakdown  
l Low RDS (on)  
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BSN254; BSN254A  
BSN254; BSN254A  
BSN254; N-channel enhancement 01-Apr-95  
BSN254A mode vertical D-MOS  
transistors  
Product  
Specification  
12  
75  
Products, packages, availability and ordering  
North  
Order code  
(12nc)  
Partnumber American  
Partnumber  
marking/packing package device status  
Standard  
BSN254  
BSN254  
Marking *  
9340 049 30126  
SOT54 Full productio  
Ammopack,  
AMO  
Radial  
Standard  
BSN254A  
BSN254A  
Marking *  
9340 039 60126  
SOT54 Full productio  
Ammopack,  
AMO  
2 of 2  
AMO  
Ammopack,  
Radial  
Please read information about some discontinued variants of this product.  
Find similar products:  
BSN254; BSN254A links to the similar products page containing an overview  
similar in function or related to the part number(s) as listed on this page. The simila  
includes products from the same catalog tree(s) , relevant selection guides and prod  
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