BT131WSERIES [NXP]

Triacs logic level ; 三端双向可控硅逻辑电平\n
BT131WSERIES
型号: BT131WSERIES
厂家: NXP    NXP
描述:

Triacs logic level
三端双向可控硅逻辑电平\n

可控硅
文件: 总7页 (文件大小:57K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Philips Semiconductors  
Product specification  
Triacs  
logic level  
BT131W series  
GENERAL DESCRIPTION  
QUICK REFERENCE DATA  
Glasspassivated,sensitivegatetriacs  
in a plastic envelope suitable for  
surface mounting, intended for use in  
SYMBOL PARAMETER  
MAX. MAX. UNIT  
BT131W-  
Repetitive peak off-state voltages  
RMS on-state current  
Non-repetitive peak on-state current  
500  
500  
1
600  
600  
1
general  
purpose  
and  
bidirectional  
phase control  
VDRM  
IT(RMS)  
ITSM  
V
A
A
switching  
applications. These devices are  
intended to be interfaced directly to  
microcontrollers, logic integrated  
circuits and other low power gate  
trigger circuits.  
10  
10  
PINNING - SOT223  
PIN CONFIGURATION  
SYMBOL  
PIN  
1
DESCRIPTION  
main terminal 1  
4
T2  
T1  
2
main terminal 2  
gate  
3
G
2
3
1
tab main terminal 2  
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134).  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
V
-500  
-600  
6001  
VDRM  
Repetitive peak off-state  
voltages  
-
-
5001  
IT(RMS)  
ITSM  
RMS on-state current  
Non-repetitive peak  
on-state current  
full sine wave; Tsp 108 ˚C  
full sine wave; Tj = 25 ˚C prior to  
surge  
1
A
t = 20 ms  
-
-
-
10  
11  
0.5  
A
A
t = 16.7 ms  
I2t  
dIT/dt  
I2t for fusing  
Repetitive rate of rise of  
on-state current after  
triggering  
t = 10 ms  
A2s  
ITM = 1.5 A; IG = 0.2 A;  
dIG/dt = 0.2 A/µs  
T2+ G+  
-
50  
50  
50  
10  
2
5
5
0.5  
150  
125  
A/µs  
A/µs  
A/µs  
A/µs  
A
T2+ G-  
-
T2- G-  
-
T2- G+  
-
IGM  
Peak gate current  
Peak gate voltage  
Peak gate power  
Average gate power  
Storage temperature  
Operating junction  
temperature  
-
VGM  
PGM  
PG(AV)  
Tstg  
Tj  
-
V
-
-
W
over any 20 ms period  
W
-40  
-
˚C  
˚C  
1 Although not recommended, off-state voltages up to 800V may be applied without damage, but the triac may  
switch to the on-state. The rate of rise of current should not exceed 3 A/µs.  
July 1998  
1
Rev 1.000  
Philips Semiconductors  
Product specification  
Triacs  
logic level  
BT131W series  
THERMAL RESISTANCES  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
Rth j-sp  
Thermal resistance  
junction to solder point  
Thermal resistance  
junction to ambient  
full or half cycle  
-
-
15  
K/W  
Rth j-a  
pcb mounted; minimum footprint  
pcb mounted; pad area as in fig:14  
-
-
156  
70  
-
-
K/W  
K/W  
STATIC CHARACTERISTICS  
Tj = 25 ˚C unless otherwise stated  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
IGT  
Gate trigger current  
VD = 12 V; IT = 0.1 A  
T2+ G+  
-
-
-
-
0.4  
1.3  
1.4  
3.8  
3
3
3
7
mA  
mA  
mA  
mA  
T2+ G-  
T2- G-  
T2- G+  
IL  
Latching current  
VD = 12 V; IGT = 0.1 A  
T2+ G+  
T2+ G-  
T2- G-  
T2- G+  
-
1.2  
4.0  
1.0  
2.5  
1.3  
1.2  
0.7  
0.3  
0.1  
5
8
mA  
mA  
mA  
mA  
mA  
V
V
V
mA  
-
-
5
-
8
IH  
VT  
VGT  
Holding current  
On-state voltage  
Gate trigger voltage  
VD = 12 V; IGT = 0.1 A  
IT = 2 A  
-
5
-
-
1.5  
1.5  
-
VD = 12 V; IT = 0.1 A  
VD = 400 V; IT = 0.1 A; Tj = 125 ˚C  
0.2  
-
ID  
Off-state leakage current VD = VDRM(max); Tj = 125 ˚C  
0.5  
DYNAMIC CHARACTERISTICS  
Tj = 25 ˚C unless otherwise stated  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
dVD/dt  
tgt  
Critical rate of change of  
off-state voltage  
Gate controlled turn-on  
time  
VDM = 67% VDRM(max); Tj = 125 ˚C;  
exponential waveform; RGK = 1 kΩ  
ITM = 1.5 A; VD = VDRM(max); IG = 0.1 A;  
dIG/dt = 5 A/µs  
5
-
15  
2
-
-
V/µs  
µs  
July 1998  
2
Rev 1.000  
Philips Semiconductors  
Product specification  
Triacs  
logic level  
BT131W series  
Ptot / W  
1.4  
IT(RMS) / A  
Tsp(max) / C  
= 180  
104  
107  
110  
1.2  
1
108 C  
1.2  
1
1
120  
90  
0.8  
0.6  
0.4  
0.2  
0
113  
116  
0.8  
0.6  
0.4  
0.2  
0
60  
30  
119  
122  
125  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
-50  
0
50  
100  
150  
Tsp / C  
IT(RMS) / A  
Fig.1. Maximum on-state dissipation, Ptot, versus rms  
on-state current, IT(RMS), where α = conduction angle.  
Fig.4. Maximum permissible rms current IT(RMS) ,  
versus lead temperature Tlead.  
ITSM / A  
IT(RMS) / A  
1000  
100  
10  
3
2.5  
2.0  
1.5  
1
I
TSM  
time  
I
T
T
Tj initial = 25 C max  
dIT/dt limit  
T2- G+ quadrant  
0.5  
1
0
10us  
100us  
1ms  
T / s  
10ms  
100ms  
0.01  
0.1  
surge duration / s  
1
10  
Fig.2. Maximum permissible non-repetitive peak  
on-state current ITSM, versus pulse width tp, for  
sinusoidal currents, tp 20ms.  
Fig.5. Maximum permissible repetitive rms on-state  
current IT(RMS), versus surge duration, for sinusoidal  
currents, f = 50 Hz; Tlead 108˚C.  
VGT(Tj)  
VGT(25 C)  
ITSM / A  
12  
10  
8
1.6  
1.4  
1.2  
1
I
TSM  
time  
I
T
T
Tj initial = 25 C max  
6
4
0.8  
0.6  
0.4  
2
0
1
10  
100  
1000  
-50  
0
50  
Tj / C  
100  
150  
Number of cycles at 50Hz  
Fig.3. Maximum permissible non-repetitive peak  
on-state current ITSM, versus number of cycles, for  
sinusoidal currents, f = 50 Hz.  
Fig.6. Normalised gate trigger voltage  
VGT(Tj)/ VGT(25˚C), versus junction temperature Tj.  
July 1998  
3
Rev 1.000  
Philips Semiconductors  
Product specification  
Triacs  
logic level  
BT131W series  
IGT(Tj)  
IGT(25 C)  
IT / A  
2
1.5  
1
3
Tj = 125 C  
Tj = 25 C  
T2+ G+  
T2+ G-  
T2- G-  
T2- G+  
2.5  
2
Vo = 1.0 V  
Rs = 0.21 Ohms  
typ  
1.5  
1
max  
0.5  
0
0.5  
0
0
0.5  
1
1.5  
2
-50  
0
50  
100  
150  
Tj / C  
VT / V  
Fig.7. Normalised gate trigger current  
IGT(Tj)/ IGT(25˚C), versus junction temperature Tj.  
Fig.10. Typical and maximum on-state characteristic.  
IL(Tj)  
IL(25 C)  
Zth j-sp (K/W)  
100  
10  
3
2.5  
2
unidirectional  
bidirectional  
1
1.5  
1
t
P
D
p
0.1  
0.01  
t
0.5  
0
10us  
0.1ms  
1ms  
10ms  
tp / s  
0.1s  
1s  
10s  
-50  
0
50  
Tj / C  
100  
150  
Fig.8. Normalised latching current IL(Tj)/ IL(25˚C),  
versus junction temperature Tj.  
Fig.11. Transient thermal impedance Zth j-sp, versus  
pulse width tp.  
dVD/dt (V/us)  
1000  
IH(Tj)  
IH(25C)  
3
2.5  
2
100  
10  
1
1.5  
1
0.5  
0
-50  
0
50  
100  
150  
0
50  
100  
150  
Tj / C  
Tj / C  
Fig.9. Normalised holding current IH(Tj)/ IH(25˚C),  
versus junction temperature Tj.  
Fig.12. Minimum, critical rate of rise of off-state  
voltage, dVD/dt versus junction temperature Tj.  
July 1998  
4
Rev 1.000  
Philips Semiconductors  
Product specification  
Triacs  
logic level  
BT131W series  
MOUNTING INSTRUCTIONS  
Dimensions in mm.  
3.8  
min  
1.5  
min  
2.3  
6.3  
1.5  
min  
(3x)  
1.5  
min  
4.6  
Fig.13. soldering pattern for surface mounting SOT223.  
July 1998  
5
Rev 1.000  
Philips Semiconductors  
Product specification  
Triacs  
logic level  
BT131W series  
MECHANICAL DATA  
Dimensions in mm  
Net Mass: 0.11 g  
6.7  
6.3  
B
3.1  
2.9  
0.32  
0.24  
0.2  
M
A
A
4
0.10  
0.02  
7.3  
6.7  
3.7  
3.3  
16  
max  
13  
2
3
1
10  
max  
1.05  
0.85  
0.80  
0.60  
2.3  
1.8  
max  
M
0.1  
(4x)  
B
4.6  
Fig.14. SOT223 surface mounting package.  
Notes  
1. For further information, refer to Philips publication SC18 " SMD Footprint Design and Soldering Guidelines".  
Order code: 9397 750 00505.  
2. Epoxy meets UL94 V0 at 1/8".  
July 1998  
6
Rev 1.000  
Philips Semiconductors  
Product specification  
Triacs  
logic level  
BT131W series  
DEFINITIONS  
Data sheet status  
Objective specification  
This data sheet contains target or goal specifications for product development.  
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.  
Product specification  
This data sheet contains final product specifications.  
Limiting values  
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and  
operation of the device at these or at any other conditions above those given in the Characteristics sections of  
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
Philips Electronics N.V. 1998  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the  
copyright owner.  
The information presented in this document does not form part of any quotation or contract, it is believed to be  
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any  
consequence of its use. Publication thereof does not convey nor imply any license under patent or other  
industrial or intellectual property rights.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices or systems where malfunction of these  
products can be reasonably expected to result in personal injury. Philips customers using or selling these products  
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting  
from such improper use or sale.  
July 1998  
7
Rev 1.000  

相关型号:

BT131W_SERIES

Triacs logic level
ETC

BT131_SERIES

Triacs logic level
ETC

BT132

Triacs logic level
NXP

BT132-500D

Triacs logic level
NXP

BT132-600D

Triacs logic level
NXP

BT132-600D,412

BT132-600D
NXP

BT132-600DT/R

600V, 1A, 4 QUADRANT LOGIC LEVEL TRIAC, TO-92, PLASTIC, TO-92 VARIANT, 3 PIN
NXP

BT132SERIESD

Triacs logic level
ETC

BT132_SERIES_D

Triacs logic level
ETC

BT134

Triacs
NXP

BT134

Triacs logic level
SUNTAC