BT258S-800R [NXP]

Thyristors logic level; 晶闸管逻辑电平
BT258S-800R
型号: BT258S-800R
厂家: NXP    NXP
描述:

Thyristors logic level
晶闸管逻辑电平

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文件: 总6页 (文件大小:51K)
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Philips Semiconductors  
Product specification  
Thyristors  
logic level  
BT258S-800R  
GENERAL DESCRIPTION  
QUICK REFERENCE DATA  
Passivated,sensitivegatethyristorin  
a plastic envelope, suitable for  
surface mounting, intended for use in  
general purpose switching and  
phase control applications. These  
devices are intended to be interfaced  
directly to microcontrollers, logic  
integrated circuits and other low  
power gate trigger circuits.  
SYMBOL  
PARAMETER  
MAX. UNIT  
VDRM, VRRM  
IT(AV)  
IT(RMS)  
ITSM  
Repetitive peak off-state voltages  
800  
V
Average on-state current  
5
8
75  
A
A
A
RMS on-state current  
Non-repetitive peak on-state current  
PINNING - SOT428  
PIN CONFIGURATION  
SYMBOL  
PIN  
NUMBER  
tab  
a
k
1
2
cathode  
anode  
gate  
3
2
g
1
3
tab  
anode  
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134).  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
VDRM, VRRM Repetitive peak off-state  
voltages  
-
800  
V
IT(AV)  
IT(RMS)  
ITSM  
Average on-state current half sine wave; Tmb 111 ˚C  
-
-
5
8
A
A
RMS on-state current  
Non-repetitive peak  
on-state current  
all conduction angles  
half sine wave; Tj = 25 ˚C prior to  
surge  
t = 10 ms  
-
-
-
-
75  
82  
28  
50  
A
A
t = 8.3 ms  
t = 10 ms  
ITM = 10 A; IG = 50 mA;  
dIG/dt = 50 mA/µs  
I2t  
dIT/dt  
I2t for fusing  
Repetitive rate of rise of  
on-state current after  
triggering  
A2s  
A/µs  
IGM  
Peak gate current  
Peak reverse gate voltage  
Peak gate power  
Average gate power  
Storage temperature  
Operating junction  
temperature  
-
2
5
5
0.5  
150  
1251  
A
V
W
W
˚C  
˚C  
VRGM  
PGM  
PG(AV)  
Tstg  
-
-
-
over any 20 ms period  
-40  
-
Tj  
1 Note: Operation above 110˚C may require the use of a gate to cathode resistor of 1kor less.  
October 2002  
1
Rev 2.000  
Philips Semiconductors  
Product specification  
Thyristors  
logic level  
BT258S-800R  
THERMAL RESISTANCES  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
Rth j-mb  
Thermal resistance  
junction to mounting base  
Thermal resistance  
junction to ambient  
-
-
2.0  
K/W  
Rth j-a  
pcb (FR4) mounted; footprint as in Fig.14  
-
75  
-
K/W  
STATIC CHARACTERISTICS  
Tj = 25 ˚C unless otherwise stated  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
IGT  
IL  
Gate trigger current  
Latching current  
Holding current  
VD = 12 V; IT = 0.1 A  
VD = 12 V; IGT = 0.1 A  
VD = 12 V; IGT = 0.1 A  
IT = 16 A  
-
50  
0.4  
0.3  
1.3  
0.4  
0.2  
0.1  
200  
10  
6
µA  
mA  
mA  
V
-
IH  
-
-
-
VT  
VGT  
On-state voltage  
Gate trigger voltage  
1.6  
1.5  
-
VD = 12 V; IT = 0.1 A  
VD = VDRM(max); IT = 0.1 A; Tj = 110 ˚C  
V
0.1  
-
V
mA  
ID, IR  
Off-state leakage current VD = VDRM(max); VR = VRRM(max); Tj = 125 ˚C  
0.5  
DYNAMIC CHARACTERISTICS  
Tj = 25 ˚C unless otherwise stated  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
dVD/dt  
Critical rate of rise of  
off-state voltage  
Gate controlled turn-on  
time  
Circuit commutated  
turn-off time  
VDM = 67% VDRM(max); Tj = 125 ˚C;  
exponential waveform; RGK = 100 Ω  
ITM = 10 A; VD = VDRM(max); IG = 5 mA;  
dIG/dt = 0.2 A/µs  
VD = 67% VDRM(max); Tj = 125 ˚C;  
ITM = 12 A; VR = 24 V; dITM/dt = 10 A/µs;  
dVD/dt = 2 V/µs; RGK = 1 kΩ  
50  
100  
-
-
-
V/µs  
tgt  
tq  
-
2
µs  
-
100  
µs  
October 2002  
2
Rev 2.000  
Philips Semiconductors  
Product specification  
Thyristors  
logic level  
BT258S-800R  
P
(W)  
T
(˚C)  
109  
tot  
ITSM / A  
mb(max)  
80  
70  
60  
50  
40  
30  
20  
10  
0
8
6
4
2
0
a = 1.57  
conduction form  
I
angle  
factor  
(a)  
TSM  
I
111  
113  
115  
117  
119  
121  
123  
125  
T
degrees  
1.9  
60  
90  
120  
180  
2.8  
2.2  
1.9  
1.57  
2.2  
time  
Tj initial = 25 C max  
T
2.8  
4
1
10  
100  
1000  
0
6
4
2
I
(A)  
Number of half cycles at 50Hz  
T(AV)  
Fig.1. Maximum on-state dissipation, Ptot, versus  
average on-state current, IT(AV), where  
Fig.4. Maximum permissible non-repetitive peak  
on-state current ITSM, versus number of cycles, for  
sinusoidal currents, f = 50 Hz.  
a = form factor = IT(RMS)/ IT(AV)  
.
ITSM / A  
IT(RMS) / A  
24  
1000  
100  
10  
20  
16  
12  
8
dI T/dt limit  
I
TSM  
time  
I
T
T
4
Tj initial = 25 C max  
0
10ms  
10us  
100us  
1ms  
0.01  
0.1  
surge duration / s  
1
10  
T / s  
Fig.2. Maximum permissible non-repetitive peak  
on-state current ITSM, versus pulse width tp, for  
sinusoidal currents, tp 10ms.  
Fig.5. Maximum permissible repetitive rms on-state  
current IT(RMS), versus surge duration, for sinusoidal  
currents, f = 50 Hz; Tmb 111˚C.  
IT(RMS) / A  
VGT(Tj)  
9
8
7
6
5
4
3
2
1
0
VGT(25 C)  
1.6  
111 C  
1.4  
1.2  
1
0.8  
0.6  
0.4  
-50  
0
50  
Tmb / C  
100  
150  
-50  
0
50  
Tj / C  
100  
150  
Fig.3. Maximum permissible rms current IT(RMS)  
versus mounting base temperature Tmb.  
,
Fig.6. Normalised gate trigger voltage  
VGT(Tj)/ VGT(25˚C), versus junction temperature Tj.  
October 2002  
3
Rev 2.000  
Philips Semiconductors  
Product specification  
Thyristors  
logic level  
BT258S-800R  
IGT(Tj)  
IGT(25 C)  
I
/ A  
T
30  
20  
10  
0
3
T = 125 °C  
j
T = 25 °C  
j
2.5  
2
1.5  
1
typ  
max  
Vo = 1 V  
Rs = 0.04  
0.5  
0
0
0.5  
1
1.5  
2
-50  
0
50  
Tj / C  
100  
150  
V
/ V  
T
Fig.7. Normalised gate trigger current  
IGT(Tj)/ IGT(25˚C), versus junction temperature Tj.  
Fig.10. Typical and maximum on-state characteristic.  
Zth j-mb (K/W)  
10  
IL(Tj)  
IL(25 C)  
3
2.5  
2
1
1.5  
1
t
P
D
0.1  
p
t
0.5  
0
0.01  
10us  
0.1ms  
1ms  
10ms  
tp / s  
0.1s  
1s  
10s  
-50  
0
50  
Tj / C  
100  
150  
Fig.8. Normalised latching current IL(Tj)/ IL(25˚C),  
Fig.11. Transient thermal impedance Zth j-mb, versus  
pulse width tp.  
versus junction temperature Tj.  
dVD/dt (V/us)  
1000  
IH(Tj)  
IH(25 C)  
3
RGK = 100 ohms  
2.5  
2
100  
1.5  
1
10  
0.5  
0
1
-50  
0
50  
Tj / C  
100  
150  
0
50  
100  
150  
Tj / C  
Fig.9. Normalised holding current IH(Tj)/ IH(25˚C),  
Fig.12. Typical, critical rate of rise of off-state voltage,  
dVD/dt versus junction temperature Tj.  
versus junction temperature Tj.  
October 2002  
4
Rev 2.000  
Philips Semiconductors  
Product specification  
Thyristors  
logic level  
BT258S-800R  
MECHANICAL DATA  
Dimensions in mm  
Net Mass: 1.1 g  
seating plane  
2.38 max  
0.93 max  
1.1  
5.4  
6.73 max  
tab  
4 min  
4.6  
6.22 max  
0.5 min  
10.4 max  
0.5  
2
0.3  
0.5  
3
1
0.8 max  
(x2)  
2.285 (x2)  
Fig.13. SOT428 : centre pin connected to tab.  
MOUNTING INSTRUCTIONS  
Dimensions in mm  
7.0  
7.0  
2.15  
2.5  
1.5  
4.57  
Fig.14. SOT428 : minimum pad sizes for surface mounting.  
Notes  
1. Plastic meets UL94 V0 at 1/8".  
October 2002  
5
Rev 2.000  
Philips Semiconductors  
Product specification  
Thyristors  
logic level  
BT258S-800R  
DEFINITIONS  
DATA SHEET STATUS  
DATA SHEET  
STATUS2  
PRODUCT  
DEFINITIONS  
STATUS3  
Objective data  
Development  
This data sheet contains data from the objective specification for  
product development. Philips Semiconductors reserves the right to  
change the specification in any manner without notice  
Preliminary data  
Qualification  
Production  
This data sheet contains data from the preliminary specification.  
Supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to change the specification without  
notice, in order to improve the design and supply the best possible  
product  
Product data  
This data sheet contains data from the product specification. Philips  
Semiconductors reserves the right to make changes at any time in  
order to improve the design, manufacturing and supply. Changes will  
be communicated according to the Customer Product/Process  
Change Notification (CPCN) procedure SNW-SQ-650A  
Limiting values  
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and  
operation of the device at these or at any other conditions above those given in the Characteristics sections of  
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
Philips Electronics N.V. 2003  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the  
copyright owner.  
The information presented in this document does not form part of any quotation or contract, it is believed to be  
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any  
consequence of its use. Publication thereof does not convey nor imply any license under patent or other  
industrial or intellectual property rights.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices or systems where malfunction of these  
products can be reasonably expected to result in personal injury. Philips customers using or selling these products  
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting  
from such improper use or sale.  
2 Please consult the most recently issued datasheet before initiating or completing a design.  
3 The product status of the device(s) described in this datasheet may have changed since this datasheet was  
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.  
October 2002  
6
Rev 2.000  

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