BUJD103AD [NXP]

NPN power transistor with integrated diode; 集成二极管NPN功率晶体管
BUJD103AD
型号: BUJD103AD
厂家: NXP    NXP
描述:

NPN power transistor with integrated diode
集成二极管NPN功率晶体管

晶体 二极管 晶体管
文件: 总14页 (文件大小:286K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BUJD103AD  
NPN power transistor with integrated diode  
Rev. 02 — 6 October 2009  
Product data sheet  
1. Product profile  
1.1 General description  
High voltage, high speed, planar passivated NPN power switching transistor with  
integrated anti-parallel E-C diode in a SOT428 (DPAK) surface-mountable plastic  
package.  
1.2 Features and benefits  
„ Fast switching  
„ Integrated anti-parallel E-C diode  
„ High voltage capability  
„ Very low switching and conduction  
losses  
1.3 Applications  
„ DC-to-DC converters  
„ Inverters  
„ Electronic lighting ballasts  
„ Motor control systems  
1.4 Quick reference data  
Table 1.  
Quick reference  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
IC  
collector current  
-
-
-
-
4
A
Ptot  
total power  
dissipation  
see Figure 4Tmb 25 °C  
80  
W
VCESM  
collector-emitter  
peak voltage  
VBE = 0 V  
-
-
700  
V
Static characteristics  
hFE DC current gain  
IC = 500 mA; VCE = 5 V;  
see Figure 12Tj = 25 °C  
13  
-
22  
32  
-
VCE = 5 V; IC = 3 A;  
12.5  
Tmb = 25 °C; see Figure 12  
BUJD103AD  
NXP Semiconductors  
NPN power transistor with integrated diode  
2. Pinning information  
Table 2.  
Pinning information  
Pin  
1
Symbol Description  
Simplified outline  
Graphic symbol  
B
C
E
base  
mb  
C
[1]  
2
collector  
emitter  
3
B
E
2
sym131  
1
3
SOT428  
(DPAK)  
[1] it is not possible to make a connection to pin 2 of the SOT428 (DPAK) package  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
SOT428  
BUJD103AD  
DPAK  
plastic single-ended surface-mounted package (DPAK); 3 leads (one  
lead cropped)  
4. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
Parameter  
Conditions  
Min  
Max  
Unit  
VCESM  
collector-emitter peak  
voltage  
VBE = 0 V  
-
700  
V
VCBO  
VCEO  
collector-base voltage IE = 0 A  
-
-
700  
400  
V
V
collector-emitter  
voltage  
IB = 0 A  
IC  
collector current  
peak collector current  
base current  
-
4
A
ICM  
IB  
see Figure 1, 2 and 3  
-
8
A
-
2
A
IBM  
Ptot  
Tstg  
Tj  
peak base current  
-
4
A
total power dissipation Tmb 25 °C; see Figure 4  
storage temperature  
-
80  
150  
150  
W
°C  
°C  
-65  
-
junction temperature  
BUJD103AD_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 6 October 2009  
2 of 14  
BUJD103AD  
NXP Semiconductors  
NPN power transistor with integrated diode  
001aac000  
V
C
CC  
10  
I
C
L
(A)  
V
CL(CE)  
probe point  
8
6
4
2
0
L
B
I
Bon  
DUT  
V
BB  
001aab999  
Fig 1. Test circuit for reverse bias safe operating area  
0
200  
400  
600  
800  
CEclamp  
1000  
(V)  
V
Fig 2. Reverse bias safe operating area  
001aac001  
2
10  
I
C
(A)  
duty cycle = 0.01  
10  
I
CM(max)  
II  
(3)  
t = 20 μs  
p
I
C(max)  
(1)  
50 μs  
100 μs  
1
200 μs  
500 μs  
DC  
(2)  
1  
10  
I
(3)  
2  
10  
III  
(3)  
3  
10  
2
3
1
10  
10  
10  
V
(V)  
CEclamp  
Fig 3. Forward bias safe operating area for Tmb 25 °C  
BUJD103AD_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 6 October 2009  
3 of 14  
BUJD103AD  
NXP Semiconductors  
NPN power transistor with integrated diode  
001aab993  
120  
P
der  
(%)  
80  
40  
0
0
40  
80  
120  
160  
T
mb  
(°C)  
Fig 4. Normalized total power dissipation as a function of mounting base temperature  
BUJD103AD_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 6 October 2009  
4 of 14  
BUJD103AD  
NXP Semiconductors  
NPN power transistor with integrated diode  
5. Thermal characteristics  
Table 5.  
Symbol  
Rth(j-mb)  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
thermal resistance from see Figure 5  
junction to mounting  
base  
-
-
1.56  
K/W  
Rth(j-a)  
thermal resistance from printed-circuit-board mounted; minimum  
-
75  
-
K/W  
junction to ambient  
footprint; see Figure 6  
001aab998  
10  
Z
th(j-mb)  
(K/W)  
δ = 0.5  
1
0.2  
0.1  
t
p
0.05  
0.02  
P
δ =  
tot  
T
1  
10  
10  
0.01  
t
t
p
T
2  
5  
4  
3  
2  
1  
10  
10  
10  
10  
10  
1
10  
t
p
(s)  
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse width  
7.0  
7.0  
1.5  
2.15  
2.5  
4.57  
001aab021  
Fig 6. Minimum footprint SOT428  
BUJD103AD_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 6 October 2009  
5 of 14  
BUJD103AD  
NXP Semiconductors  
NPN power transistor with integrated diode  
6. Characteristics  
Table 6.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
ICES  
collector-emitter cut-off VBE = 0 V; VCE = 700 V; Tj = 25 °C  
-
-
-
-
-
-
-
-
-
-
1
2
1
5
1
mA  
mA  
mA  
mA  
mA  
current  
[1]  
[1]  
VBE = 0 V; VCE = 700 V; Tj = 125 °C;  
VBE = 0 V; VCE = 700 V; Tj = 25 °C;  
VBE = 0 V; VCE = 700 V; Tj = 100 °C  
[1]  
[1]  
ICBO  
ICEO  
IEBO  
collector-base cut-off  
current  
VCB = 700 V; IE = 0 A;  
collector-emitter cut-off VCE = 400 V; IB = 0 A;  
current  
-
-
0.1  
mA  
emitter-base cut-off  
current  
VEB = 9 V; IC = 0 A  
VEB = 7 V; IC = 0 A  
-
-
-
-
1
mA  
mA  
V
-
10  
-
VCEOsus  
VCEsat  
collector-emitter  
sustaining voltage  
IB = 0 A; IC = 10 mA; LC = 25 mH;  
see Figure 7 and 8  
400  
collector-emitter  
saturation voltage  
IC = 1 A; IB = 0.2 A; see Figure 9 and 10  
IC = 2 A; IB = 0.5 A; see Figure 9 and 10  
IC = 3 A; IB = 0.6 A; see Figure 9 and 10  
IC = 4 A; IB = 1 A; see Figure 9 and 10  
-
0.1  
0.5  
0.6  
1
V
V
V
V
V
V
V
V
-
0.2  
-
0.25  
0.3  
-
1
VBEsat  
base-emitter saturation IC = 1 A; IB = 0.2 A; see Figure 11  
-
0.85  
0.92  
0.97  
1.04  
17  
1.2  
1.6  
1.5  
1.5  
32  
voltage  
IC = 2 A; IB = 0.5 A; see Figure 11  
-
IC = 3 A; IB = 0.6 A; see Figure 11  
-
VF  
forward voltage  
DC current gain  
IF = 2 A  
-
hFE  
IC = 1 mA; VCE = 5 V; Tmb = 25 °C;  
see Figure 12  
10  
IC = 500 mA; VCE = 5 V; Tj = 25 °C;  
see Figure 12  
13  
12  
11  
-
22  
32  
40  
22  
-
IC = 1 A; VCE = 5 V; Tmb = 25 °C;  
see Figure 12  
20  
IC = 2 A; VCE = 5 V; Tmb = 25 °C;  
see Figure 12  
16  
IC = 3 A; VCE = 5 V; Tmb = 25 °C;  
see Figure 12  
12.5  
Dynamic characteristics  
ton  
turn-on time  
IC = 2.5 A; IBon = 0.5 A; IBoff = -0.5 A;  
RL = 75 ; Tj 25 °C; resistive load;  
see Figure 13 and 14  
-
0.52  
0.6  
µs  
BUJD103AD_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 6 October 2009  
6 of 14  
BUJD103AD  
NXP Semiconductors  
NPN power transistor with integrated diode  
Table 6.  
Symbol  
ts  
Characteristics …continued  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
storage time  
IC = 2.5 A; IBon = 0.5 A; IBoff = -0.5 A;  
RL = 75 ; Tj = 25 °C; resistive load;  
see Figure 13 and 14  
-
2.7  
3.3  
µs  
IC = 2 A; IBon = 0.4 A; VBB = -5 V; LB = 1 µH;  
Tj = 25 °C; inductive load;  
see Figure 15 and 16  
-
-
-
-
-
1.2  
-
1.4  
1.8  
0.35  
120  
60  
µs  
µs  
µs  
ns  
ns  
IC = 2 A; IBon = 0.4 A; VBB = -5 V; LB = 1 µH;  
Tj = 100 °C; inductive load; see Figure 15  
and 16  
tf  
fall time  
IC = 2.5 A; IBon = 0.5 A; IBoff = -0.5 A;  
RL = 75 ; Tj = 25 °C; resistive load;  
see Figure 17 and 14  
0.3  
-
IC = 2 A; IBon = 0.4 A; VBB = -5 V; LB = 1 µH;  
Tj = 100 °C; inductive load; see Figure 15  
and 16  
IC = 2 A; IBon = 0.4 A; VBB = -5 V; LB = 1 µH;  
Tj 25 °C; inductive load;  
30  
see Figure 18 and 16  
[1] Measured with half sine-wave voltage (curve tracer)  
I
C
50 V  
100 Ω to 200 Ω  
(mA)  
horizontal  
oscilloscope  
vertical  
250  
6 V  
300 Ω  
1 Ω  
100  
30 Hz to 60 Hz  
001aab987  
10  
0
Fig 7. Test circuit for collector-emitter sustaining  
voltage  
min  
V
CE  
(V)  
V
CEOsus  
001aab988  
Fig 8. Oscilloscope display for collector-emitter  
sustaining voltage test waveform  
BUJD103AD_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 6 October 2009  
7 of 14  
BUJD103AD  
NXP Semiconductors  
NPN power transistor with integrated diode  
001aab995  
001aab997  
2.0  
V
CEsat  
(V)  
V
CEsat  
(V)  
0.5  
0.4  
0.3  
0.2  
0.1  
0
I
C
= 1 A  
2 A 3 A  
4 A  
1.6  
1.2  
0.8  
0.4  
0
2  
1  
1  
10  
10  
1
10  
10  
1
10  
I
(A)  
I (A)  
C
B
Fig 9. Collector-emitter saturation voltage as a  
function of base current; typical values  
Fig 10. Collector-emitter saturation voltage as a  
function of collector current; typical values  
001aab996  
001aab994  
2
1.4  
10  
V
BEsat  
(V)  
T = 25 °C  
j
1.2  
h
FE  
1.0  
0.8  
0.6  
0.4  
0.2  
0
V
= 5 V  
1 V  
CE  
10  
1
10  
1  
2  
1  
10  
1
10  
10  
1
10  
I
C
(A)  
I (A)  
C
Fig 11. Base-emitter saturation voltage as a function of  
collector current; typical values  
Fig 12. DC current gain as a function of collector  
current; typical values  
BUJD103AD_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 6 October 2009  
8 of 14  
BUJD103AD  
NXP Semiconductors  
NPN power transistor with integrated diode  
V
CC  
I
C
I
Con  
90 %  
90 %  
R
L
V
t
IM  
0
R
B
DUT  
10 %  
p
t
t
f
T
001aab989  
t
s
I
B
t
on  
t
off  
I
Bon  
10 %  
Fig 13. Test circuit for resistive load switching  
t
t 30 ns  
r
I  
Boff  
001aab990  
Fig 14. Switching times waveforms for resistive load  
V
C
I
C
CC  
I
Con  
90 %  
L
L
B
I
Bon  
DUT  
V
BB  
001aab991  
10 %  
t
t
f
t
s
Fig 15. Test circuit for inductive load switching  
t
off  
I
B
I
Bon  
t
I  
Boff  
001aab992  
Fig 16. Switching times waveforms for inductive load  
BUJD103AD_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 6 October 2009  
9 of 14  
BUJD103AD  
NXP Semiconductors  
NPN power transistor with integrated diode  
V
CC  
V
CC  
R
L
L
C
V
t
IM  
0
R
B
DUT  
L
B
I
V
Bon  
DUT  
BB  
p
T
001aab989  
001aab991  
Fig 18. Test circuit for inductive load switching  
Fig 17. Test circuit for resistive load switching  
BUJD103AD_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 6 October 2009  
10 of 14  
BUJD103AD  
NXP Semiconductors  
NPN power transistor with integrated diode  
7. Package outline  
Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped)  
SOT428  
y
E
A
A
A
1
b
2
E
1
mounting  
base  
D
2
D
1
H
D
2
L
L
2
L
1
1
3
b
1
b
M
c
w
A
e
e
1
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
y
max  
D
min  
E
min  
L
1
min  
2
1
UNIT  
A
A
1
b
b
b
c
D
E
e
e
1
H
D
L
L
2
w
1
2
1
2.38  
2.22  
0.93  
0.46  
0.89  
0.71  
1.1  
0.9  
5.46  
5.00  
0.56  
0.20  
6.22  
5.98  
6.73  
6.47  
10.4  
9.6  
2.95  
2.55  
0.9  
0.5  
4.0  
4.45  
0.5  
mm  
2.285 4.57  
0.2  
0.2  
REFERENCES  
OUTLINE  
VERSION  
EUROPEAN  
PROJECTION  
ISSUE DATE  
IEC  
JEDEC  
JEITA  
06-02-14  
06-03-16  
SOT428  
SC-63  
TO-252  
Fig 19. Package outline SOT428 (DPAK)  
BUJD103AD_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 6 October 2009  
11 of 14  
BUJD103AD  
NXP Semiconductors  
NPN power transistor with integrated diode  
8. Revision history  
Table 7.  
Revision history  
Document ID  
BUJD103AD_2  
Modifications:  
BUJD103AD_1  
Release date  
Data sheet status  
Change notice  
Supersedes  
20091006  
Product data sheet  
-
BUJD103AD_1  
Various changes to content.  
20090508 Product data sheet  
-
-
BUJD103AD_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 6 October 2009  
12 of 14  
BUJD103AD  
NXP Semiconductors  
NPN power transistor with integrated diode  
9. Legal information  
9.1 Data sheet status  
Document status [1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term 'short data sheet' is explained in section "Definitions".  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product  
status information is available on the Internet at URL http://www.nxp.com.  
Applications — Applications that are described herein for any of these  
9.2 Definitions  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
9.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Export control — This document as well as the item(s) described herein may  
be subject to export control regulations. Export might require a prior  
authorization from national authorities.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
9.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
10. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
BUJD103AD_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 6 October 2009  
13 of 14  
BUJD103AD  
NXP Semiconductors  
NPN power transistor with integrated diode  
11. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
1.1  
1.2  
1.3  
1.4  
General description . . . . . . . . . . . . . . . . . . . . . .1  
Features and benefits. . . . . . . . . . . . . . . . . . . . .1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
Quick reference data . . . . . . . . . . . . . . . . . . . . .1  
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2  
Ordering information. . . . . . . . . . . . . . . . . . . . . .2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2  
Thermal characteristics . . . . . . . . . . . . . . . . . . .5  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .11  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .12  
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .13  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
9.1  
9.2  
9.3  
9.4  
10  
Contact information. . . . . . . . . . . . . . . . . . . . . .13  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2009.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 6 October 2009  
Document identifier: BUJD103AD_2  

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