BUK9609-75A [NXP]
N-channel TrenchMOS logic level FET; N沟道的TrenchMOS逻辑电平FET
| 型号： | BUK9609-75A |
| 厂家： | 
NXP |
| 描述： | N-channel TrenchMOS logic level FET |
| 文件： | 总12页 (文件大小：200K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BUK9609-75A
N-channel TrenchMOS logic level FET
Rev. 03 — 22 September 2008
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
Low conduction losses due to low
Suitable for logic level gate drive
on-state resistance
sources
Q101 compliant
Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
12 V, 24 V and 42 V loads
Motors, lamps and solenoids
Automotive and general purpose
power switching
1.4 Quick reference data
Table 1.
Quick reference
Symbol Parameter
Conditions
drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C
Min
Typ
Max Unit
VDS
ID
-
-
-
-
75
75
V
A
drain current
VGS = 5 V; Tj = 25 °C; see
Figure 3; see Figure 1
Ptot
total power
dissipation
Tmb = 25 °C; see Figure 2
-
-
-
-
230
562
W
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
ID = 75 A; Vsup ≤ 75 V;
RGS = 50 Ω; VGS = 5 V;
Tj(init) = 25 °C; unclamped
mJ
avalanche energy
Static characteristics
RDSon
drain-source
on-state resistance
VGS = 4.5 V; ID = 25 A;
Tj = 25 °C
-
-
-
9.95 mΩ
mΩ
VGS = 5 V; ID = 25 A;
Tj = 25 °C; see Figure 12;
see Figure 15
7.6
9
BUK9609-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2.
Pinning information
Pin
1
Symbol Description
Simplified outline
Graphic symbol
G
D
S
D
gate
mb
D
2
drain
source
3
G
mb
mounting base; connected to
drain
mbb076
S
2
1
3
SOT404
(D2PAK)
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
BUK9609-75A
D2PAK
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one
lead cropped)
SOT404
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
Unit
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
Tj ≥ 25 °C; Tj ≤ 175 °C
RGS = 20 kΩ
-
75
V
VDGR
VGS
-
75
V
-10
-
10
V
ID
VGS = 5 V; Tj = 100 °C; see Figure 1
65
A
VGS = 5 V; Tj = 25 °C; see Figure 3; see Figure 1
Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3
-
75
A
IDM
Ptot
Tstg
Tj
peak drain current
-
440
230
175
175
15
A
total power dissipation Tmb = 25 °C; see Figure 2
storage temperature
-
W
°C
°C
V
-55
-55
-15
junction temperature
VGSM
peak gate-source
voltage
pulsed; tp ≤ 50 µs
Source-drain diode
IS
source current
peak source current
Tmb = 25 °C
-
-
75
A
A
ISM
tp ≤ 10 µs; pulsed; Tmb = 25 °C
440
Avalanche ruggedness
EDS(AL)S
non-repetitive
ID = 75 A; Vsup ≤ 75 V; RGS = 50 Ω; VGS = 5 V;
-
562
mJ
drain-source avalanche Tj(init) = 25 °C; unclamped
energy
BUK9609-75A_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 September 2008
2 of 12
BUK9609-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
03aa24
03na19
120
120
I
P
der
der
(%)
(%)
80
80
40
40
0
0
0
50
100
150
200
0
50
100
150
200
T
mb
(°C)
T
mb
(°C)
Fig 1. Normalized continuous drain current as a
function of mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
03nb44
1000
I
D
(A)
R
= V / I
DS
DSon
D
t
= 10 us
p
100
100 us
1 ms
D.C.
t
p
P
δ =
10
1
T
10 ms
100 ms
t
t
p
T
V
(V)
1
10
100
DS
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK9609-75A_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 September 2008
3 of 12
BUK9609-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
thermal resistance from see Figure 4
junction to mounting
base
-
-
0.65
K/W
Rth(j-a)
thermal resistance from minimum footprint; mounted on a
-
50
-
K/W
junction to ambient
printed-circuit board
03nb45
1
Z
th(j-mb)
(K/W)
δ = 0.05
0.2
0.1
0.01
0.1
0.05
0.02
t
p
T
P
δ =
Single Shot
t
t
p
T
0.001
-6
-5
-4
-3
-2
-1
10
10
10
10
10
10
1
t
(s)
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK9609-75A_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 September 2008
4 of 12
BUK9609-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C
75
70
1
-
-
V
V
V
-
-
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C; see
1.5
2
voltage
Figure 6
ID = 1 mA; VDS = VGS; Tj = 175 °C; see
Figure 6
0.5
-
-
-
-
V
V
ID = 1 mA; VDS = VGS; Tj = -55 °C; see
Figure 6
2.3
IDSS
drain leakage current
gate leakage current
VDS = 75 V; VGS = 0 V; Tj = 175 °C
VDS = 75 V; VGS = 0 V; Tj = 25 °C
VDS = 0 V; VGS = 10 V; Tj = 25 °C
VDS = 0 V; VGS = -10 V; Tj = 25 °C
VGS = 4.5 V; ID = 25 A; Tj = 25 °C
-
-
-
-
-
-
-
500
10
µA
µA
nA
0.05
IGSS
2
2
-
100
100
9.95
18.9
nA
RDSon
drain-source on-state
resistance
mΩ
mΩ
VGS = 5 V; ID = 25 A; Tj = 175 °C; see
Figure 12; see Figure 15
-
VGS = 10 V; ID = 25 A; Tj = 25 °C
-
-
7.23
7.6
8.5
9
mΩ
mΩ
VGS = 5 V; ID = 25 A; Tj = 25 °C; see
Figure 12; see Figure 15
Dynamic characteristics
Ciss
Coss
Crss
input capacitance
output capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C; see Figure 14
-
-
-
6631
905
8840
1090
840
pF
pF
pF
reverse transfer
capacitance
610
td(on)
tr
td(off)
tf
turn-on delay time
rise time
VDS = 30 V; RL = 1.2 Ω; VGS = 5 V;
RG(ext) = 10 Ω; Tj = 25 °C
-
-
-
-
-
47
-
-
-
-
-
ns
ns
ns
ns
nH
185
424
226
2.5
turn-off delay time
fall time
LD
internal drain
inductance
from upper edge of drain mounting base to
centre of die; Tj = 25 °C
from drain lead 6 mm from package to
centre of die; Tj = 25 °C
-
-
4.5
7.5
-
-
nH
nH
LS
internal source
inductance
from source lead to source bond pad;
Tj = 25 °C
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C; see
Figure 13
-
0.85
1.2
V
trr
reverse recovery time
recovered charge
IS = 20 A; dIS/dt = -100 A/µs; VGS = -10 V;
VDS = 30 V; Tj = 25 °C
-
-
70.3
213
-
-
ns
Qr
nC
BUK9609-75A_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 September 2008
5 of 12
BUK9609-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
03aa36
03aa33
10-1
ID
2.5
VGS(th)
(V)
(A)
10-2
2
1.5
1
max
10-3
typ
min
typ
max
10-4
10-5
10-6
min
0.5
0
0
1
2
3
-60
0
60
120
180
VGS (V)
T ( C)
°
j
Fig 5. Sub-threshold drain current as a function
of gate-source voltage
Fig 6. Gate-source threshold voltage as a
function of junction temperature
03nb41
03nb40
20
400
R
(mΩ)
I
DSon
D
(A)
10
8
7
6
5
18
16
14
12
10
8
350
300
250
200
150
100
50
V
(V) =
4
GS
3
6
2.2
4
0
2
3
4
5
6
7
V
8
(V)
0
2
4
6
8
10
(V)
V
DS
GS
Fig 7. Output characteristics: drain current as a
function of drain-source voltage; typical
values
Fig 8. Drain-source on-state resistance as a
function of gate-source voltage; typical
values
BUK9609-75A_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 September 2008
6 of 12
BUK9609-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
03nb38
03nb39
140
120
g
(S)
fs
I
D
(A)
100
120
100
80
60
40
20
0
80
60
40
20
0
T
= 175 O
C
j
T = 25 O
j
C
0.0
1.0
2.0
3.0
4.0
0
20
40
60
80
100
V
(V)
GS
I
(A)
D
Fig 10. Transfer characteristics: drain current as a
function of gate-source voltage; typical
values
Fig 9. Forward transconductance as a function of
drain current; typical values
03nb37
03nb42
5
V
20
3.4
GS
V
(V) = 3
3.2
4
R
GS
(V)
DSon
(mΩ)
4.5
V
= 14 V
DD
4
3.5
3
3.8
3.6
15
V
= 60 V
DD
2.5
2
10
5
1.5
1
6
0.5
0
0
50
100
150
0
50
100
150
200
250
300
D
350
(A)
Q
(nC)
G
I
Fig 11. Gate-source voltage as a function of gate
charge; typical values
Fig 12. Drain-source on-state resistance as a
function of drain current; typical values
BUK9609-75A_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 September 2008
7 of 12
BUK9609-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
03nb36
03nb43
120
16000
C (pF)
I
S
(A)
14000
12000
10000
8000
6000
4000
2000
0
100
80
60
OC
T = 175
j
Ciss
40
20
0
T = 25 OC
j
Coss
Crss
0.0
0.2
0.4
0.6
0.8
V
1.0
(V)
0.01
0.1
1
10
100
V
(V)
DS
SD
Fig 14. Input, output and reverse transfer
Fig 13. Reverse diode current as a function of
reverse diode voltage; typical values
capacitances as a function of drain-source
voltage; typical values
03nb25
2.4
a
1.6
0.8
0
−60
0
60
120
180
T (°C)
j
Fig 15. Normalized drain-source on-state resistance factor as a function of junction temperature
BUK9609-75A_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 September 2008
8 of 12
BUK9609-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
7. Package outline
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)
SOT404
A
A
E
1
mounting
base
D
1
D
H
D
2
L
p
1
3
c
b
e
e
Q
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
D
E
A
A
b
UNIT
c
D
e
L
H
Q
1
1
p
D
max.
4.50
4.10
1.40
1.27
0.85
0.60
0.64
0.46
1.60
1.20
10.30
9.70
2.90 15.80 2.60
2.10 14.80 2.20
mm
11
2.54
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
05-02-11
06-03-16
SOT404
Fig 16. Package outline SOT404 (D2PAK)
BUK9609-75A_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 September 2008
9 of 12
BUK9609-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
8. Revision history
Table 7.
Revision history
Document ID
BUK9509-75A_3
Modifications:
Release date
Data sheet status
Change notice
Supersedes
20080922
Product data sheet
-
BUK9509_9609_75A-02
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Type number BUK9609-75A separated from data sheet BUK9509_9609_75A-02.
BUK9509_9609_75A-02 20001106
Product data sheet
-
BUK9509_9609_75A-01
BUK9509_9609_75A-01 20001010
Product data sheet
-
-
BUK9609-75A_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 September 2008
10 of 12
BUK9609-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
9. Legal information
9.1 Data sheet status
Document status [1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
Applications — Applications that are described herein for any of these
9.2 Definitions
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
9.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
9.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
TrenchMOS — is a trademark of NXP B.V.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
BUK9609-75A_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 September 2008
11 of 12
BUK9609-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
11. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1
1.2
1.3
1.4
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits. . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
Ordering information. . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2
Thermal characteristics . . . . . . . . . . . . . . . . . . .4
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .10
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .11
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .11
9.1
9.2
9.3
9.4
10
Contact information. . . . . . . . . . . . . . . . . . . . . .11
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: Rev. 03 — 22 September 2008
Document identifier: BUK9609-75A_3
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