BUK9628-55A,118 [NXP]
N-channel TrenchMOS logic level FET D2PAK 3-Pin;
| 型号： | BUK9628-55A,118 |
| 厂家： | 
NXP |
| 描述： | N-channel TrenchMOS logic level FET D2PAK 3-Pin 开关 脉冲 晶体管 |
| 文件： | 总14页 (文件大小：201K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BUK9628-55A
AK
D2P
N-channel TrenchMOS logic level FET
Rev. 02 — 17 February 2011
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
AEC Q101 compliant
Suitable for logic level gate drive
sources
Low conduction losses due to low
on-state resistance
Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
12 V and 24 V loads
Motors, lamps and solenoids
Automotive and general purpose
power switching
1.4 Quick reference data
Table 1.
Quick reference data
Symbol Parameter
Conditions
drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C
Min Typ Max Unit
VDS
ID
-
-
-
-
55
42
V
A
drain current
VGS = 5 V; Tmb = 25 °C;
see Figure 1; see Figure 3
Ptot
total power
dissipation
Tmb = 25 °C; see Figure 2
-
-
99
W
Static characteristics
RDSon
drain-sourceon-state VGS = 10 V; ID = 15 A; Tj = 25 °C
-
-
-
22
-
25
30
28
mΩ
mΩ
mΩ
resistance
VGS = 4.5 V; ID = 15 A; Tj = 25 °C
VGS = 5 V; ID = 15 A; Tj = 25 °C;
see Figure 12; see Figure 13
24
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
ID = 34 A; Vsup ≤ 55 V;
RGS = 50 Ω; VGS = 5 V;
Tj(init) = 25 °C; unclamped
-
-
57.8 mJ
avalanche energy
BUK9628-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2.
Pinning information
Symbol Description
Pin
1
Simplified outline
Graphic symbol
G
D
S
D
gate
mb
D
2
drain
3
source
G
mb
mounting base; connected to drain
mbb076
S
2
1
3
SOT404 (D2PAK)
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
BUK9628-55A
D2PAK
plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404
(one lead cropped)
BUK9628-55A
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 17 February 2011
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NXP Semiconductors
N-channel TrenchMOS logic level FET
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
55
Unit
V
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
Tj ≥ 25 °C; Tj ≤ 175 °C
RGS = 20 kΩ
-
VDGR
VGS
-
55
V
-10
10
V
ID
Tmb = 100 °C; VGS = 5 V; see Figure 1
-
-
30
A
Tmb = 25 °C; VGS = 5 V; see Figure 1;
see Figure 3
42
A
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs;
-
168
A
see Figure 3
Ptot
Tstg
Tj
total power dissipation
storage temperature
junction temperature
peak gate-source voltage
Tmb = 25 °C; see Figure 2
-
99
W
°C
°C
V
-55
-55
-15
175
175
15
VGSM
pulsed; tp ≤ 50 µs
Source-drain diode
IS
source current
peak source current
Tmb = 25 °C
-
-
42
A
A
ISM
pulsed; tp ≤ 10 µs; Tmb = 25 °C
168
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy
ID = 34 A; Vsup ≤ 55 V; RGS = 50 Ω;
VGS = 5 V; Tj(init) = 25 °C; unclamped
-
57.8
mJ
03aa24
03na19
120
120
I
P
der
der
(%)
(%)
80
80
40
40
0
0
0
50
100
150
200
0
50
100
150
200
T
mb
(°C)
T
mb
(°C)
Fig 1. Normalized continuous drain current as a
function of mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
BUK9628-55A
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 17 February 2011
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BUK9628-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
03nc03
3
10
I
D
(A)
R
DSon
= V / I
DS D
2
10
t
p
= 10 μs
100 μs
t
p
P
δ =
10
T
1 ms
D.C.
10 ms
t
t
p
100 ms
T
1
2
1
10
10
V
DS
(V)
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK9628-55A
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 17 February 2011
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BUK9628-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
thermal resistance from junction to see Figure 4
mounting base
-
-
1.5
K/W
Rth(j-a)
thermal resistance from junction to mounted on printed-circuit board;
-
50
-
K/W
ambient
minimum footprint
03nc02
10
Z
th(j-mb)
(K/W)
1
δ = 0.5
0.2
0.1
t
p
P
δ =
−1
10
10
0.05
T
0.02
Single Shot
t
t
p
T
−2
10
−6
−5
−4
−3
−2
−1
10
10
10
10
10
1
t
(s)
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK9628-55A
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 17 February 2011
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NXP Semiconductors
N-channel TrenchMOS logic level FET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS drain-source breakdown
voltage
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C
55
50
0.5
-
-
-
-
-
-
V
V
V
VGS(th)
gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 11
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 11
1
-
1.5
-
2
V
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 11
2.3
IDSS
drain leakage current
gate leakage current
VDS = 55 V; VGS = 0 V; Tj = 25 °C
VDS = 55 V; VGS = 0 V; Tj = 175 °C
VGS = 10 V; VDS = 0 V; Tj = 25 °C
VGS = -10 V; VDS = 0 V; Tj = 25 °C
-
-
-
-
-
0.05
10
µA
µA
nA
nA
mΩ
-
500
100
100
56
IGSS
2
2
-
RDSon
drain-source on-state
resistance
VGS = 5 V; ID = 15 A; Tj = 175 °C;
see Figure 12; see Figure 13
VGS = 10 V; ID = 15 A; Tj = 25 °C
VGS = 4.5 V; ID = 15 A; Tj = 25 °C
-
-
-
22
-
25
30
28
mΩ
mΩ
mΩ
VGS = 5 V; ID = 15 A; Tj = 25 °C;
24
see Figure 12; see Figure 13
Dynamic characteristics
Ciss
Coss
Crss
td(on)
tr
input capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C; see Figure 14
-
-
-
-
-
-
-
-
1200 1725 pF
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
210
140
14
252
pF
pF
ns
ns
ns
ns
nH
195
VDS = 30 V; RL = 1.2 Ω; VGS = 5 V;
RG(ext) = 10 Ω; Tj = 25 °C
-
-
-
-
-
125
64
td(off)
tf
turn-off delay time
fall time
68
LD
internal drain inductance
from upper edge of drain mounting
base to centre of die ; Tj = 25 °C
2.5
from drain lead 6 mm from package to
centre of die ; Tj = 25 °C
-
-
4.5
7.5
-
-
nH
nH
LS
internal source inductance
from source lead to source bond pad ;
Tj = 25 °C
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C;
see Figure 15
-
0.85
1.2
V
trr
reverse recovery time
recovered charge
IS = 20 A; dIS/dt = -100 A/µs;
VGS = -10 V; VDS = 30 V; Tj = 25 °C
-
-
35
70
-
-
ns
Qr
nC
BUK9628-55A
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 17 February 2011
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NXP Semiconductors
N-channel TrenchMOS logic level FET
03na86
03na84
160
35
9
R
DSon
(mΩ)
V
GS
(V) = 10
I
D
(A)
8
7
30
120
6
25
20
15
10
5
80
40
0
4
3
2.2
10
(V)
0
2
4
6
8
2
4
6
8
10
V
DS
V
GS
(V)
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig 6. Drain-source on-state resistance as a function
of gate-source voltage; typical values
03aa36
03na85
10-1
ID
35
g
fs
(S)
(A)
30
25
20
15
10
5
10-2
10-3
min
typ
max
10-4
10-5
10-6
0
0
20
40
60
80
0
1
2
3
VGS (V)
I
D
(A)
Fig 7. Sub-threshold drain current as a function of
gate-source voltage
Fig 8. Forward transconductance as a function of
drain current; typical values
BUK9628-55A
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Product data sheet
Rev. 02 — 17 February 2011
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NXP Semiconductors
N-channel TrenchMOS logic level FET
03na81
03na83
100
6
5
4
3
2
1
0
V
(V)
I
GS
D
(A)
80
V
DD
= 14 V
60
T = 175 °C
V
DD
= 44 V
j
40
20
0
T = 25 °C
j
0
1
2
3
4
5
6
0
10
20
30
V
GS
(V)
Q (nC)
G
Fig 9. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Fig 10. Gate-source voltage as a function of turn-on
gate charge; typical values
03aa33
03na87
2.5
55
VGS(th)
(V)
4
3.6 3.8
R
(mΩ)
DSon
V
GS
(V) = 3
3.2 3.4
2
max
45
1.5
1
typ
35
25
15
min
5
0.5
0
0
10 20 30 40 50 60 70 80 90
(A)
-60
0
60
120
180
T ( C)
°
j
I
D
Fig 11. Gate-source threshold voltage as a function of
junction temperature
Fig 12. Drain-source on-state resistance as a function
of drain current; typical values
BUK9628-55A
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 17 February 2011
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NXP Semiconductors
N-channel TrenchMOS logic level FET
03aa28
03na88
2.4
a
3500
3000
2500
2000
1500
1000
500
C
(pF)
C
iss
1.8
1.2
0.6
0
C
C
oss
rss
0
10
−2
−1
2
10
1
10
10
−60
0
60
120
180
T (°C)
V
DS
(V)
j
Fig 13. Normalized drain-source on-state resistance
factor as a function of junction temperature
Fig 14. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
03na82
100
I
S
(A)
80
60
40
20
0
T = 175 °C
j
T = 25 °C
j
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
(V)
V
SD
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values
BUK9628-55A
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 17 February 2011
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NXP Semiconductors
N-channel TrenchMOS logic level FET
7. Package outline
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)
SOT404
A
A
E
1
mounting
base
D
1
D
H
D
2
L
p
1
3
c
b
e
e
Q
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
D
E
A
A
b
UNIT
c
D
e
L
H
Q
1
1
p
D
max.
4.50
4.10
1.40
1.27
0.85
0.60
0.64
0.46
1.60
1.20
10.30
9.70
2.90 15.80 2.60
2.10 14.80 2.20
mm
11
2.54
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
05-02-11
06-03-16
SOT404
Fig 16. Package outline SOT404 (D2PAK)
BUK9628-55A
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 17 February 2011
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N-channel TrenchMOS logic level FET
8. Revision history
Table 7.
Revision history
Document ID
BUK9628-55A v.2
Modifications:
Release date
Data sheet status
Change notice
Supersedes
20110217
Product data sheet
-
BUK9528_9628_55A v.1
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Type number BUK9628-55A separated from data sheet BUK9528_9628_55A v.1.
BUK9528_9628_55A v.1
20010118
Product specification
-
-
BUK9628-55A
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 17 February 2011
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NXP Semiconductors
N-channel TrenchMOS logic level FET
9. Legal information
9.1 Data sheet status
Document status [1] [2]
Product status [3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
Suitability for use in automotive applications — This NXP
9.2 Definitions
Semiconductors product has been qualified for use in automotive
applications. The product is not designed, authorized or warranted to be
suitable for use in medical, military, aircraft, space or life support equipment,
nor in applications where failure or malfunction of an NXP Semiconductors
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. NXP Semiconductors accepts no
liability for inclusion and/or use of NXP Semiconductors products in such
equipment or applications and therefore such inclusion and/or use is at the
customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
9.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
BUK9628-55A
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Product data sheet
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N-channel TrenchMOS logic level FET
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
9.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
BUK9628-55A
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 17 February 2011
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NXP Semiconductors
N-channel TrenchMOS logic level FET
11. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1
1.2
1.3
1.4
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits. . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
Ordering information. . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .5
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13
9.1
9.2
9.3
9.4
10
Contact information. . . . . . . . . . . . . . . . . . . . . .13
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 17 February 2011
Document identifier: BUK9628-55A
相关型号：
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