BUK98150-55/CU [NXP]
POWER, FET;型号: | BUK98150-55/CU |
厂家: | NXP |
描述: | POWER, FET 开关 脉冲 光电二极管 晶体管 |
文件: | 总11页 (文件大小:224K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
BUK98150-55
N-channel TrenchMOS logic level FET
19 March 2014
Product data sheet
1. General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
2. Features and benefits
AEC Q101 compliant
Electrostatically robust due to integrated protection diodes
Low conduction losses due to low on-state resistance
•
•
•
3. Applications
Automotive and general purpose power switching
•
4. Quick reference data
Table 1.
Symbol
Quick reference data
Parameter
Conditions
Min
Typ
Max
55
Unit
V
VDS
ID
drain-source voltage
drain current
Tj ≥ 25 °C; Tj ≤ 150 °C
Tsp = 25 °C
-
-
-
-
-
-
5.5
8.3
A
Ptot
total power dissipation Tsp = 25 °C; Fig. 4
W
Static characteristics
RDSon drain-source on-state
resistance
Avalanche ruggedness
EDS(AL)S non-repetitive drain-
VGS = 5 V; ID = 5 A; Tj = 25 °C
-
-
120
-
150
15
mΩ
mJ
ID = 1.9 A; Vsup ≤ 25 V; RGS = 50 Ω;
VGS = 5 V; Tj(init) = 25 °C; unclamped
source avalanche
energy
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NXP Semiconductors
BUK98150-55
N-channel TrenchMOS logic level FET
5. Pinning information
Table 2.
Pin
Pinning information
Symbol Description
Simplified outline
Graphic symbol
4
D
1
2
3
4
G
D
S
D
gate
drain
source
drain
G
1
2
3
SC-73 (SOT223)
S
sym116
6. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
BUK98150-55
SC-73
plastic surface-mounted package with increased heatsink; 4
leads
SOT223
BUK98150-55/CU
SC-73
plastic surface-mounted package with increased heatsink; 4
leads
SOT223
7. Marking
Table 4.
Marking codes
Type number
Marking code
BUK98150-55
BUK98150-55/CU
915055
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
55
Unit
drain-source voltage
drain-gate voltage
gate-source voltage
total power dissipation
drain current
Tj ≥ 25 °C; Tj ≤ 150 °C
RGS = 20 kΩ
-
V
V
V
W
A
A
VDGR
VGS
-
55
-10
10
Ptot
Tsp = 25 °C; Fig. 4
Tsp = 25 °C
-
-
-
8.3
5.5
3.5
ID
Tsp = 100 °C
BUK98150-55
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© NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet
19 March 2014
2 / 11
NXP Semiconductors
BUK98150-55
N-channel TrenchMOS logic level FET
Symbol
IDM
Parameter
Conditions
Min
-
Max
30
Unit
A
peak drain current
storage temperature
junction temperature
Tsp = 25 °C; pulsed
Tstg
-55
-55
150
150
°C
°C
Tj
Source-drain diode
IS
source current
peak source current
Tsp = 25 °C
-
-
5.5
30
A
A
ISM
pulsed; Tsp = 25 °C
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy
ID = 1.9 A; Vsup ≤ 25 V; RGS = 50 Ω;
VGS = 5 V; Tj(init) = 25 °C; unclamped
-
-
15
mJ
kV
Electrostatic discharge
Vesd
electrostatic discharge voltage HBM; C = 100 pF; R = 1.5 kΩ
2
003aaf206
003aaf207
2
100
10
I
D
R
DS(on)
= V / I
DS
I
D
(%)
80
DM
(A)
t
= 1 µs
p
10
60
40
20
0
10 µs
100 µs
D.C.
1
1 ms
10 ms
100 ms
- 1
10
2
0
40
80
120
160
1
10
10
T
(°C)
V
(V)
DS
mb
VGS ≥ 5 V
Fig. 2. Safe operating area; continuous and peak drain
currents as a function of drain-source voltage
Fig. 1. Normalized continuous drain current as a
function of mounting base temperature
BUK98150-55
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Product data sheet
19 March 2014
3 / 11
NXP Semiconductors
BUK98150-55
N-channel TrenchMOS logic level FET
003aaf219
003aaf205
100
WDSS
(%)
100
P
der
(%)
80
80
60
40
20
0
60
40
20
0
20
40
60
80
100
120
140
T
160
(°C)
0
40
80
120
160
T
(°C)
(mb)
mb
ID = 1.9 A
Fig. 4. Normalized total power dissipation as a
function of mounting base temperature
Fig. 3. Normalised drain-source non-repetitive
avalanche energy rating; avalanche energy as a
function of mounting base temperature
9. Thermal characteristics
Table 6.
Symbol
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-sp)
thermal resistance
from junction to solder
point
mounted on any printed-circuit board
-
12
15
K/W
Rth(j-a)
thermal resistance
from junction to
ambient
mounted on a printed-circuit board
-
120
-
K/W
003aaf208
2
10
Z
th(j-sp)
(K/W)
δ = 0.5
0.2
10
0.1
0.05
0.02
t
1
p
P
δ =
T
- 1
10
0
t
t
p
T
- 2
10
- 6
- 5
- 4
- 3
- 2
- 1
10
10
10
10
10
10
1
10
(s)
t
p
Fig. 5. Transient thermal impedance from junction to solder point as a function of pulse duration
BUK98150-55
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© NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet
19 March 2014
4 / 11
NXP Semiconductors
BUK98150-55
N-channel TrenchMOS logic level FET
10. Characteristics
Table 7.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS drain-source
breakdown voltage
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C
55
50
1
-
-
V
-
-
V
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C
1.5
2
V
voltage
ID = 1 mA; VDS = VGS; Tj = -55 °C
-
-
2.3
-
V
ID = 1 mA; VDS = VGS; Tj = 150 °C
0.6
-
-
V
IDSS
drain leakage current
gate leakage current
VDS = 55 V; VGS = 0 V; Tj = 25 °C
VDS = 55 V; VGS = 0 V; Tj = 150 °C
VGS = 5 V; VDS = 0 V; Tj = 25 °C
VGS = -5 V; VDS = 0 V; Tj = 25 °C
VGS = 5 V; VDS = 0 V; Tj = 150 °C
VGS = -5 V; VDS = 0 V; Tj = 150 °C
VGS = 5 V; ID = 5 A; Tj = 150 °C
VGS = 5 V; ID = 5 A; Tj = 25 °C
VDS = 0 V; Tj = 25 °C; IG = 1 mA
VDS = 0 V; Tj = 25 °C; IG = -1 mA
0.05
10
100
1
µA
µA
µA
µA
µA
µA
mΩ
mΩ
V
-
-
IGSS
-
0.02
-
0.02
1
-
-
5
-
-
5
RDSon
drain-source on-state
resistance
-
-
277
150
-
-
120
V(BR)GSS
gate-source
10
10
-
-
breakdown voltage
-
V
Dynamic characteristics
Ciss
Coss
Crss
input capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C
-
-
-
250
65
330
80
pF
pF
pF
output capacitance
reverse transfer
capacitance
35
50
td(on)
tr
td(off)
tf
turn-on delay time
rise time
VDS = 30 V; RL = 6 Ω; VGS = 5 V;
RG(ext) = 10 Ω; Tj = 25 °C; ID = 5 A
-
11
38
25
20
5
17
60
38
38
-
ns
ns
ns
ns
S
-
turn-off delay time
fall time
-
-
gfs
transfer conductance
VDS = 25 V; ID = 5 A; Tj = 25 °C
3
Source-drain diode
VSD source-drain voltage
trr
IS = 2 A; VGS = 0 V; Tj = 25 °C
-
-
-
0.85
43
1.1
V
reverse recovery time IS = 2 A; dIS/dt = -100 A/µs;
-
-
ns
µC
VGS = -10 V; VDS = 30 V; Tj = 25 °C
recovered charge
Qr
0.16
BUK98150-55
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Product data sheet
19 March 2014
5 / 11
NXP Semiconductors
BUK98150-55
N-channel TrenchMOS logic level FET
003aaf209
003aaf210
10
400
10
5
4
3.8
V
(V) = 3.0
I
GS
D
V
(V) = 3.6
GS
R
(A)
DS(on)
(mΩ)
8
6
4
2
0
3.4
3.2
3.0
300
3.2
3.4
200
100
3.6
2.8
2.6
2.4
2.2
6
4.0
5.0
0
2
4
8
10
1
3
5
7
9
11
V
(V)
I (A)
D
DS
Tj = 25 °C
Tj = 25 °C
Fig. 6. Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig. 7. Drain-source on-state resistance as a function
of drain current; typical values
003aaf211
003aaf212
10
7
I
g
fs
(S)
D
(A)
8
6
4
2
0
6
5
4
3
2
T = 150 °C
T = 25 °C
j
j
0
1
2
3
4
5
0
2
4
6
8
10
V
(V)
I (A)
D
GS
VDS > ID x RDSon
VDS > ID x RDSon
Fig. 8. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Fig. 9. Forward transconductance as a function of
drain current; typical values
003aaf213
003aaf214
2.5
2.5
V
GS(th)
(V)
a
maximum
2.0
2.0
1.5
1.0
0.5
typical
1.5
1.0
0.5
minimum
- 100
0
100
200
- 100
0
100
200
T
(°C)
T (°C)
j
mb
ID = 5 A; VGS = 5 V
ID = 1 mA; VDS = VGS
Fig. 10. Normalized drain-source on-state resistance
factor as a function of junction temperature
Fig. 11. Gate-source threshold voltage as a function of
junction temperature
BUK98150-55
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Product data sheet
19 March 2014
6 / 11
NXP Semiconductors
BUK98150-55
N-channel TrenchMOS logic level FET
003aaf215
003aaf216
- 1
10
D
600
I
(A)
10
C
(pF)
C
iss
- 2
- 3
- 4
- 5
- 6
C
oss
400
2 %
typical
98 %
10
10
10
10
C
rss
200
0
- 2
- 1
2
0.5
1.0
1.5
2.0
2.5
10
10
1
10
10
V
(V)
V
(V)
DS
GS
Tj = 25 °C; VDS = VGS
VGS = 0 V; f = 1 MHz
Fig. 12. Sub-threshold drain current as a function of
gate-source voltage
Fig. 13. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
003aaf217
003aaf218
6
10
I
F
V
(A)
GS
8
6
4
2
0
(V)
V
= 14 V
DS
4
2
0
V
= 44 V
DS
T = 150 °C
T = 25 °C
j
j
0
1
2
3
4
5
0
0.4
0.8
1.2
Q
G
(nC)
V
(V)
SDS
Tj = 25 °C; ID = 5 A
VGS = 0 V
Fig. 14. Gate-source voltage as a function of gate
charge; typical values
Fig. 15. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values
BUK98150-55
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Product data sheet
19 March 2014
7 / 11
NXP Semiconductors
BUK98150-55
N-channel TrenchMOS logic level FET
11. Package outline
Plastic surface-mounted package with increased heatsink; 4 leads
SOT223
D
E
B
A
X
c
y
H
v
M
A
E
b
1
4
Q
A
A
1
L
1
2
3
p
e
b
p
w
M
B
detail X
1
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
A
b
p
b
c
D
E
e
e
H
L
p
Q
v
w
y
1
1
1
E
1.8
1.5
0.10 0.80
0.01 0.60
3.1
2.9
0.32
0.22
6.7
6.3
3.7
3.3
7.3
6.7
1.1
0.7
0.95
0.85
mm
4.6
2.3
0.2
0.1
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
04-11-10
06-03-16
SOT223
SC-73
Fig. 16. Package outline SC-73 (SOT223)
BUK98150-55
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© NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet
19 March 2014
8 / 11
NXP Semiconductors
BUK98150-55
N-channel TrenchMOS logic level FET
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation -
lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
12. Legal information
12.1 Data sheet status
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Document
Product
Definition
status [1][2] status [3]
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Right to make changes — NXP Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Preliminary
[short] data
sheet
Qualification This document contains data from the
preliminary specification.
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Product
[short] data
sheet
Production
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nxp.com.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
12.2 Definitions
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
Customers are responsible for the design and operation of their
applications and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the NXP Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local NXP
Semiconductors sales office. In case of any inconsistency or conflict with the
short data sheet, the full data sheet shall prevail.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default
in the customer’s applications or products, or the application or use by
customer’s third party customer(s). Customer is responsible for doing all
necessary testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications
and the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product
is deemed to offer functions and qualities beyond those described in the
Product data sheet.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
12.3 Disclaimers
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, NXP Semiconductors does not give
any representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
BUK98150-55
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Product data sheet
19 March 2014
9 / 11
NXP Semiconductors
BUK98150-55
N-channel TrenchMOS logic level FET
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
12.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-
CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight,
MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug,
TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP
Semiconductors N.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
BUK98150-55
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© NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet
19 March 2014
10 / 11
NXP Semiconductors
BUK98150-55
N-channel TrenchMOS logic level FET
13. Contents
1
General description ............................................... 1
Features and benefits ............................................1
Applications ........................................................... 1
Quick reference data ............................................. 1
Pinning information ...............................................2
Ordering information .............................................2
Marking ...................................................................2
Limiting values .......................................................2
Thermal characteristics .........................................4
Characteristics .......................................................5
Package outline ..................................................... 8
2
3
4
5
6
7
8
9
10
11
12
Legal information ...................................................9
Data sheet status ................................................. 9
Definitions .............................................................9
Disclaimers ...........................................................9
Trademarks ........................................................ 10
12.1
12.2
12.3
12.4
© NXP Semiconductors N.V. 2014. All rights reserved
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 19 March 2014
BUK98150-55
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet
19 March 2014
11 / 11
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