BUK98150-55A_技术文档

BUK98150-55A

TrenchMOS™ logic level FET

Rev. 02 — 25 March 2002

Product data

M3D087

1. Description

N-channel enhancement mode ﬁeld-effect power transistor in a plastic package using

TrenchMOS™¹technology, featuring very low on-state resistance.

Product availability:

BUK98150-55A in SOT223 (SC-73).

2. Features

■ TrenchMOS™ technology

■ Q101 compliant

■ 150 °C rated

■ Logic level compatible.

3. Applications

■ Automotive and general purpose power switching:

◆ 12 V and 24 V loads

◆ Motors, lamps and solenoids.

4. Pinning information

Table 1: Pinning - SOT223 (SC-73), simpliﬁed outline and symbol

1

Description

gate (g)

Simpliﬁed outline

Symbol

4

d

s

2

drain (d)

3

source (s)

drain (d)

g

4

MBB076

1

2

3

MSB002 - 1

Top view

SOT223 (SC-73)

1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.

BUK98150-55A

TrenchMOS™ logic level FET

Philips Semiconductors

5. Quick reference data

Table 2: Quick reference data

Symbol Parameter

Conditions

Typ

Max

55

Unit

V

V_DS

I_D

drain-source voltage (DC)

drain current (DC)

-

T_sp= 25 °C; V_GS= 5 V

T_sp= 25 °C

-

5

A

P_tot

T_j

total power dissipation

junction temperature

-

8

W

-

150

161

137

°C

R_DSon

drain-source on-state resistance

V_GS= 5 V; I_D= 5 A

V_GS= 4.5 V; I_D= 5 A

V_GS= 10 V; I_D= 5 A

128

-

mΩ

116

6. Limiting values

Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter

Conditions

Min

Max

55

±15

5

Unit

V

V_DS

V_DGR

V_GS

I_D

drain-source voltage (DC)

-

drain-gate voltage (DC)

gate-source voltage (DC)

drain current (DC)

R_GS= 20 kΩ

V

T_sp= 25 °C; V_GS= 5 V; Figure 2 and 3

T_sp= 100 °C; V_GS= 5 V; Figure 2

A

3

A

I_DM

peak drain current

T_sp= 25 °C; pulsed; t_p≤ 10 µs;

22

A

Figure 3

P_tot

T_stg

T_j

total power dissipation

storage temperature

T_sp= 25 °C; Figure 1

-

8

W

−55

+150

°C

operating junction temperature

Source-drain diode

I_DR

reverse drain current (DC)

peak reverse drain current

T_sp= 25 °C

-

5

A

I_DRM

T_sp= 25 °C; pulsed; t_p≤ 10 µs

22

Avalanche ruggedness

E_DS(AL)Snon-repetitive avalanche energy

unclamped inductive load; I_D= 5 A;

-

31

mJ

V_DS≤ 55 V; V_GS= 5 V; R_GS= 50 Ω;

starting T_j= 25 °C

9397 750 09435

Product data

Rev. 02 — 25 March 2002

2 of 12

BUK98150-55A

TrenchMOS™ logic level FET

Philips Semiconductors

03aa17

03nh98

120

5

I

D

(A)

P

der

(%)

4

80

3

2

1

0

40

0

25

50

75

100

125

T

150

(ºC)

0

50

100

150

200

T

(ºC)

sp

V_GS≥ 4.5 V

P_tot

P_der

=

× 100%

----------------------

P

°

tot(25 C)

Fig 1. Normalized total power dissipation as a

function of solder point temperature.

Fig 2. Continuous drain current as a function of

solder point temperature.

03na29

2

10

I

D

(A)

Limit R

= V /I

DS D

DSon

t

= 10 µs

p

10

100 µs

1 ms

1

DC

10 ms

100 ms

-1

10

2

10

1

10

V

(V)

DS

T_sp= 25 °C; I_DMis single pulse.

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

9397 750 09435

Product data

Rev. 02 — 25 March 2002

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BUK98150-55A

TrenchMOS™ logic level FET

Philips Semiconductors

7. Thermal characteristics

Table 4: Thermal characteristics

Symbol

Parameter

Conditions

Min Typ Max Unit

R_th(j-sp)

thermal resistance from junction to solder

point

Figure 4

-

15

K/W

R_th(j-a)

thermal resistance from junction to ambient

-

70

-

K/W

7.1 Transient thermal impedance

03na30

2

10

Z

th(j-sp)

(K/W)

10

δ = 0.5

0.2

0.1

1

0.05

0.02

t

p

P

δ =

-1

10

T

single shot

t

p

T

-2

10

-6

10

-5

10

-4

10

-3

10

-2

10

-1

10

1

t

(s)

p

Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.

9397 750 09435

Product data

Rev. 02 — 25 March 2002

4 of 12

BUK98150-55A

TrenchMOS™ logic level FET

Philips Semiconductors

8. Characteristics

Table 5: Characteristics

T_j= 25 °C unless otherwise speciﬁed

Symbol

Static characteristics

V_(BR)DSSdrain-source breakdown

voltage

Parameter

Conditions

Min

Typ

Max

Unit

I_D= 0.25 mA; V_GS= 0 V

T_j= 25 °C

55

50

-

V

T_j= −55 °C

V_GS(th)

gate-source threshold voltage I_D= 1 mA; V_DS= V_GS

Figure 9

T_j= 25 °C

;

1

1.5

2

V

T_j= 150 °C

T_j= −55 °C

0.6

-

2.3

I_DSS

drain-source leakage current V_DS= 55 V; V_GS= 0 V

T_j= 25 °C

T_j= 150 °C

-

0.05

10

µA

nA

-

500

100

I_GSS

gate-source leakage current V_GS= ±10 V; V_DS= 0 V

2

R_DSon

drain-source on-state

resistance

V_GS= 5 V; I_D= 5 A;

Figure 7 and 8

T_j= 25 °C

-

128

150

276

161

137

mΩ

T_j= 150 °C

-

V_GS= 4.5 V; I_D= 5 A;

V_GS= 10 V; I_D= 5 A;

-

116

Dynamic characteristics

Q_g(tot)

Q_gs

Q_gd

C_iss

C_oss

C_rss

t_d(on)

t_r

total gate charge

gate-to-source charge

gate-to-drain (Miller) charge

input capacitance

output capacitance

reverse transfer capacitance

turn-on delay time

rise time

V_GS= 5 V; V_DD= 44 V;

I_D= 5 A; Figure 14

-

5.3

1.0

2.8

240

40

25

8

-

nC

pF

ns

-

V_GS= 0 V; V_DS= 25 V;

f = 1 MHz; Figure 12

320

48

34

-

V_DD= 20 V; R_L= 3.3 Ω;

V_GS= 5 V; R_G= 10 Ω;

57

16

13

-

t_d(off)

t_f

turn-off delay time

fall time

-

9397 750 09435

Product data

Rev. 02 — 25 March 2002

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BUK98150-55A

TrenchMOS™ logic level FET

Philips Semiconductors

Table 5: Characteristics…continued

T_j= 25 °C unless otherwise speciﬁed

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Source-drain diode

V_SD

source-drain (diode forward) I_S= 5 A; V_GS= 0 V;

-

0.85

1.2

V

voltage

Figure 15

t_rr

reverse recovery time

recovered charge

I_S= 5 A; dI_S/dt = −100 A/µs

V_GS= −10 V; V_DS= 30 V

-

24

30

-

ns

Q_r

nC

03na24

03na26

140

25

10

8

I

D

(A)

R

DSon

(mΩ)

V

= 6 V

20

GS

120

100

80

5

15

10

5

4

3

2.2

0

2

4

6

8

10

(V)

0

5

10

15

V

(V)

V

GS

DS

T_j= 25 °C; t_p= 300 µs

T_j= 25 °C; I_D= 5 A

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values.

Fig 6. Drain-source on-state resistance as a function

of gate-source voltage; typical values.

03na27

2.4

a

320

V

= 3 V

GS

R

3.2

3.4

DSon

(mΩ)

3.6

1.8

240

160

80

3.8

1.2

0.6

0

4

5

10

2

6

10

14

-60

0

60

120

180

I

(A)

T (^oC)

D

j

T_j= 25 °C

R_DSon

a =

---------------------------

R_{DSon(25 C)}

°

Fig 7. Drain-source on-state resistance as a function

of drain current; typical values.

Fig 8. Normalized drain-source on-state resistance

factor as a function of junction temperature.

9397 750 09435

Product data

Rev. 02 — 25 March 2002

6 of 12

BUK98150-55A

TrenchMOS™ logic level FET

Philips Semiconductors

03aa33

03aa36

-1

-2

-3

-4

-5

-6

2.5

10

I

D

V

GS(th)

(V)

(A)

10

max

2

typ

min

typ

max

1.5

1

10

min

0.5

0

-60

0

60

120

180

0

1

2

3

T ( C)

V

(V)

GS

j

I_D= 1 mA; V_DS= V_GS

T_j= 25 °C; V_DS= V_GS

Fig 9. Gate-source threshold voltage as a function of

junction temperature.

Fig 10. Sub-threshold drain current as a function of

gate-source voltage.

03na25

03na28

6

600

C

iss

g

(S)

C

(pF)

fs

C

oss

4

400

rss

2

0

200

0

-2

10

-1

10

2

10

0

2

4

6

8

10

1

10

V

(V)

I

(A)

DS

D

T_j= 25 °C; V_DS= 25 V

V_GS= 0 V; f = 1 MHz

Fig 11. Forward transconductance as a function of

drain current; typical values.

Fig 12. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical

values.

9397 750 09435

Product data

Rev. 02 — 25 March 2002

7 of 12

BUK98150-55A

TrenchMOS™ logic level FET

Philips Semiconductors

03na21

03na23

6

5

V

(V)

GS

I

D

(A)

V

= 14 V

4

3

2

1

0

DD

V

= 44 V

DD

4

T = 150 ºC

j

2

0

T = 25 ºC

j

0

1

2

3

4

0

2

4

6

Q (nC)

G

V

(V)

GS

V_DS= 25 V

T_j= 25 °C; I_D= 5 A

Fig 13. Transfer characteristics: drain current as a

function of gate-source voltage; typical values.

Fig 14. Gate-source voltage as a function of turn-on

gate charge; typical values.

03na22

20

I

S

(A)

15

10

T = 150 ºC

5

0

j

T = 25 ºC

j

0.0

0.4

0.8

1.2

1.6

V

(V)

SD

V_GS= 0 V

Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.

9397 750 09435

Product data

Rev. 02 — 25 March 2002

8 of 12

BUK98150-55A

TrenchMOS™ logic level FET

Philips Semiconductors

9. Package outline

Plastic surface mounted package; collector pad for good heat transfer; 4 leads

SOT223

D

B

E

A

X

c

y

H

v

M

A

E

b

1

4

Q

A

1

L

1

2

3

p

e

b

p

w

M

B

detail X

1

e

0

2

4 mm

scale

DIMENSIONS (mm are the original dimensions)

A

UNIT

A

b

c

D

E

e

H

L

p

Q

v

w

y

p

1

E

1.8

1.5

0.10 0.80

0.01 0.60

3.1

2.9

0.32

0.22

6.7

6.3

3.7

3.3

7.3

6.7

1.1

0.7

0.95

0.85

mm

4.6

2.3

0.2

0.1

REFERENCES

JEDEC

EUROPEAN

PROJECTION

OUTLINE

VERSION

ISSUE DATE

IEC

EIAJ

SC-73

97-02-28

99-09-13

SOT223

Fig 16. SOT223 (SC-73).

9397 750 09435

Product data

Rev. 02 — 25 March 2002

9 of 12

BUK98150-55A

TrenchMOS™ logic level FET

Philips Semiconductors

10. Soldering

7.00

3.85

3.60

3.50

0.30

solder lands

solder resist

occupied area

solder paste

1.20

(4x)

4

7.40

4.80

3.90

7.65

1

2

3

MSA443

1.20 (3x)

1.30 (3x)

5.90

6.15

Dimensions in mm.

Fig 17. Reﬂow soldering footprint for SOT223 (SC-73).

11. Revision history

Table 6: Revision history

Rev Date

CPCN

-

Description

02 20020325

Product data; second version, supersedes Rev 01 of 20001003. Modiﬁcations:

Gate-source voltage maximum increased from 10 to 15 V in limiting values table.

•

R

_th(j-sp)maximum decreased from 20 K/W to 15 K/W in thermal characteristics table.

•

Switching speed measurements updated in characteristics table.

Total power dissipation, peak drain current, peak reverse drain current, and non-repetitive

avalanche energy ﬁgures updated in quick reference data and limiting values.

01 20001003

-

Product speciﬁcation; initial version.

9397 750 09435

Product data

Rev. 02 — 25 March 2002

10 of 12

BUK98150-55A

TrenchMOS™ logic level FET

Philips Semiconductors

12. Data sheet status

[1]

[2]

Data sheet status

Product status

Deﬁnition

Objective data

Development

This data sheet contains data from the objective speciﬁcation for product development. Philips Semiconductors

reserves the right to change the speciﬁcation in any manner without notice.

Preliminary data

Product data

Qualiﬁcation

Production

This data sheet contains data from the preliminary speciﬁcation. Supplementary data will be published at a

later date. Philips Semiconductors reserves the right to change the speciﬁcation without notice, in order to

improve the design and supply the best possible product.

This data sheet contains data from the product speciﬁcation. Philips Semiconductors reserves the right to

make changes at any time in order to improve the design, manufacturing and supply. Changes will be

communicated according to the Customer Product/Process Change Notiﬁcation (CPCN) procedure

SNW-SQ-650A.

[1]

[2]

Please consult the most recently issued data sheet before initiating or completing a design.

The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at

URL http://www.semiconductors.philips.com.

13. Deﬁnitions

14. Disclaimers

Short-form speciﬁcation — The data in

extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.

a

short-form speciﬁcation is

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips Semiconductors

customers using or selling these products for use in such applications do so

at their own risk and agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Limiting values deﬁnition — Limiting values given are in accordance with

the Absolute Maximum Rating System (IEC 60134). Stress above one or

more of the limiting values may cause permanent damage to the device.

These are stress ratings only and operation of the device at these or at any

other conditions above those given in the Characteristics sections of the

speciﬁcation is not implied. Exposure to limiting values for extended periods

may affect device reliability.

Right to make changes — Philips Semiconductors reserves the right to

make changes, without notice, in the products, including circuits, standard

cells, and/or software, described or contained herein in order to improve

design and/or performance. Philips Semiconductors assumes no

responsibility or liability for the use of any of these products, conveys no

licence or title under any patent, copyright, or mask work right to these

products, and makes no representations or warranties that these products are

free from patent, copyright, or mask work right infringement, unless otherwise

speciﬁed.

Application information — Applications that are described herein for any

of these products are for illustrative purposes only. Philips Semiconductors

make no representation or warranty that such applications will be suitable for

the speciﬁed use without further testing or modiﬁcation.

Contact information

For additional information, please visit http://www.semiconductors.philips.com.

For sales ofﬁce addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.

Fax: +31 40 27 24825

11 of 12

9397 750 09435

Product data

Rev. 02 — 25 March 2002

BUK98150-55A

TrenchMOS™ logic level FET

Philips Semiconductors

Contents

1

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Pinning information. . . . . . . . . . . . . . . . . . . . . . 1

Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2

Thermal characteristics. . . . . . . . . . . . . . . . . . . 4

Transient thermal impedance . . . . . . . . . . . . . . 4

Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5

Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9

Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10

Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11

Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2

3

4

5

6

7

7.1

8

9

10

11

12

13

14

Printed in The Netherlands

All rights are reserved. Reproduction in whole or in part is prohibited without the prior

written consent of the copyright owner.

The information presented in this document does not form part of any quotation or

contract, is believed to be accurate and reliable and may be changed without notice. No

liability will be accepted by the publisher for any consequence of its use. Publication

thereof does not convey nor imply any license under patent- or other industrial or

intellectual property rights.

Date of release: 25 March 2002

Document order number: 9397 750 09435


型号：	BUK98150-55A
厂家：	NXP
描述：	TrenchMOS logic level FET 的TrenchMOS逻辑电平FET 晶体晶体管开关脉冲光电二极管
文件：	总12页 (文件大小：273K)
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