BUK9E3R2-40B,127 [NXP]

N-channel TrenchMOS logic level FET TO-262 3-Pin;


型号：	BUK9E3R2-40B,127
厂家：	NXP
描述：	N-channel TrenchMOS logic level FET TO-262 3-Pin 开关脉冲晶体管
文件：	总13页 (文件大小：249K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BUK9E3R2-40B

N-channel TrenchMOS logic level FET

13 March 2014

Product data sheet

1. General description

Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic

package using TrenchMOS technology. This product has been designed and qualified to

the appropriate AEC standard for use in automotive critical applications.

2. Features and benefits

AEC Q101 compliant

Low conduction losses due to low on-state resistance

Suitable for logic level gate drive sources

•

Suitable for thermally demanding environments due to 175 °C rating

3. Applications

12 V loads

Automotive systems

General purpose power switching

Motors, lamps and solenoids

•

4. Quick reference data

Table 1.

Symbol

Quick reference data

Parameter

Conditions

Min

Typ

Max

Unit

V_DS

I_D

drain-source voltage

drain current

T_j≥ 25 °C; T_j≤ 175 °C

V_GS= 5 V; T_mb= 25 °C; Fig. 3; Fig. 2

[1]

100

300

P_tot

total power dissipation T_mb= 25 °C; Fig. 1

Static characteristics

R_DSondrain-source on-state

resistance

V_GS= 10 V; I_D= 25 A; T_j= 25 °C

2.4

2.7

2.8

3.2

mΩ

V_GS= 5 V; I_D= 25 A; T_j= 25 °C;

Fig. 11; Fig. 12

Dynamic characteristics

Q_GDgate-drain charge

V_GS= 5 V; I_D= 25 A; V_DS= 32 V;

T_j= 25 °C; Fig. 13

Scan or click this QR code to view the latest information for this product

NXP Semiconductors

BUK9E3R2-40B

N-channel TrenchMOS logic level FET

Symbol

Avalanche ruugedness

E_DS(AL)Snon-repetitive drain-

Parameter

Conditions

Min

Typ

Max

Unit

I_D= 100 A; V_sup≤ 40 V; R_GS= 50 Ω;

V_GS= 5 V; T_j(init)= 25 °C; unclamped

1.2

source avalanche

energy

[1] All individual parts of device must be ≤ 175 °C to achieve maximum current rating.

5. Pinning information

Table 2.

Pinning information

Symbol Description

Simplified outline

Graphic symbol

gate

drain

source

mbb076

mounting base; connected to

drain

2 3

I2PAK (SOT226)

6. Ordering information

Table 3.

Ordering information

Type number

Package

Name

Description

Version

BUK9E3R2-40B

I2PAK

plastic single-ended package (I2PAK); TO-262

SOT226

7. Marking

Table 4.

Marking codes

Type number

Marking code

BUK9E3R2-40B

8. Limiting values

Table 5.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

V_DS

Parameter

Conditions

Min

Max

Unit

drain-source voltage

drain-gate voltage

T_j≥ 25 °C; T_j≤ 175 °C

R_GS= 20 kΩ

V_DGR

BUK9E3R2-40B

All information provided in this document is subject to legal disclaimers.

Product data sheet

13 March 2014

2 / 13

NXP Semiconductors

BUK9E3R2-40B

N-channel TrenchMOS logic level FET

Symbol

V_GS

P_tot

Parameter

Conditions

Min

Max

Unit

gate-source voltage

total power dissipation

drain current

-15

T_mb= 25 °C; Fig. 1

300

222

100

888

175

I_D

T_mb= 25 °C; V_GS= 5 V; Fig. 2; Fig. 3

T_mb= 100 °C; V_GS= 5 V; Fig. 2

T_mb= 25 °C; V_GS= 5 V; Fig. 3; Fig. 2

T_mb= 25 °C; pulsed; t_p≤ 10 µs; Fig. 3

[1]

[2]

I_DM

T_stg

T_j

peak drain current

storage temperature

junction temperature

-55

°C

Source-drain diode

I_S

source current

T_mb= 25 °C

[1]

[2]

222

100

888

I_SM

peak source current

pulsed; t_p≤ 10 µs; T_mb= 25 °C

Avalanche ruugedness

E_DS(AL)Snon-repetitive drain-source

avalanche energy

I_D= 100 A; V_sup≤ 40 V; R_GS= 50 Ω;

V_GS= 5 V; T_j(init)= 25 °C; unclamped

1.2

[1] Current is limited by power dissipation chip rating.

[2] All individual parts of device must be ≤ 175 °C to achieve maximum current rating.

03na19

03nh38

120

250

(A)

der

(%)

200

150

100

Capped at 100 A due to package

100

150

200

100

150

200

(°C)

Fig. 1. Normalized total power dissipation as a

function of mounting base temperature

Fig. 2. Continuous drain current as a function of

mounting base temperature

BUK9E3R2-40B

All information provided in this document is subject to legal disclaimers.

Product data sheet

13 March 2014

3 / 13

NXP Semiconductors

BUK9E3R2-40B

N-channel TrenchMOS logic level FET

03nh36

(A)

Limit R

= V / I

DS D

DSon

= 10 µs

100 µs

1 ms

Capped at 100 A due to package

10 ms

100 ms

- 1

(V)

Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage

9. Thermal characteristics

Table 6.

Symbol

Thermal characteristics

Parameter

Conditions

Min

Typ

Max

Unit

R_th(j-mb)

thermal resistance

from junction to

mounting base

Fig. 4

0.5

K/W

R_th(j-a)

thermal resistance

from junction to

ambient

vertical in still air

K/W

03nh37

th(j-mb)

δ = 0.5

0.2

(K/W)

- 1

0.1

0.05

0.02

- 2

δ =

single shot

- 6

- 3

- 5

- 4

- 3

- 2

- 1

(s)

Fig. 4. Transient thermal impedance from junction to mounting base as a function of pulse duration

BUK9E3R2-40B

All information provided in this document is subject to legal disclaimers.

Product data sheet

13 March 2014

4 / 13

NXP Semiconductors

BUK9E3R2-40B

N-channel TrenchMOS logic level FET

10. Characteristics

Table 7.

Symbol

Characteristics

Parameter

Conditions

Min

Typ

Max

Unit

Static characteristics

V_(BR)DSSdrain-source

breakdown voltage

I_D= 0.25 mA; V_GS= 0 V; T_j= -55 °C

I_D= 0.25 mA; V_GS= 0 V; T_j= 25 °C

1.1

V_GS(th)

gate-source threshold I_D= 1 mA; V_DS= V_GS; T_j= 25 °C;

1.5

voltage

Fig. 10

I_D= 1 mA; V_DS= V_GS; T_j= 175 °C;

Fig. 10

0.5

I_D= 1 mA; V_DS= V_GS; T_j= -55 °C;

Fig. 10

2.3

I_DSS

drain leakage current

gate leakage current

V_DS= 40 V; V_GS= 0 V; T_j= 25 °C

V_DS= 40 V; V_GS= 0 V; T_j= 175 °C

V_GS= 15 V; V_DS= 0 V; T_j= 25 °C

V_GS= -15 V; V_DS= 0 V; T_j= 25 °C

V_GS= 10 V; I_D= 25 A; T_j= 25 °C

V_GS= 4.5 V; I_D= 25 A; T_j= 25 °C

0.02

µA

500

100

2.8

3.5

µA

I_GSS

2.4

R_DSon

drain-source on-state

resistance

mΩ

V_GS= 5 V; I_D= 25 A; T_j= 175 °C;

Fig. 11; Fig. 12

V_GS= 5 V; I_D= 25 A; T_j= 25 °C;

Fig. 11; Fig. 12

2.7

3.2

mΩ

Dynamic characteristics

Q_G(tot)

Q_GS

Q_GD

C_iss

total gate charge

I_D= 25 A; V_DS= 32 V; V_GS= 5 V;

T_j= 25 °C; Fig. 13

gate-source charge

gate-drain charge

input capacitance

output capacitance

V_GS= 0 V; V_DS= 25 V; f = 1 MHz;

T_j= 25 °C; Fig. 14

7877 10502 pF

1397 1676 pF

C_oss

C_rss

reverse transfer

capacitance

608

833

t_d(on)

t_r

t_d(off)

t_f

turn-on delay time

rise time

V_DS= 30 V; R_L= 1.2 Ω; V_GS= 5 V;

R_G(ext)= 10 Ω; T_j= 25 °C

268

257

192

4.5

turn-off delay time

fall time

L_D

internal drain

inductance

from drain lead 6 mm from package to

center of die; T_j= 25 °C

BUK9E3R2-40B

All information provided in this document is subject to legal disclaimers.

Product data sheet

13 March 2014

5 / 13

NXP Semiconductors

BUK9E3R2-40B

N-channel TrenchMOS logic level FET

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

from upper edge of drain mounting

base to center of die; T_j= 25 °C

2.5

L_S

internal source

inductance

from source lead to source bond pad;

T_j= 25 °C

7.5

Source-drain diode

V_SDsource-drain voltage

t_rr

I_S= 40 A; V_GS= 0 V; T_j= 25 °C; Fig. 15

0.85

1.2

reverse recovery time I_S= 20 A; dI_S/dt = -100 A/µs;

V_GS= -10 V; V_DS= 20 V; T_j= 25 °C

Q_r

recovered charge

127

03nh55

03nh56

350

Label is V (V)

(A)

3.8

DSon

(mΩ)

280

3.6

3.4

210

140

3.2

2.8

2.6

2.4

2.2

(V)

Fig. 5. Output characteristics: drain current as a

function of drain-source voltage; typical values

Fig. 6. Drain-source on-state resistance as a function

of gate-source voltage; typical values

BUK9E3R2-40B

All information provided in this document is subject to legal disclaimers.

Product data sheet

13 March 2014

6 / 13

NXP Semiconductors

BUK9E3R2-40B

N-channel TrenchMOS logic level FET

03ng53

03nh53

- 1

200

(A)

(S)

- 2

- 3

- 4

- 5

- 6

150

min

typ

max

100

(A)

(V)

Fig. 7. Sub-threshold drain current as a function of

gate-source voltage

Fig. 8. Forward transconductance as a function of

drain current; typical values

03ng52

03nh54

100

2.5

GS(th)

(V)

(A)

2.0

1.5

1.0

0.5

max

typ

min

T = 175 °C

T = 25 °C

- 60

120

180

(V)

T (°C)

Fig. 9. Transfer characteristics: drain current as a

function of gate-source voltage; typical values

Fig. 10. Gate-source threshold voltage as a function of

junction temperature

BUK9E3R2-40B

All information provided in this document is subject to legal disclaimers.

Product data sheet

13 March 2014

7 / 13

NXP Semiconductors

BUK9E3R2-40B

N-channel TrenchMOS logic level FET

03nh57

03aa27

2.8

Label is V (V)

DSon

(mΩ)

3.2

1.5

3.4

3.6

3.8

0.5

140

210

280

350

- 60

120

180

T ( C)

(A)

Fig. 11. Drain-source on-state resistance as a function

of drain current; typical values

Fig. 12. Normalized drain-source on-state resistance

factor as a function of junction temperature

03nh58

03nh52

12000

(V)

iss

(pF)

= 14 V

8000

4000

= 32 V

oss

rss

- 1

100

(V)

(nC)

Fig. 14. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical

values

Fig. 13. Gate-source voltage as a function of gate

charge; typical values

BUK9E3R2-40B

All information provided in this document is subject to legal disclaimers.

Product data sheet

13 March 2014

8 / 13

NXP Semiconductors

BUK9E3R2-40B

N-channel TrenchMOS logic level FET

03nh51

100

(A)

T = 175 °C

T = 25 °C

0.0

0.2

0.4

0.6

0.8

1.0

(V)

Fig. 15. Source current as a function of source-drain voltage; typical values

BUK9E3R2-40B

All information provided in this document is subject to legal disclaimers.

Product data sheet

13 March 2014

9 / 13

NXP Semiconductors

BUK9E3R2-40B

N-channel TrenchMOS logic level FET

11. Package outline

Plastic single-ended package (I2PAK); low-profile 3-lead TO-262

SOT226

mounting

base

10 mm

scale

DIMENSIONS (mm are the original dimensions)

max

UNIT

4.5

4.1

1.40

1.27

0.85

0.60

1.3

1.0

0.7

0.4

1.6

1.2

10.3

9.7

15.0

13.5

3.30

2.79

2.6

2.2

2.54

REFERENCES

EUROPEAN

PROJECTION

OUTLINE

VERSION

ISSUE DATE

IEC

JEDEC

JEITA

06-02-14

09-08-25

SOT226

TO-262

Fig. 16. Package outline I2PAK (SOT226)

BUK9E3R2-40B

All information provided in this document is subject to legal disclaimers.

Product data sheet

13 March 2014

10 / 13

NXP Semiconductors

BUK9E3R2-40B

N-channel TrenchMOS logic level FET

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation -

lost profits, lost savings, business interruption, costs related to the removal

or replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

12. Legal information

12.1 Data sheet status

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Document

Product

Definition

status [1][2] status [3]

Objective

[short] data

sheet

Development This document contains data from

the objective specification for product

development.

Right to make changes — NXP Semiconductors reserves the right to

make changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Preliminary

[short] data

sheet

Qualification This document contains data from the

preliminary specification.

Suitability for use in automotive applications — This NXP

Semiconductors product has been qualified for use in automotive

applications. Unless otherwise agreed in writing, the product is not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer's own

risk.

Product

[short] data

sheet

Production

This document contains the product

specification.

[1] Please consult the most recently issued document before initiating or

completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of device(s) described in this document may have

changed since this document was published and may differ in case of

multiple devices. The latest product status information is available on

the Internet at URL http://www.nxp.com.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

12.2 Definitions

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Preview — The document is a preview version only. The document is still

subject to formal approval, which may result in modifications or additions.

NXP Semiconductors does not give any representations or warranties as to

the accuracy or completeness of information included herein and shall have

no liability for the consequences of use of such information.

Customers are responsible for the design and operation of their

applications and products using NXP Semiconductors products, and NXP

Semiconductors accepts no liability for any assistance with applications or

customer product design. It is customer’s sole responsibility to determine

whether the NXP Semiconductors product is suitable and fit for the

customer’s applications and products planned, as well as for the planned

application and use of customer’s third party customer(s). Customers should

provide appropriate design and operating safeguards to minimize the risks

associated with their applications and products.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences

of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is

intended for quick reference only and should not be relied upon to contain

detailed and full information. For detailed and full information see the

relevant full data sheet, which is available on request via the local NXP

Semiconductors sales office. In case of any inconsistency or conflict with the

short data sheet, the full data sheet shall prevail.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default

in the customer’s applications or products, or the application or use by

customer’s third party customer(s). Customer is responsible for doing all

necessary testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications

and the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product

is deemed to offer functions and qualities beyond those described in the

Product data sheet.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

given in the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

12.3 Disclaimers

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Limited warranty and liability — Information in this document is believed

to be accurate and reliable. However, NXP Semiconductors does not give

any representations or warranties, expressed or implied, as to the accuracy

or completeness of such information and shall have no liability for the

consequences of use of such information. NXP Semiconductors takes no

responsibility for the content in this document if provided by an information

source outside of NXP Semiconductors.

BUK9E3R2-40B

All information provided in this document is subject to legal disclaimers.

Product data sheet

13 March 2014

11 / 13

NXP Semiconductors

BUK9E3R2-40B

N-channel TrenchMOS logic level FET

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights, patents

or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

12.4 Trademarks

Notice: All referenced brands, product names, service names and

trademarks are the property of their respective owners.

Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,

FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-

CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight,

MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug,

TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP

Semiconductors N.V.

HD Radio and HD Radio logo — are trademarks of iBiquity Digital

Corporation.

BUK9E3R2-40B

All information provided in this document is subject to legal disclaimers.

Product data sheet

13 March 2014

12 / 13

NXP Semiconductors

BUK9E3R2-40B

N-channel TrenchMOS logic level FET

13. Contents

General description ............................................... 1

Features and benefits ............................................1

Applications ........................................................... 1

Quick reference data ............................................. 1

Pinning information ...............................................2

Ordering information .............................................2

Marking ...................................................................2

Limiting values .......................................................2

Thermal characteristics .........................................4

Characteristics .......................................................5

Package outline ................................................... 10

Legal information .................................................11

Data sheet status ............................................... 11

Definitions ...........................................................11

Disclaimers .........................................................11

Trademarks ........................................................ 12

12.1

12.2

12.3

12.4

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 13 March 2014

BUK9E3R2-40B

All information provided in this document is subject to legal disclaimers.

Product data sheet

13 March 2014

13 / 13

BUK9E3R2-40B,127 [NXP]

相关型号：

BUK9E3R2-40E

BUK9E3R2-40E,127

BUK9E3R7-60E,127

BUK9E4R4-40B

BUK9E4R4-80E

BUK9E4R4-80E,127

BUK9E4R9-60E

BUK9E4R9-60E,127

BUK9J0R9-40H

BUK9K12-60E

BUK9K13-40H

BUK9K13-60E