BUT11APX-1200,127_技术文档

DISCRETE SEMICONDUCTORS

D

ATA SHEET

BUT11APX-1200

Silicon Diffused Power Transistor

Product specification

April 1999

ꢀꢁꢂ Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11APX-1200

GENERAL DESCRIPTION

Enhanced performance new generation,high voltage, high-speed switching npn transistor in a plastic full-pack

envelope intended for use in horizontal deflection circuits of colour television receivers. Features exceptional

tolerance to base drive and collector current load variations resulting in a very low worst case dissipation.

QUICK REFERENCE DATA

SYMBOL PARAMETER

CONDITIONS

TYP. MAX. UNIT

V_CESM

V_CBO

V_CEO

I_C

I_CM

P_tot

V_CEsat

h_FEsat

t_f

Collector-emitter voltage peak value

V_BE= 0 V

-

1200

550

6

10

32

1.0

-

300

V

A

W

V

Collector-Base voltage (open emitter)

Collector-emitter voltage (open base)

Collector current (DC)

Collector current peak value

Total power dissipation

Collector-emitter saturation voltage

DC current gain

Fall time

T_hs≤ 25 ˚C

I_C= 2 A; I_B= 0.4 A

I_C= 3 A; V_CE= 5 V

I_C= 2.5 A; I_B1= 0.5 A

0.15

15.5

170

ns

PINNING - SOT186A

PIN CONFIGURATION

SYMBOL

1

DESCRIPTION

c

case

base

2

collector

emitter

b

3

case isolated

1

2 3

e

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN. MAX. UNIT

V_CESM

V_CEO

V_CBO

I_C

Collector to emitter voltage

V_BE= 0 V

-

1200

550

1200

6

V

Collector to emitter voltage (open base)

Collector to base voltage (open emitter)

Collector current (DC)

A

I_CM

I_B

I_BM

P_tot

T_stg

T_j

Collector current peak value

Base current (DC)

Base current peak value

Total power dissipation

Storage temperature

-

10

3

5

32

150

A

W

˚C

T_hs≤ 25 ˚C

-65

-

Junction temperature

THERMAL RESISTANCES

SYMBOL PARAMETER

CONDITIONS

TYP. MAX. UNIT

R_{th j-hs}

R_{th j-a}

Junction to heatsink

Junction to ambient

with heatsink compound

in free air

-

3.95

-

K/W

55

April 1999

1

Rev 1.000

ꢀꢁꢂ Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11APX-1200

ISOLATION LIMITING VALUE & CHARACTERISTIC

T_hs= 25 ˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

V_isolR.M.S. isolation voltage from all f = 50-60 Hz; sinusoidal

three terminals to external waveform;

heatsink R.H. ≤ 65% ; clean and dustfree

-

2500

V

C_isol

Capacitance from T2 to external f = 1 MHz

heatsink

-

10

-

pF

STATIC CHARACTERISTICS

T_hs= 25 ˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

I_CES

Collector cut-off current ¹

V_BE= 0 V; V_CE= V_CESMmax

T_j= 125 ˚C

-

1.0

2.0

mA

;

I_EBO

V_CEOsust

Emitter cut-off current V_EB= 7 V; I_C= 0 A

Collector-emitter sustaining voltage I_B= 0 A; I_C= 10 mA;

-

550

-

0.1

-

mA

V

L = 25 mH

Collector-emitter saturation voltage I_C= 2.0 A; I_B= 0.4 A

V_CEsat

V_BEsat

h_FE

h_FEsat

-

13

20

13

-

0.15

0.91

25

30

18.5

15.5

1.0

1.5

-

47

25

-

V

Base-emitter saturation voltage

DC current gain

I_C= 2.0 A; I_B= 0.4 A

I_C= 1 mA; V_CE= 5 V

I_C= 500 mA; V_CE= 5 V

I_C= 2 A; V_CE= 5 V

DC current gain

I_C= 3.0 A; V_CE= 5 V

DYNAMIC CHARACTERISTICS

T_hs= 25 ˚C unless otherwise specified8

SYMBOL PARAMETER

CONDITIONS

TYP. MAX. UNIT

Switching times (resistive load)

I_Con= 2.5 A; I_Bon= -I_Boff= 0.5 A;

R_L= 75 ohms; V_BB2= 4 V;

t_on

t_s

t_f

Turn-on time

Turn-off storage time

Turn-off fall time

-

0.5

3

0.3

μs

Switching times (inductive load)

I_Csat= 2.5 A; I_B1= 0.5 A; L_B= 1 μH;

-V_BB= 5 V

t_s

t_f

Turn-off storage time

Turn-off fall time

-

170

1.5

300

μs

ns

Switching times (inductive load)

I_Csat= 2.5 A; I_B1= 0.5 A; L_B= 1 μH;

-V_BB= 5 V; T_j= 100 ˚C

t_s

t_f

Turn-off storage time

Turn-off fall time

-

1.8

300

μs

ns

1 Measured with half sine-wave voltage (curve tracer).

April 1999

2

Rev 1.000

ꢀꢁꢂ Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11APX-1200

ICsat

90 %

+ 50v

100-200R

IC

10 %

ts

Horizontal

Oscilloscope

Vertical

tf

ton

toff

IB1

IB

10 %

1R

300R

tr 30ns

6V

30-60 Hz

-IB2

Fig.1. Test circuit for V_CEOsust

.

Fig.4. Switching times waveforms with resistive load.

IC / mA

VCC

LC

250

200

IBon

LB

100

0

T.U.T.

-VBB

min

VCE / V

VCEOsust

Fig.2. Oscilloscope display for V_CEOsust

.

Fig.5. Test circuit inductive load.

_CC= 300 V; -V_BE= 5 V; L_C= 200 uH; L_B= 1 uH

V

ICsat

90 %

VCC

IC

R

L

10 %

VIM

R

tf

B

t

0

T.U.T.

ts

IB

IB1

tp

t

T

- IB2

Fig.3. Test circuit resistive load. V_IM= -6 to +8 V

V_CC= 250 V; t_p= 20 μs; δ = t_p/ T = 0.01.

R_Band R_Lcalculated from I_Conand I_Bonrequirements.

Fig.6. Switching times waveforms with inductive load.

April 1999

3

Rev 1.000

ꢀꢁꢂ Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11APX-1200

Normalised Power Derating

VBEsat/V

PD%

120

110

100

90

80

70

60

50

40

30

20

10

0

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

0

20

40

60

80

Tmb /

100

120

140

0.1

1

IC/A

10

C

Fig.7. Normalised power dissipation.

PD% = 100⋅PD/PD _25˚C= f (T_hs)

Fig.10. Base-Emitter saturation voltage.

Solid lines = typ values, V_BEsat= f(IC); at IC/IB =4.

h_FE

VCEsat/V

100

10

1

0.5

5V

0.4

0.3

0.2

0.1

0.0

Tj = 25 C

1V

0.1

1

10

0.01

0.1

1

10

IC/A

IC / A

Fig.8. Typical DC current gain. h_FE= f(I_C)

parameter V_CE

Fig.11. Collector-Emitter saturation voltage.

Solid lines = typ values, V_CEsat= f(IC); at IC/IB =4.8

Zth / (K/W)

BU1706AX

10

1

VCEsat/V

2.0

0.5

1.6

0.2

0.1

IC=1A

2A

3A

4A

0.05

1.2

0.8

0.4

0.0

0.1

0.02

t_p

t

p

P

D =

D

T

0.01

0.001

D=0

t

T

1u 10u 100u 1m 10m 100m

t / s

1

10 100

0.01

0.10

1.00

10.00

IB/A

Fig.9. Collector-Emitter saturation voltage.

Solid lines = typ values, V_CEsat= f(IB); T_j=25˚C.

Fig.12. Transient thermal impedance.

Z_{th j-hs}= f(t); parameter D = t_p/T

April 1999

4

Rev 1.000

ꢀꢁꢂ Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11APX-1200

IC (A)

11

VCC

10

9

8

7

6

5

4

3

2

1

0

LC

VCL(RBSOAR)

PROBE POINT

IBon

LB

T.U.T.

-VBB

0

200

400

600

800

1,000

1,200

1,400

VCEclamp (V)

Fig.13. Reverse bias safe operating area. T_j≤ T_{j max}

Fig.14. Test circuit for reverse bias safe operating

area.

V_cl≤ 1200V; V_cc= 150V; V_BB= -5V; L_B= 1μH;L_c=

200μH

April 1999

5

Rev 1.000

ꢀꢁꢂ Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11APX-1200

MECHANICAL DATA

Dimensions in mm

Net Mass: 2 g

10.3

max

4.6

max

3.2

3.0

2.9 max

2.8

Recesses (2x)

2.5

0.8 max. depth

6.4

15.8

max

seating

plane

15.8

max.

19

max.

3 max.

not tinned

3

2.5

13.5

min.

1

2

3

M

0.4

1.0 (2x)

0.6

2.5

0.9

0.7

2.54

0.5

5.08

1.3

Fig.15. SOT186A; The seating plane is electrically isolated from all terminals.

Notes

1. Refer to mounting instructions for F-pack envelopes.

2. Epoxy meets UL94 V0 at 1/8".

April 1999

6

Rev 1.000

NXP Semiconductors

Legal information

DATA SHEET STATUS

DOCUMENT

STATUS⁽¹⁾

PRODUCT

STATUS⁽²⁾

DEFINITION

Objective data sheet

Development

This document contains data from the objective specification for product

development.

Preliminary data sheet

Product data sheet

Qualification

Production

This document contains data from the preliminary specification.

This document contains the product specification.

Notes

1. Please consult the most recently issued document before initiating or completing a design.

2. The product status of device(s) described in this document may have changed since this document was published

and may differ in case of multiple devices. The latest product status information is available on the Internet at

URL http://www.nxp.com.

DEFINITIONS

Right to make changes ⎯ NXP Semiconductors

reserves the right to make changes to information

published in this document, including without limitation

specifications and product descriptions, at any time and

without notice. This document supersedes and replaces all

information supplied prior to the publication hereof.

Product specification ⎯ The information and data

provided in a Product data sheet shall define the

specification of the product as agreed between NXP

Semiconductors and its customer, unless NXP

Semiconductors and customer have explicitly agreed

otherwise in writing. In no event however, shall an

agreement be valid in which the NXP Semiconductors

product is deemed to offer functions and qualities beyond

those described in the Product data sheet.

Suitability for use ⎯ NXP Semiconductors products are

not designed, authorized or warranted to be suitable for

use in life support, life-critical or safety-critical systems or

equipment, nor in applications where failure or malfunction

of an NXP Semiconductors product can reasonably be

expected to result in personal injury, death or severe

property or environmental damage. NXP Semiconductors

accepts no liability for inclusion and/or use of NXP

Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at

the customer’s own risk.

DISCLAIMERS

Limited warranty and liability ⎯ Information in this

document is believed to be accurate and reliable.

However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to

the accuracy or completeness of such information and

shall have no liability for the consequences of use of such

information.

Applications ⎯ Applications that are described herein for

any of these products are for illustrative purposes only.

NXP Semiconductors makes no representation or

warranty that such applications will be suitable for the

specified use without further testing or modification.

In no event shall NXP Semiconductors be liable for any

indirect, incidental, punitive, special or consequential

damages (including - without limitation - lost profits, lost

savings, business interruption, costs related to the

removal or replacement of any products or rework

charges) whether or not such damages are based on tort

(including negligence), warranty, breach of contract or any

other legal theory.

Customers are responsible for the design and operation of

their applications and products using NXP

Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or

customer product design. It is customer’s sole

responsibility to determine whether the NXP

Notwithstanding any damages that customer might incur

for any reason whatsoever, NXP Semiconductors’

aggregate and cumulative liability towards customer for

the products described herein shall be limited in

accordance with the Terms and conditions of commercial

sale of NXP Semiconductors.

Semiconductors product is suitable and fit for the

customer’s applications and products planned, as well as

for the planned application and use of customer’s third

party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks

associated with their applications and products.

NXP Semiconductors

Legal information

NXP Semiconductors does not accept any liability related

to any default, damage, costs or problem which is based

on any weakness or default in the customer’s applications

or products, or the application or use by customer’s third

party customer(s). Customer is responsible for doing all

necessary testing for the customer’s applications and

products using NXP Semiconductors products in order to

avoid a default of the applications and the products or of

the application or use by customer’s third party

customer(s). NXP does not accept any liability in this

respect.

that is open for acceptance or the grant, conveyance or

implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Export control ⎯ This document as well as the item(s)

described herein may be subject to export control

regulations. Export might require a prior authorization from

national authorities.

Quick reference data ⎯ The Quick reference data is an

extract of the product data given in the Limiting values and

Characteristics sections of this document, and as such is

not complete, exhaustive or legally binding.

Limiting values ⎯ Stress above one or more limiting

values (as defined in the Absolute Maximum Ratings

System of IEC 60134) will cause permanent damage to

the device. Limiting values are stress ratings only and

(proper) operation of the device at these or any other

conditions above those given in the Recommended

operating conditions section (if present) or the

Characteristics sections of this document is not warranted.

Constant or repeated exposure to limiting values will

permanently and irreversibly affect the quality and

reliability of the device.

Non-automotive qualified products ⎯ Unless this data

sheet expressly states that this specific NXP

Semiconductors product is automotive qualified, the

product is not suitable for automotive use. It is neither

qualified nor tested in accordance with automotive testing

or application requirements. NXP Semiconductors accepts

no liability for inclusion and/or use of non-automotive

qualified products in automotive equipment or

applications.

In the event that customer uses the product for design-in

and use in automotive applications to automotive

specifications and standards, customer (a) shall use the

product without NXP Semiconductors’ warranty of the

product for such automotive applications, use and

specifications, and (b) whenever customer uses the

product for automotive applications beyond NXP

Semiconductors’ specifications such use shall be solely at

customer’s own risk, and (c) customer fully indemnifies

NXP Semiconductors for any liability, damages or failed

product claims resulting from customer design and use of

the product for automotive applications beyond NXP

Semiconductors’ standard warranty and NXP

Terms and conditions of commercial sale ⎯ NXP

Semiconductors products are sold subject to the general

terms and conditions of commercial sale, as published at

http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an

individual agreement is concluded only the terms and

conditions of the respective agreement shall apply. NXP

Semiconductors hereby expressly objects to applying the

customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

No offer to sell or license ⎯ Nothing in this document

may be interpreted or construed as an offer to sell products

Semiconductors’ product specifications.

Customer notification

This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions

and disclaimers. No changes were made to the content, except for the legal definitions and disclaimers.

Contact information

For additional information please visit: http://www.nxp.com

For sales offices addresses send e-mail to: salesaddresses@nxp.com

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without

notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or

other industrial or intellectual property rights.

Printed in The Netherlands


型号：	BUT11APX-1200,127
厂家：	NXP
描述：	BUT11APX-1200 局域网开关晶体管
文件：	总9页 (文件大小：136K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BUT11APX-1200,127 [NXP]

相关型号：

BUT11ATU

BUT11ATU

BUT11AX

BUT11AX

BUT11AX

BUT11A_04

BUT11F

BUT11F

BUT11F

BUT11F

BUT11F/11AF

BUT11FI