GTL2004 [NXP]
Quad GTL/GTL to LVTTL/TTL bidirectional latched translator; 四GTL / GTL为LVTTL / TTL双向闭锁翻译型号: | GTL2004 |
厂家: | NXP |
描述: | Quad GTL/GTL to LVTTL/TTL bidirectional latched translator |
文件: | 总10页 (文件大小:101K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
GTL2004
Quad GTL/GTL+ to LVTTL/TTL
bidirectional latched translator
Product specification
1999 Jul 19
Supersedes data of 1999 May 15
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad GTL/GTL+ to LVTTL/TTL
bidirectional latched translator
GTL2004
FEATURES
PIN CONFIGURATION
+
• Operates as a quad GTL/GTL sampling receiver or as a
+
LVTTL/TTL to GTL/GTL driver
A0
1
2
3
4
5
V
16
CC
• Quad bidirectional bus interface
• Separate latch enable for each bit
LE0
A1
DIR
15
14
13
12
11
B0
B1
B2
• Live insertion/extraction permitted
LE1
A2
• B outputs include 30Ω series resistance
• Latch-up protection exceeds 500mA per JEDEC Std 17
• ESD protection exceeds 2000V per JEDEC Std
LE2
A3
6
7
8
B3
GTLREF
10
9
GND
LE3
DESCRIPTION
SW00318
The GTL2004 is a quad translating transceiver designed for 3.3V
+
system interface with a GTL/GTL bus.
The direction pin allows the part to function as either a GTL to TTL
sampling receiver or as a TTL to GTL interface. Separate latch
enables allow sampling and holding of data from the GTL bus.
PIN DESCRIPTION
PIN NUMBER SYMBOL
NAME AND FUNCTION
Direction control input
Data inputs/outputs (A side, GTL)
Data inputs/outputs (B side, TTL)
Latch enables
15
1, 3, 5, 7
11, 12, 13, 14
2, 4, 6, 9
10
DIR
A0 – A3
B0 – B3
LE0 – LE3
GTLREF
GND
GTL reference voltage
Ground (0V)
8
16
V
CC
Positive supply voltage
QUICK REFERENCE DATA
TYPICAL
UNIT
CONDITIONS
= 25°C
SYMBOL
PARAMETER
T
amb
B to A
A to B
t
t
Propagation delay
2.0
1.8
4.4
4.7
PLH
PHL
C = 50pF; V = 3.3V
ns
L
CC
An to Bn or Bn to An
Input capacitance DIR, LEn
I/O pin capacitance
C
V = 0V or V
I CC
3.0
7.2
3.0
4.6
pF
pF
IN
C
Outputs disabled; V = 0V or 3.152V
I/O
I/O
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
DWG NUMBER
16-Pin Plastic TSSOP Type II
–40°C to +85°C
GTL2004 PW DH
SOT403-1
2
1999 Jul 19
853–2165 21984
Philips Semiconductors
Product specification
Quad GTL/GTL+ to LVTTL/TTL
bidirectional latched translator
GTL2004
LOGIC SYMBOL
FUNCTION TABLE
INPUT
INPUT/OUTPUT
DIR
L
LEn
H
A
Inputs
X
B
An = Bn
NC
L
L
A0
LATCH
H
X
Bn = An
Inputs
B0
H = HIGH voltage level
L = LOW voltage level
X = Don’t care
LE0
NC = No change
A1
LATCH
B1
LE1
A2
LATCH
B2
LE2
A3
LATCH
B3
LE3
GTLREF
DIR
SW00319
3
1999 Jul 19
Philips Semiconductors
Product specification
Quad GTL/GTL+ to LVTTL/TTL
bidirectional latched translator
GTL2004
1
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum System (IEC 134); voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
DC supply voltage
TEST CONDITIONS
RATING
UNIT
V
V
–0.5 to +4.6
–50
CC
IK
I
DC input diode current
V < 0
I
mA
V
A port
B port
–0.5 to +7.0
–0.5 to +4.6
–50
3
V
I
DC input voltage
V
I
DC output diode current
V
O
< 0
mA
V
OK
Output in OFF or HIGH state; A port
–0.5 to +7.0
–0.5 to +4.6
128
3
V
O
DC output voltage
Output in OFF or HIGH state; B port
V
A port
B port
A port
mA
mA
mA
°C
I
OL
Current into any output in the LOW state
80
I
Current into any output in the HIGH state
Storage temperature range
–64
OH
T
stg
–60 to +150
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
1
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
0
TYP
MAX
3.6
UNIT
V
CC
Supply voltage
V
GTL
GTL+
1.14
1.35
0.74
0.87
0
1.2
1.5
0.8
1.0
1.26
1.65
0.87
1.10
V
Termination voltage
Supply voltage
V
V
V
V
V
TT
GTL
V
REF
GTL+
A port
V
TT
V
Input voltage
I
Except A port
A port
0
5.5
V
+ 50mV
REF
V
HIGH-level input voltage
IH
Except A port
A port
2
V
– 50mV
0.8
REF
V
LOW-level input voltage
IL
Except A port
B port
I
HIGH-level output current
LOW-level output current
–12
40
mA
mA
mA
°C
OH
A port
I
OL
B port
12
T
amb
Operating free-air temperature range
–40
85
NOTE:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
4
1999 Jul 19
Philips Semiconductors
Product specification
Quad GTL/GTL+ to LVTTL/TTL
bidirectional latched translator
GTL2004
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
LIMITS
–40°C to +85°C
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
1
MIN
V –0.2
CC
TYP
MAX
V
V
V
V
V
V
V
V
V
V
V
V
V
= 3.0 to 3.6V I = –100µA
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
; OH
V
B port
V
OH
= 3.0V I = –12mA
2.0
; OH
A port
= 3.0V I = 40mA
0.4
0.8
± 1
± 1
10
V
V
; OL
V
OL
B port
= 3.0V I = 12mA
; OL
Control inputs
A port
= 3.6V; V = V or GND
I CC
= 3.6V; V = V or GND
I
TT
= 0 or 3.6V; V = 5.5
I
I
µA
I
= 3.6V; V = V
± 1
–5
B port
I
CC
= 3.6V; V = 0V
I
I
A port
= 0V;V or V = 0 to 4.5V
± 100
125
3
µA
µA
mA
µA
pF
OFF
I
O
I
B port
= 5.5V; V = 3.0V
50
EX
CC
O
CC
I
A or B port
= 3.6V;V = V or GND; I = 0
I CC O
CC
CC
3
∆I
CC
B port or control inputs
Control inputs
B port
= 3.6V; V = V –0.6V
500
I
CC
C
V = 3.0V or 0
I
3
I
V
= 3.0V or 0
7.2
4.6
O
O
C
pF
IO
A port
V
= V or 0
TT
NOTES:
1. All typical values are measured at V = 3.3V and T
= 25°C.
amb
CC
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
3. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC or GND.
AC CHARACTERISTICS (3.3V "0.3V RANGE)
LIMITS (GTL)
LIMITS (GTL+)
V
= 3.3V "0.3V
V
= 3.3V "0.3V
CC
V
CC
V
SYMBOL
PARAMETER
WAVEFORM
UNIT
= 0.8V
= 1.0V
REF
REF
1
1
MIN
TYP
MAX
MIN
TYP
MAX
t
t
2.0
1.8
2.8
2.5
2.0
1.8
2.8
2.5
PLH
PHL
Bn to An
2
3
1
ns
ns
ns
t
t
4.4
4.7
6.5
5.8
4.4
4.5
5.7
5.1
PLH
PHL
An to Bn
t
t
3.5
3.4
4.9
4.2
3.5
3.4
4.9
4.2
PLH
PHL
LEn to Bn
NOTE:
1. All typical values are at V = 3.3V and T
= 25°C.
amb
CC
AC SETUP REQUIREMENT (3.3V "0.3V RANGE)
1
Over recommended ranges of supply voltage.
LIMITS (GTL)
= 3.3V "0.3V
LIMITS (GTL+)
V = 3.3V "0.3V
CC
V
CC
SYMBOL
PARAMETER
WAVEFORM
UNIT
V
REF
= 0.8V
V
REF
= 1.0V
MIN
MAX
MIN
MAX
t (H)
t (L)
S
1.3
1.5
1.2
1.5
S
Setup time (An to LEn)
4
ns
t (H)
t (L)
h
0.0
0.0
0.0
0.0
h
Hold time (An to LEn)
LEn pulse width
4
2
ns
ns
t (H)
w
1.1
1.1
NOTE:
1. These parameters are warranted but not production tested.
5
1999 Jul 19
Philips Semiconductors
Product specification
Quad GTL/GTL+ to LVTTL/TTL
bidirectional latched translator
GTL2004
AC WAVEFORMS
V
M
V
M
V
X
V
Y
V
X
= 1.5V at V w 3.0V, V = V /2 at V v 2.7V for A ports and control pins
CC M CC CC
= V
for B ports
Ref
= V + 0.3V at A ports
OL
= V – 0.3V at A ports
OH
= V
at B ports
REF
V
3.0V or V
TT
CC
whichever is
less
Input
LEn
V
REF
V
REF
V
V
M
V
M
M
t
t (H)
w
0V
0V
t
t
PHL
PLH
t
PHL
PLH
V
OH
V
V
OH
OL
Bn
V
V
M
M
1.5V
1.5V
Output
V
OL
ALL CONTROL INPUTS ARE TTL LEVELS.
SW00333
ALL INPUT PULSES ARE SUPPLIED BY GENERATORS HAVING THE
FOLLOWING CHARACTERISTICS:
Waveform 1. Propagation delay, Enable to Output and
Enable Pulse Width
PRR ≤ 10MHz, Z = 50Ω, t ≤ 2.5ns, t ≤ 2.5ns.
O
r
f
SW00469
Waveform 3. Propagation delay A port to B port
t
PLH
3.0V
0V
V
V
M
V V
M
3.0V or V
whichever is
less
CC
Bn
V
V
V
V
M
M
M
M
VOLTAGE WAVEFORMS PULSE DURATION
= 1.5V for B port and 0.8V for A port
V
M
0V
t (H)
s
t (H) t (H)
t (H)
n
n
s
3.0V or V
CC
3.0V
whichever is
less
LEn
V
V
M
M
Input
1.5V
1.5V
0V
0V
t
t
PHL
PLH
SW00334
V
V
OH
OL
Waveform 4. Data Setup and Hold Times
V
V
REF
REF
Output
VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES
B port to A port
SW00470
Waveform 2.
6
1999 Jul 19
Philips Semiconductors
Product specification
Quad GTL/GTL+ to LVTTL/TTL
bidirectional latched translator
GTL2004
TEST CIRCUIT
V
CC
V
V
O
I
PULSE
GENERATOR
D.U.T.
50pF
R
T
R
= 500Ω
L
C
L
Test Circuit for switching times
DEFINITIONS
R
L
C
L
R
T
= Load resistor
= Load capacitance includes jig and probe capacitance
= Termination resistance should be equal to Z of pulse generators.
OUT
SW00471
Figure 1. Load circuitry for switching times
V
V
TT
CC
25Ω
V
V
O
I
PULSE
GENERATOR
D.U.T.
R
30pF
T
C
L
SW00332
Figure 2. Load circuit for A outputs
7
1999 Jul 19
Philips Semiconductors
Product specification
Quad GTL/GTL+ to LVTTL/TTL
bidirectional latched translator
GTL2004
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
8
1999 Jul 30
Philips Semiconductors
Product specification
Quad GTL/GTL+ to LVTTL/TTL
bidirectional latched translator
GTL2004
NOTES
9
1999 Jul 30
Philips Semiconductors
Product specification
Quad GTL/GTL+ to LVTTL/TTL
bidirectional latched translator
GTL2004
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1999
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Date of release: 07-99
Document order number:
9397 750 06247
Philips
Semiconductors
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