I74F776N [NXP]
Pi-bus transceiver; 丕总线收发器
| 型号： | I74F776N |
| 厂家： | 
NXP |
| 描述： | Pi-bus transceiver |
| 文件： | 总12页 (文件大小：111K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F776
Pi-bus transceiver
Product specification
IC15 Data Handbook
1990 Dec 19
Philips
Semiconductors
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
FEATURES
• Octal latched transceiver
• Drives heavily loaded backplanes with equivalent load impedances
down to 10 ohms
consumption and a series diode on the drivers to reduce capacitive
loading. Incident wave switching is employed, therefore BTL
propagation delays are short. Although the voltage swing is less for
BTL, so is its receiver threshold, therefore noise margins are excellent.
• High drive (100mA) open collector drivers on B port
• Reduced voltage swing (1 volt) produces less noise and reduces
power consumption
BTL offers low power consumption, low ground bounce, EMI and
crosstalk, low capacitive loading, superior noise margin and low
propagation delays. This results in a high bandwidth, reliable
backplane.
• High speed operation enhances performance of backplane buses
and facilitates incident wave switching
The 74F776 A port has TTL 3–state drivers and TTL receivers with a
• Compatible with Pi–bus and IEEE 896 Futurebus standards
• Built–in precision band–gap reference provides accurate receiver
thresholds and improved noise immunity
latch function. A separate high–level control voltage input (V ) is
X
provided to limit the A side output level to a given voltage level (such
as 3.3V). For 5.0V systems, V is simply tied to V
.
CC
X
• Controlled output ramp and multiple GND pins minimize ground
bounce
The 74F776 has a designed feature to control the B output transitions
during power sequencing. There are two possible sequencing, They
are as follows:
• Glitch–free power up/power down operation
• Multiple package options
• Industrial temperature range available (–40°C to +85°C)
1.When LE = low and OEBn = low then the B outputs are disabled until
theLEcircuitrytakescontrol.ThentheBoutputswillfollowtheAinputs,
making a maximum of one transition during power–up (or down).
2. If LE = high or OEBn = high then the B outputs will be disabled during
power–up (or down).
DESCRIPTION
The 74F776 is an octal bidirectional latched transceiver and is
intended to provide the electrical interface to a high performance
wired–OR bus. The B port inverting drivers are low–capacitance open
collector with controlled ramp and are designed to sink 100mA from 2
volts. The B port inverting receivers have a 100 mV threshold region
and a 4ns glitch filter.
TYPE
TYPICAL PROPAGA-
TION DELAY
TYPICAL SUPPLY
CURRENT( TOTAL)
74F776
6.5ns
80mA
The 74F776 B port interfaces to ’Backplane Transceiver Logic’ (BTL).
BTL features a reduced (1V to 2V) voltage swing for lower power
ORDERING INFORMATION
ORDER CODE
COMMERCIAL RANGE
= 5V ±10%, T = 0°C to +70°C
INDUSTRIAL RANGE
DESCRIPTION
PKG DWG #
V
CC
V
CC
= 5V ±10%, T
= –40°C to +85°C
amb
amb
28–pin plastic DIP (600 mil)
28–pin PLCC
N74F776N
N74F776A
I74F776N
I74F776A
SOT117-2
SOT261-2
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
74F (U.L.)
LOAD VALUE
HIGH/LOW
PINS
DESCRIPTION
HIGH/LOW
3.5/0.117
5.0/0.167
1.0/0.033
1.0/0.033
1.0/0.033
150/40
A0 – A7
B0 – B7
OEA
PNP latched inputs
70µA/70µA
100µA/100µA
20µA/20µA
20µA/20µA
20µA/20µA
3mA/24mA
OC/100mA
Data inputs with threshold circuitry
A output enable input (active high)
B output enable inputs (active low)
Latch enable input (active low)
3–state outputs
OEB0, OEB1
LE
A0 – A7
B0 – B7
Open collector outputs
OC/166.7
Notes to input and output loading and fan out table
One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
OC = Open collector.
2
December 19, 1990
853 1121 01321
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
PIN CONFIGURATION
IEC/IEEE SYMBOL
1
2
3
4
5
6
7
8
9
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
LE
B0
CC
&
15
16
28
2
OEA
A0
EN2
B1
EN1
EN3
GND
A1
GND
B2
27
3
A2
B3
ID
2
A3
GND
B4
3
5
26
24
23
21
20
19
17
GND
A4
6
B5
7
A5 10
GND 11
A6 12
B6
9
GND
B7
10
12
13
A7 13
OEB1
OEB0
SF00422
VX
14
SF00424
PIN CONFIGURATION PLCC
LOGIC SYMBOL
V
GND A0 OEA
LE B0 B1
CC
1
3
5
6
7
9
10 12 13
26
4
3
2
28 27
A1
A2
5
6
7
25
GND
24 B2
23 B3
A0 A1 A2 A3 A4 A5 A6 A7
OEB0
15
2
A3
OEA
LE
8
9
PLCC
GND
A4
22
21
GND
B4
28
16
OEB1
B0 B1 B2 B3 B4 B5 B6 B7
A5 10
GND
20 B5
19
11
B6
12 13 14 15 16 17
A6 A7 OEB0 OEB1 B7 GND
18
27 26 24 23 21 20 19 17
V
X
V
= Pin 1, V = Pin 14
X
SF00423
CC
GND = Pin 4, 8, 11, 18, 22, 25
SF00425
PIN DESCRIPTION
SYMBOL
PINS
TYPE
NAME AND FUNCTION
PNP latched input/3–state output (with V control option)
A0 – A7
B0 – B7
3, 5, 6, 7, 9, 10, 12, 13
I/O
I/O
X
Data input with special threshold circuitry to reject noise/ open collector output, high
current drive
27, 26, 24, 23, 21, 20, 19, 17
OEB0
OEB1
OEA
LE
15
16
2
Input
Input
Input
Input
Input
Enables the B outputs when both pins are low
Enables the A outputs when high
28
14
Latched when high (a special feature is built in for proper enabling times)
V
X
Clamping voltage keeping V from rising above V (V = V for normal use)
OH X X cc
3
December 19, 1990
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
LOGIC DIAGRAM
15
16
2
OEB0
OEB1
OEA
28
3
LE
A0
Q
Q
Data
LE
27
26
B0
B1
5
A1
Data
LE
6
7
9
Q
Q
Q
A2
A3
A4
Data
LE
24
23
21
B2
B3
B4
Data
LE
Data
LE
10
Q
A5
Data
LE
20
B5
12
13
Q
Q
A6
A7
Data
LE
19
17
B6
B7
Data
LE
V
= Pin 1, V = Pin 14,
X
CC
GND = Pin 4, 8, 11, 18, 22, 25
SF00426
4
December 19, 1990
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
FUNCTION TABLE
INPUTS
LATCH
STATE
H
OUTPUTS
OPERATING MODE
An Bn* LE
OEA OEB0 OEB1
An
Z
Bn
Z
H
L
X
–
–
–
–
H
L
X
–
–
–
–
H
L
X
–
–
–
–
X
X
X
–
L
L
L
L
L
L
L
L
A 3–state, data from A to B
L
Z
L
H
L
L
L
L
Qn
(1)
H (2)
H (2)
Qn
H
Z
Qn A 3–state, latched data to B
(1) Feedback: A to B, B to A
H
H
H
H
L
L
L
(1)
H
L
H
L
H
H
H
L
L
L
Z(2) Preconditioned latch enabling data transfer from B to A
L
L
Z(2)
–
L
L
Qn
Z
Qn Latch state to A and B
Z
X
X
X
H
L
H
H
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
H
H
H
H
H
H
L
L
L
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
B and A 3–state
H
L
L
Qn
H
Z
H
H
H
H
L
H
L
L
L
B 3–state, data from B to A
H
L
H
H
L
Qn
Qn
H
H
L
X
X
X
H
L
Z
L
L
L
Z
B and A 3–state
H
L
L
Qn
H
Z
H
H
H
H
H
L
L
L
B 3–state, data from B to A
H
L
H
H
Qn
Qn
H
L
Notes to function table
H
L
X
–
=
=
=
=
=
High voltage level
Low voltage level
Don’t care
Input not externally driven
High impedance ”off” state
Z
Q = High or Low voltage level one setup time prior to the low–to–high LE transition.
n
(1) = Condition will cause a feedback loop path: A to B and B to A.
(2) = The latch must be preconditioned such that B inputs may assume a high or low level while OEB0 and OEB1 are low and LE is high.
B* = Precaution should be taken to insure the B inputs do not float. If they do they are equal to low state.
5
December 19, 1990
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–0.5 to +7.0
–0.5 to +5.5
–40 to +5
UNIT
V
V
V
V
Supply voltage
Threshold control
Input voltage
CC
X
V
OEBn, OEA, LE
A0 – A7, B0 – B7
V
IN
V
I
IN
Input current
mA
V
I
Voltage applied to output in high output state
Current applied to output in low output state
–0.5 to V
V
OUT
CC
A0 – A7
B0 – B7
48
mA
mA
°C
°C
°C
OUT
200
T
amb
Operating free air temperature range
Storage temperature range
Commercial range
Industrial range
0 to +70
–40 to +85
–65 to +150
T
stg
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
MIN
NOM
MAX
V
Supply voltage
4.5
5.0
5.5
V
V
CC
V
IH
High–level input voltage
Low–level input voltage
Input clamp current
Except B0 – B7
2.0
1.6
B0 – B7
Except B0 – B7
B0 – B7
V
V
IL
0.8
1.45
–18
–40
–3
V
V
I
Ik
Except A0 – A7
A0 – A7
mA
mA
mA
mA
mA
I
I
High–level output current
Low–level output current
A0 – A7
OH
A0 – A7
24
OL
B0 – B7
100
Operating free air temperature
range
T
amb
Commercial range
Industrial range
0
+70
+85
°C
°C
–40
6
December 19, 1990
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST
LIMITS
UNIT
1
2
CONDITIONS
MIN TYP
MAX
100
I
I
High–level output current
B0 – B7
B0 – B7
V
V
V
= MAX, V = MAX, V = MIN, V = 2.1V
µA
µA
V
OH
CC
CC
CC
IL
IH
OH
Power–off output current
= 0.0V, V = MAX, V = MIN, V = 2.1V
100
OFF
IL
IH
OH
= MIN,
= MAX, V = MIN
I
= –3mA, V =V
2.5
2.5
V
CC
OH
X
CC
4
V
High-level output voltage
A0 – A7
I
= –4mA,
=3.13V and 3.47V
OH
OH
V
IL
V
IH
V
X
4
A0 – A7
V
V
V
V
V
V
V
V
= MIN,
I
= 20mA, V = V
CC
0.50
1.15
V
V
CC
OL
X
V
V
Low-level output voltage
Input clamp voltage
B0 – B7
= MAX
= MIN
I
OL
= 100mA
OL
IL
I
OL
= 4mA
0.40
V
IH
A0 – A7
= MIN, I = I
-0.5
-1.2
100
1
V
IK
CC
CC
CC
CC
CC
I
IK
IK
Except A0 – A7
OEBn, OEA, LE
A0 – A7, B0 – B7
OEBn, OEA, LE
= MIN, I = I
V
I
I
I
Input current at
= 0.0V, V = 7.0V
µA
mA
µA
I
maximum input voltage
High–level input current
= MAX, V = 5.5V
I
I
IH
I
IL
= MAX, V = 2.7V, Bn –An =0V
20
I
B0 – B7
OEBn, OEA, LE
B0 – B7
V
V
V
= MAX, V = 2.1V
100
–20
µA
µA
µA
CC
I
Low–level input current
= MAX, V = 0.5V
I
CC
= MAX, V = 0.3V
–100
CC
CC
I
Off state output current,
high level voltage applied
µA
µA
µA
µA
mA
I
I
+ I
A0 – A7
A0 – A7
V
= MAX, V = 2.7V
70
–70
100
10
OZH
IH
O
Off state output current,
low level voltage applied
+ I
V
V
= MAX, V = 0.5V
O
OZL
IL
CC
= MAX, V = V , LE = OEA = OEBn =
CC
X
CC
–100
–10
2.7V, A0 – A7 = 2.7V, B0 – B7 = 2.0V,
I
X
High–level control current
V
CC
= MAX, V = 3.13 & 3.47V, LE = OEA =
X
2.7V, OEBn = A0 – A7 = 2.7V, B0 – B7 = 2.0V,
Short circuit output
current
V
CC
= MAX, Bn = 1.8V, OEA = 2.0V,
I
I
A0 – A7 only
-60
-150
OS
3
OEBn = 2.7V
I
V
V
= MAX
65
100
145
100
mA
mA
mA
CCH
CC
Supply current (total)
I
= MAX, V = 0.5V
100
75
CC
CCL
CC
IL
I
CCZ
Notes to DC electrical characteristics
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
Unless otherwise specified, V = V for all test conditions.
X
CC
2. All typical values are at V = 5V, T
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
= 25°C.
CC
amb
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
4. Due to test equipment limitations, actual test conditions are for V =1.8v and V = 1.3V.
IH
IL
7
December 19, 1990
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
AC ELECTRICAL CHARACTERISTICS
A PORT LIMITS
T
amb
= +25°C
T
amb
= 0°C to
T
amb
= –40°C to +85°C
+70°C
V
CC
= +5.0V ± 10%
V
CC
= +5.0V ± 10%
SYMBOL
PARAMETER
TEST
V
CC
= +5.0V
UNIT
CONDITION
C = 50pF,
R = 500Ω
L
C = 50pF,
R = 500Ω
L
C = 50pF,
L
R = 500Ω
L
L
L
MIN
TYP MAX
MIN
MAX
MIN
MAX
t
t
Propagation delay
Bn to An
5.5
4.5
8.0
6.0
12.0
9.0
5.5
4.5
12.0
9.0
5.5
4.5
12.0
9.0
PLH
PHL
Waveform 1
Waveform 3, 4
Waveform 3, 4
ns
ns
ns
t
t
Output enable time to high
or low, OEA to An
8.0
8.5
10.5
11.0
13.5
13.5
7.5
8.0
15.0
15.5
7.5
8.0
15.5
15.5
PZH
PZL
t
t
Output disable time from
high or low, OEA to An
2.0
2.0
3.5
4.5
6.0
7.0
1.5
2.0
6.5
7.5
1.5
2.0
6.5
7.5
PHZ
PLZ
B PORT LIMITS
T
= +25°C
T
= 0°C to
+70°C
= +5.0V ± 10%
T
= –40°C to +85°C
= +5.0V ± 10%
CC
amb
amb
amb
TEST
V
C
V
C
SYMBOL
PARAMETER
CONDITION
V
= +5.0V
UNIT
CC
CC
C
= 30pF, R = 9Ω
= 30pF, R = 9Ω
= 30pF, R = 9Ω
D U
D
U
D
U
MIN
TYP MAX
MIN
MAX
MIN
MAX
t
t
Propagation delay
An to Bn
3.0
3.0
5.0
4.5
7.0
7.5
2.5
2.5
8.0
8.5
2.0
2.5
9.0
8.5
PLH
PHL
Waveform 1
Waveform 1
Waveform 1
ns
ns
ns
ns
t
t
Propagation delay
LE to Bn
3.5
3.5
5.0
5.0
8.0
8.0
3.0
2.5
9.0
9.0
2.5
2.5
9.5
9.5
PLH
PHL
t
t
Enable/disable time
OEBn to An
3.0
3.5
4.5
5.5
7.0
9.0
2.5
3.5
8.0
10.0
2.5
3.5
8.5
10.5
PLH
PHL
t
t
Transition time, B port
1.3V to 1.7V, 1.7V to 1.3V
Test Circuit and
Waveforms
0.5
0.5
2.0
2.0
4.5
4.5
0.5
0.5
5.0
4.5
0.5
0.5
5.0
4.5
TLH
THL
AC SETUP REQUIREMENTS
LIMITS
T
= +25°C
= +5.0V
T
= 0°C to +70°C
= +5.0V ± 10%
T
= –40°C to +85°C
V = +5.0V ± 10%
CC
TEST
amb
amb
amb
V
SYMBOL
PARAMETER
CONDITION
V
UNIT
CC
CC
C = 50pF,
R = 500Ω
L
C = 50pF,
R = 500Ω
L
C = 50pF,
R = 500Ω
L
L
L
L
MIN
TYP MAX
MIN
MAX
MIN
MAX
t
su
t
su
(H)
(L)
Setup time, high or low
An to LE
3.5
4.5
4.5
5.0
4.5
5.0
Waveform 2
ns
t (H)
Hold time, high or low
An to LE
0.0
0.0
0.0
0.0
0.0
0.0
h
Waveform 2
Waveform 2
ns
ns
t
h
(L)
t
w
(L)
LE pulse width, low
4.0
5.0
5.0
AC WAVEFORMS
An, Bn, OEBn
V
V
M
M
An
LE
V
V
V
V
M
M
M
M
t (L)
h
t (H)
h
t (H)
s
t
t
PLH
PHL
t
w
(L)
t
su
(L)
V
An, Bn
V
M
V
M
V
V
M
M
M
SF00428
SF00427
Waveform 1. Propagation delay for data to output
Waveform 2. Data setup and hold times and LE pulse width
8
December 19, 1990
Philips Semiconductors
Product specification
Pi–bus transceiver
74F776
AC WAVEFORMS (Continued)
OEA
An
V
V
OEA
M
M
V
V
M
M
V
-0.3V
0V
OH
t
t
PLZ
PZL
t
t
PHZ
PZH
V
An
M
V
M
V
+0.3V
OL
SF00429
SF00430
Waveform 3. 3-state output enable time to high level and output
disable time from high level
Waveform 4. 3-state output enable time to low level and output
disable time from low level
Notes to AC waveforms
For all waveforms, V = 1.5V.
M
The shaded areas indicate when the input is permitted to change for predictable output performance.
TEST CIRCUIT AND WAVEFORMS
SWITCH POSITION
t
AMP (V)
low V
w
90%
90%
TEST
SWITCH
closed
open
NEGATIVE
PULSE
V
CC
V
V
M
M
t
, t
PLZ PZL
10%
10%
7.0V
All other
R
t
t
)
)
t
t )
L
THL ( f
TLH ( r
V
V
OUT
IN
PULSE
GENERATOR
D.U.T.
t
t
t
t )
TLH ( r
THL ( f
AMP (V)
low V
R
C
R
L
90%
M
90%
T
L
POSITIVE
PULSE
V
V
M
10%
10%
t
w
Test circuit for 3–State outputs on A port
V
7.0V
CC
Input pulse definition
INPUT PULSE REQUIREMENTS
R
family
U
V
V
OUT
IN
V
M
Low V
rep. rate
t
w
t
t
amplitude
TLH
THL
PULSE
D.U.T.
GENERATOR
A port
B port
3.0V
1.5V
1.0V
1MHz
500ns 2.5ns
500ns 4.0ns
2.5ns
4.0ns
0.0V
R
C
D
T
2.0V
1MHz
1.0V
Test circuit for outputs on B port
DEFINITIONS:
R
C
R
C
R
=
=
=
=
=
Load resistor; see AC electrical characteristics for value.
Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value.
Pull up resistor; see AC electrical characteristics for value.
L
L
U
D
T
Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value.
Termination resistance should be equal to Z
of pulse generators.
SF00431
OUT
9
December 19, 1990
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
DIP28: plastic dual in-line package; 28 leads (600 mil); long body
SOT117-2
10
1990 Dec 19
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
PLCC28: plastic leaded chip carrier; 28 leads
SOT261-2
11
1990 Dec 19
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 10-98
9397-750-05177
Document order number:
Philips
Semiconductors
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