NTB0102GD-Q100H [NXP]
NTB0102-Q100 - Dual supply translating transceiver; auto direction sensing; 3-state SON 8-Pin;
| 型号： | NTB0102GD-Q100H |
| 厂家： | 
NXP |
| 描述： | NTB0102-Q100 - Dual supply translating transceiver; auto direction sensing; 3-state SON 8-Pin |
| 文件： | 总23页 (文件大小：250K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NTB0102-Q100
Dual supply translating transceiver; auto direction sensing;
3-state
Rev. 1 — 18 April 2013
Product data sheet
1. General description
The NTB0102-Q100 is a 2-bit, dual supply translating transceiver with auto direction
sensing, that enables bidirectional voltage level translation. It features two 2-bit
input-output ports (An and Bn), one output enable input (OE) and two supply pins (VCC(A)
and VCC(B)). VCC(A) can be supplied with any voltage between 1.2 V and 3.6 V. VCC(B) can
be supplied with any voltage between 1.65 V and 5.5 V. This flexibility makes the device
suitable for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3
V and 5.0 V).
Pins An and OE are referenced to VCC(A) and pins Bn are referenced to VCC(B). A LOW
level at pin OE causes the outputs to assume a high-impedance OFF-state. This device is
fully specified for partial power-down applications using IOFF. The IOFF circuitry disables
the output, preventing the damaging backflow current through the device when it is
powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Wide supply voltage range:
VCC(A): 1.2 V to 3.6 V and VCC(B): 1.65 V to 5.5 V
IOFF circuitry provides partial Power-down mode operation
Inputs accept voltages up to 5.5 V
ESD protection:
MIL-STD-883, method 3015 Class 2 exceeds 2500 V for A port
MIL-STD-883, method 3015 Class 3B exceeds 15000 V for B port
HBM JESD22-A114E Class 2 exceeds 2500 V for A port
HBM JESD22-A114E Class 3B exceeds 15000 V for B port
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Latch-up performance exceeds 100 mA per JESD 78B Class II
Multiple package options
NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
Type number
Description
Version
NTB0102DP-Q100 40 C to +125 C
TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
SOT505-2
NTB0102GD-Q100 40 C to +125 C
XSON8
plastic extremely thin small outline package; no leads; SOT996-2
8 terminals; body 3 2 0.5 mm
4. Marking
Table 2.
Marking
Type number
Marking code[1]
NTB0102DP-Q100
NTB0102GD-Q100
t02
t02
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
6
OE
4
A2
1
B2
5
A1
8
B1
V
V
CC(B)
CC(A)
001aal914
Fig 1. Logic symbol
NTB0102_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 18 April 2013
2 of 23
NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
6. Pinning information
6.1 Pinning
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ꢑ
ꢒ
ꢏ
ꢐ
ꢀꢂ
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ꢃꢄꢅ
ꢆ
ꢇꢇꢈꢀꢉ
ꢂ
ꢁ
ꢍ
ꢎ
ꢑ
ꢒ
ꢏ
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ꢀꢂ
ꢆ
ꢋꢌ
ꢊꢂ
ꢇꢇꢈꢊꢉ
ꢃꢄꢅ
ꢆ
ꢇꢇꢈꢀꢉ
ꢊꢁ
ꢆ
ꢋꢌ
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Fig 2. Pin configuration SOT505-2 (TSSOP8)
Fig 3. Pin configuration SOT996-2 (XSON8)
6.2 Pin description
Table 3.
Symbol
B2, B1
GND
Pin description
Pin
1, 8
2
Description
data input or output (referenced to VCC(B)
)
)
ground (0 V)
VCC(A)
A2, A1
OE
3
supply voltage A
4, 5
6
data input or output (referenced to VCC(A)
output enable input (active HIGH; referenced to VCC(A)
supply voltage B
)
VCC(B)
n.c.
7
-
not connected
7. Functional description
Table 4.
Function table[1]
Supply voltage
VCC(A)
Input
OE
L
Input/output
VCC(B)
An
Bn
1.2 V to VCC(B)
1.2 V to VCC(B)
GND[2]
1.65 V to 5.5 V
1.65 V to 5.5 V
GND[2]
Z
Z
H
input or output
Z
output or input
Z
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
[2] When either VCC(A) or VCC(B) is at GND level, the device goes into Power-down mode.
NTB0102_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 18 April 2013
3 of 23
NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC(A)
VCC(B)
VI
Parameter
Conditions
Min
0.5
0.5
0.5
0.5
0.5
50
50
-
Max
+6.5
+6.5
+6.5
VCCO + 0.5
+6.5
-
Unit
V
supply voltage A
supply voltage B
input voltage
V
[1]
[1][2][3]
[1]
V
VO
output voltage
Active mode
V
Power-down or 3-state mode
VI < 0 V
V
IIK
input clamping current
output clamping current
output current
mA
mA
mA
mA
mA
C
mW
IOK
IO
VO < 0 V
-
[2]
VO = 0 V to VCCO
ICC(A) or ICC(B)
50
100
-
ICC
IGND
Tstg
Ptot
supply current
-
ground current
100
65
-
storage temperature
total power dissipation
+150
250
[4]
Tamb = 40 C to +125 C
[1] The minimum input and minimum output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] CCO is the supply voltage associated with the output.
V
[3] VCCO + 0.5 V should not exceed 6.5 V.
[4] For TSSOP8 package: above 55 C the value of Ptot derates linearly with 2.5 mW/K.
For XSON8 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
NTB0102_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 18 April 2013
4 of 23
NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
9. Recommended operating conditions
Table 6.
Symbol
VCC(A)
VCC(B)
VI
Recommended operating conditions[1][2]
Parameter
Conditions
Min
1.2
1.65
0
Max
3.6
Unit
V
supply voltage A
supply voltage B
input voltage
5.5
5.5
V
V
VO
output voltage
Power-down or 3-state mode;
CC(A) = 1.2 V to 3.6 V;
V
VCC(B) = 1.65 V to 5.5 V
A port
B port
0
3.6
V
0
5.5
V
Tamb
ambient temperature
40
+125
40
C
ns/V
t/V
input transition rise and fall rate VCC(A) = 1.2 V to 3.6 V;
VCC(B) = 1.65 V to 5.5 V
-
[1] The A and B sides of an unused I/O pair must be held in the same state, both at VCCI or both at GND.
[2] VCC(A) must be less than or equal to VCC(B)
.
10. Static characteristics
Table 7.
Typical static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VOH
VOL
II
HIGH-level
output voltage
A port; VCC(A) = 1.2 V; IO = 20 A
-
1.1
-
V
LOW-level
output voltage
A port; VCC(A) = 1.2 V; IO = 20 A
-
-
-
-
-
0.09
-
V
input leakage
current
OE input; VI = 0 V to 3.6 V; VCC(A) = 1.2 V to 3.6 V;
VCC(B) = 1.65 V to 5.5 V
-
-
-
-
1
1
1
1
A
A
A
A
[1]
IOZ
IOFF
OFF-stateoutput A or B port; VO = 0 V to VCCO; VCC(A) = 1.2 V to 3.6 V;
current
VCC(B) = 1.65 V to 5.5 V
power-off
A port; VI or VO = 0 V to 3.6 V;
leakage current VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V
B port; VI or VO = 0 V to 5.5 V;
V
CC(B) = 0 V; VCC(A) = 0 V to 3.6 V
[2]
ICC
supply current
VI = 0 V or VCCI; IO = 0 A
ICC(A); VCC(A) = 1.2 V; VCC(B) = 1.65 V to 5.5 V
ICC(B); VCC(A) = 1.2 V; VCC(B) = 1.65 V to 5.5 V
ICC(A) + ICC(B); VCC(A) = 1.2 V; VCC(B) = 1.65 V to 5.5 V
OE input; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V
-
-
-
-
0.05
3.3
3.5
1.0
-
-
-
-
A
A
A
pF
CI
input
capacitance
CI/O
input/output
capacitance
A port; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V
B port; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V
-
-
4.0
7.5
-
-
pF
pF
[1] VCCO is the supply voltage associated with the output.
[2] VCCI is the supply voltage associated with the input.
NTB0102_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 18 April 2013
5 of 23
NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
Table 8.
Typical supply current
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C.
VCC(A)
VCC(B)
1.8 V
ICC(A)
10
Unit
2.5 V
ICC(A)
10
3.3 V
ICC(A)
10
5.0 V
ICC(A)
10
ICC(B)
10
10
10
-
ICC(B)
10
10
10
10
-
ICC(B)
20
ICC(B)
1050
650
350
40
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
nA
nA
nA
nA
nA
10
10
10
10
10
10
10
10
10
10
-
10
10
10
10
-
-
-
10
10
10
10
Table 9.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C
Unit
Min
Max
Min
Max
[1]
[1]
[2]
VIH
HIGH-level
input voltage
A or B port and OE input
VCC(A) = 1.2 V to 3.6 V;
VCC(B) = 1.65 V to 5.5 V
0.65VCCI
-
0.65VCCI
-
V
V
VIL
LOW-level
input voltage
A or B port and OE input
VCC(A) = 1.2 V to 3.6 V;
VCC(B) = 1.65 V to 5.5 V
-
0.35VCCI
-
0.35VCCI
VOH
HIGH-level
IO = 20 A
output voltage
A port; VCC(A) = 1.4 V to 3.6 V
B port; VCC(B) = 1.65 V to 5.5 V
IO = 20 A
VCCO 0.4
VCCO 0.4
-
-
VCCO 0.4
VCCO 0.4
-
-
V
V
[2]
VOL
LOW-level
output voltage
A port; VCC(A) = 1.4 V to 3.6 V
B port; VCC(B) = 1.65 V to 5.5 V
-
-
-
0.4
0.4
2
-
-
-
0.4
0.4
5
V
V
II
input leakage OE input; VI = 0 V to 3.6 V;
A
current
VCC(A) = 1.2 V to 3.6 V;
VCC(B) = 1.65 V to 5.5 V
[2]
IOZ
OFF-state
A or B port; VO = 0 V or VCCO
;
-
2
-
10
A
output current
VCC(A) = 1.2 V to 3.6 V;
VCC(B) = 1.65 V to 5.5 V
IOFF
power-off
leakage
current
A port; VI or VO = 0 V to 3.6 V;
VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V
-
-
2
2
-
-
10
10
A
A
B port; VI or VO = 0 V to 5.5 V;
V
CC(B) = 0 V; VCC(A) = 0 V to 3.6 V
NTB0102_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 18 April 2013
6 of 23
NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
Table 9.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C
40 C to +125 C
Unit
Min
Max
Min
Max
[1]
ICC
supply current VI = 0 V or VCCI; IO = 0 A
ICC(A)
OE = LOW;
VCC(A) = 1.4 V to 3.6 V;
-
-
3
3
-
-
15
20
A
A
V
CC(B) = 1.65 V to 5.5 V
OE = HIGH;
VCC(A) = 1.4 V to 3.6 V;
V
CC(B) = 1.65 V to 5.5 V
V
CC(A) = 3.6 V; VCC(B) = 0 V
-
-
2
-
-
15
A
A
VCC(A) = 0 V; VCC(B) = 5.5 V
ICC(B)
2
15
OE = LOW;
VCC(A) = 1.4 V to 3.6 V;
VCC(B) = 1.65 V to 5.5 V
-
-
5
5
-
-
15
20
A
A
OE = HIGH;
V
CC(A) = 1.4 V to 3.6 V;
VCC(B) = 1.65 V to 5.5 V
VCC(A) = 3.6 V; VCC(B) = 0 V
VCC(A) = 0 V; VCC(B) = 5.5 V
CC(A) + ICC(B)
-
-
2
-
-
15
A
A
2
15
I
VCC(A) = 1.4 V to 3.6 V;
VCC(B) = 1.65 V to 5.5 V
-
8
-
40
A
[1] VCCI is the supply voltage associated with the input.
[2] VCCO is the supply voltage associated with the output.
11. Dynamic characteristics
Table 10. Typical dynamic characteristics for temperature 25 C[1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6; for waveforms see Figure 4 and Figure 5.
Symbol Parameter
Conditions
VCC(B)
Unit
1.8 V
2.5 V
3.3 V
5.0 V
VCC(A) = 1.2 V; Tamb = 25 C
tpd
propagation delay A to B
5.9
5.6
0.5
6.9
9.5
81
4.8
4.8
0.5
6.9
8.6
69
4.4
4.5
0.5
6.9
8.5
83
4.2
4.4
0.5
6.9
8.0
68
ns
ns
s
ns
ns
ns
ns
ns
ns
B to A
ten
enable time
disable time
OE to A, B
[2]
[2]
tdis
OE to A; no external load
OE to B; no external load
OE to A
OE to B
81
69
83
68
tt
transition time
A port
4.0
2.6
4.0
2.0
4.1
1.7
4.1
1.4
B port
NTB0102_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 18 April 2013
7 of 23
NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
Table 10. Typical dynamic characteristics for temperature 25 C[1] …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6; for waveforms see Figure 4 and Figure 5.
Symbol Parameter
Conditions
VCC(B)
Unit
1.8 V
0.2
15
2.5 V
0.2
13
3.3 V
0.2
13
5.0 V
0.2
13
[3]
tsk(o)
tW
output skew time
between channels
data inputs
ns
pulse width
data rate
ns
fdata
70
80
80
80
Mbps
[1] tpd is the same as tPLH and tPHL
ten is the same as tPZL and tPZH
tdis is the same as tPLZ and tPHZ
tt is the same as tTHL and tTLH
.
.
.
[2] Delay between OE going LOW and when the outputs are actually disabled.
[3] Skew between any two outputs of the same package switching in the same direction.
Table 11. Dynamic characteristics for temperature range 40 C to +85 C[1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6; for wave forms see Figure 4 and Figure 5.
Symbol Parameter
Conditions
VCC(B)
Unit
1.8 V 0.15 V 2.5 V 0.2 V 3.3 V 0.3 V 5.0 V 0.5 V
Min
Max Min Max Min Max Min Max
VCC(A) = 1.5 V 0.1 V
tpd
propagation
delay
A to B
1.4
0.9
-
12.9
14.2
1.0
1.2
0.7
-
10.1
12.0
1.0
1.1
0.4
-
10.0
11.7
1.0
0.8
0.3
-
9.9 ns
B to A
13.7 ns
1.0 s
11.9 ns
13.8 ns
280 ns
200 ns
5.1 ns
2.7 ns
0.5 ns
ten
enable time
OE to A, B
[2]
[2]
tdis
disable time OE to A; no external load
1.0
1.0
-
11.9
16.9
320
200
5.1
1.0
1.0
-
11.9
15.2
260
200
5.1
1.0
1.0
-
11.9
14.1
260
200
5.1
1.0
1.0
-
OE to B; no external load
OE to A
OE to B
-
-
-
-
tt
transition
time
A port
B port
0.9
0.9
-
0.9
0.6
-
0.9
0.5
-
0.9
0.4
-
4.7
3.2
2.5
[3]
tsk(o)
output skew between channels
time
0.5
0.5
0.5
tW
pulse width
data rate
data inputs
25
-
-
25
-
-
25
-
-
25
-
-
ns
fdata
40
40
40
40 Mbps
VCC(A) = 1.8 V 0.15 V
tpd
propagation
delay
A to B
1.6
1.5
-
11.0
12.0
1.0
1.4
1.3
-
7.7
8.4
1.3
1.0
-
6.8
7.6
1.2
0.9
-
6.5 ns
7.1 ns
1.0 s
11.0 ns
12.1 ns
230 ns
200 ns
4.1 ns
2.7 ns
B to A
ten
enable time
OE to A, B
1.0
1.0
[2]
[2]
tdis
disable time OE to A; no external load
1.0
1.0
-
11.0
15.4
260
200
4.1
1.0
1.0
-
11.0
13.5
230
200
4.1
1.0
1.0
-
11.0
12.4
230
200
4.1
1.0
1.0
-
OE to B; no external load
OE to A
OE to B
-
-
-
-
tt
transition
time
A port
B port
0.8
0.9
0.8
0.6
0.8
0.5
0.8
0.4
4.7
3.2
2.5
NTB0102_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 18 April 2013
8 of 23
NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
Table 11. Dynamic characteristics for temperature range 40 C to +85 C[1] …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6; for wave forms see Figure 4 and Figure 5.
Symbol Parameter
Conditions
VCC(B)
Unit
1.8 V 0.15 V 2.5 V 0.2 V 3.3 V 0.3 V 5.0 V 0.5 V
Min
Max Min Max Min Max Min Max
[3]
tsk(o)
output skew between channels
time
-
0.5
-
0.5
-
0.5
-
0.5 ns
tW
pulse width
data rate
data inputs
20
-
-
17
-
-
17
-
-
17
-
-
ns
fdata
49
60
60
60 Mbps
VCC(A) = 2.5 V 0.2 V
tpd
propagation
delay
A to B
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.1
1.2
-
6.3
6.6
1.0
9.2
11.9
200
200
3.0
3.2
0.5
1.0
1.1
-
5.2
5.1
1.0
0.9
0.9
-
4.7 ns
4.4 ns
1.0 s
9.2 ns
10.2 ns
200 ns
200 ns
3.0 ns
2.7 ns
0.5 ns
B to A
ten
enable time
OE to A, B
[2]
[2]
tdis
disable time OE to A; no external load
1.0
1.0
-
1.0
1.0
-
9.2
1.0
1.0
-
OE to B; no external load
OE to A
10.7
200
200
3.0
2.5
0.5
OE to B
-
-
-
tt
transition
time
A port
B port
0.7
0.7
-
0.7
0.5
-
0.7
0.4
-
[3]
tsk(o)
output skew between channels
time
tW
pulse width
data rate
data inputs
-
-
-
-
12
-
-
10
-
-
10
-
-
ns
fdata
85
100
100 Mbps
VCC(A) = 3.3 V 0.3 V
tpd
propagation
delay
A to B
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.9
1.0
-
4.7
4.9
1.0
0.8
0.9
-
4.0 ns
3.8 ns
1.0 s
9.2 ns
9.6 ns
260 ns
200 ns
2.5 ns
2.7 ns
0.5 ns
B to A
ten
enable time
OE to A, B
[2]
[2]
tdis
disable time OE to A; no external load
1.0
1.0
-
9.2
1.0
1.0
-
OE to B; no external load
OE to A
10.1
260
200
2.5
OE to B
-
-
tt
transition
time
A port
B port
0.7
0.5
-
0.7
0.4
-
2.5
[3]
tsk(o)
output skew between channels
time
0.5
tW
pulse width
data rate
data inputs
-
-
-
-
-
-
-
-
10
-
-
10
-
-
ns
fdata
100
100 Mbps
[1] tpd is the same as tPLH and tPHL
ten is the same as tPZL and tPZH
tdis is the same as tPLZ and tPHZ
tt is the same as tTHL and tTLH
[2] Delay between OE going LOW and when the outputs are actually disabled.
[3] Skew between any two outputs of the same package switching in the same direction.
.
.
.
.
NTB0102_Q100
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Product data sheet
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NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
Table 12. Dynamic characteristics for temperature range 40 C to +125 C[1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6; for wave forms see Figure 4 and Figure 5.
Symbol Parameter
Conditions
VCC(B)
Unit
1.8 V 0.15 V 2.5 V 0.2 V 3.3 V 0.3 V 5.0 V 0.5 V
Min
Max Min Max Min Max Min Max
VCC(A) = 1.5 V 0.1 V
tpd
propagation
delay
A to B
1.4
0.9
-
15.9
17.2
1.0
1.2
0.7
-
13.1
15.0
1.0
1.1
0.4
-
13.0
14.7
1.0
0.8
0.3
-
12.9 ns
B to A
16.7 ns
1.0 s
12.5 ns
14.6 ns
300 ns
220 ns
7.1 ns
4.7 ns
0.5 ns
ten
enable time
OE to A, B
[2]
[2]
tdis
disable time OE to A; no external load
1.0
1.0
-
12.5
18.1
340
220
7.1
1.0
1.0
-
12.5
16.2
280
220
7.1
1.0
1.0
-
12.5
14.9
280
220
7.1
1.0
1.0
-
OE to B; no external load
OE to A
OE to B
-
-
-
-
tt
transition
time
A port
B port
0.9
0.9
-
0.9
0.6
-
0.9
0.5
-
0.9
0.4
-
6.5
5.2
4.8
[3]
tsk(o)
output skew between channels
time
0.5
0.5
0.5
tW
pulse width
data rate
data inputs
25
-
-
25
-
-
25
-
-
25
-
-
ns
fdata
40
40
40
40 Mbps
VCC(A) = 1.8 V 0.15 V
tpd
propagation
delay
A to B
1.6
1.5
-
14.0
15.0
1.0
1.4
1.3
-
10.7
11.4
1.0
1.3
1.0
-
9.8
10.6
1.0
1.2
0.9
-
9.5 ns
10.1 ns
1.0 s
11.5 ns
12.7 ns
250 ns
220 ns
6.1 ns
4.7 ns
0.5 ns
B to A
ten
enable time
OE to A, B
[2]
[2]
tdis
disable time OE to A; no external load
1.0
1.0
-
11.5
16.5
280
220
6.2
1.0
1.0
-
11.5
14.5
250
220
6.1
1.0
1.0
-
11.5
13.3
250
220
6.1
1.0
1.0
-
OE to B; no external load
OE to A
OE to B
-
-
-
-
tt
transition
time
A port
B port
0.8
0.9
-
0.8
0.6
-
0.8
0.5
-
0.8
0.4
-
5.8
5.2
4.8
[3]
tsk(o)
output skew between channels
time
0.5
0.5
0.5
tW
pulse width
data rate
data inputs
22
-
-
19
-
-
19
-
-
19
-
-
ns
fdata
45
55
55
55 Mbps
VCC(A) = 2.5 V 0.2 V
tpd
propagation
delay
A to B
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.1
1.2
-
9.3
9.6
1.0
1.1
-
8.2
8.1
0.9
0.9
-
7.7 ns
7.4 ns
1.0 s
9.6 ns
10.8 ns
220 ns
220 ns
5.0 ns
4.7 ns
B to A
ten
enable time
OE to A, B
1.0
1.0
[2]
[2]
tdis
disable time OE to A; no external load
1.0
1.0
-
9.6
1.0
1.0
-
9.6
1.0
1.0
-
OE to B; no external load
OE to A
12.6
220
220
5.0
11.4
220
220
5.0
OE to B
-
-
-
tt
transition
time
A port
B port
0.7
0.7
0.7
0.5
0.7
0.4
4.6
4.8
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Product data sheet
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NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
Table 12. Dynamic characteristics for temperature range 40 C to +125 C[1] …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6; for wave forms see Figure 4 and Figure 5.
Symbol Parameter
Conditions
VCC(B)
Unit
1.8 V 0.15 V 2.5 V 0.2 V 3.3 V 0.3 V 5.0 V 0.5 V
Min
Max Min Max Min Max Min Max
[3]
tsk(o)
output skew between channels
time
-
-
-
0.5
-
0.5
-
0.5 ns
tW
pulse width
data rate
data inputs;
-
-
-
-
14
-
-
13
-
-
10
-
-
ns
fdata
75
80
100 Mbps
VCC(A) = 3.3 V 0.3 V
tpd
propagation
delay
A to B
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.9
1.0
-
7.7
7.9
1.0
0.8
0.9
-
7.0 ns
6.8 ns
1.0 s
9.5 ns
9.6 ns
280 ns
220 ns
4.5 ns
4.7 ns
0.5 ns
B to A
ten
enable time
OE to A, B
[2]
[2]
tdis
disable time OE to A; no external load
1.0
1.0
-
9.5
1.0
1.0
-
OE to B; no external load
OE to A
10.7
280
220
4.5
OE to B
-
-
tt
transition
time
A port
B port
0.7
0.5
-
0.7
0.4
-
4.1
[3]
tsk(o)
output skew between channels
time
0.5
tW
pulse width
data rate
data inputs
-
-
-
-
-
-
-
-
10
-
-
10
-
-
ns
fdata
100
100 Mbps
[1] tpd is the same as tPLH and tPHL
ten is the same as tPZL and tPZH
.
.
tdis is the same as tPLZ and tPHZ
.
tt is the same as tTHL and tTLH.
[2] Delay between OE going LOW and when the outputs are actually disabled.
[3] Skew between any two outputs of the same package switching in the same direction.
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NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
Table 13. Typical power dissipation capacitance
Voltages are referenced to GND (ground = 0 V).[1][2]
Symbol Parameter
Conditions
VCC(A)
1.8 V
VCC(B)
1.8 V
Unit
1.2 V
1.8 V
1.2 V
5.0 V
1.5 V
1.8 V
2.5 V
2.5 V
2.5 V
5.0 V
3.3 V
3.3 V
to
5.0 V
Tamb = 25 C
CPD
power
dissipation
capacitance
outputs enabled; OE = VCC(A)
A port: (direction A to B)
A port: (direction B to A)
B port: (direction A to B)
B port: (direction B to A)
outputs disabled; OE = GND
A port: (direction A to B)
A port: (direction B to A)
B port: (direction A to B)
B port: (direction B to A)
5
8
5
8
5
8
5
8
5
8
5
8
5
8
pF
pF
pF
pF
18
13
18
16
18
12
18
12
18
12
18
12
18
13
0.12
0.01
0.01
0.07
0.12
0.01
0.01
0.09
0.04
0.01
0.01
0.07
0.05
0.01
0.01
0.07
0.08
0.01
0.01
0.05
0.08
0.01
0.01
0.09
0.07 pF
0.01 pF
0.01 pF
0.09 pF
[1] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of the outputs.
[2] fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = .
12. Waveforms
V
I
An, Bn
input
V
M
GND
t
t
PHL
PLH
V
OH
90 %
Bn, An
output
V
M
10 %
V
OL
t
t
THL
TLH
001aal918
Measurement points are given in Table 14.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 4. Data input (An, Bn) to data output (Bn, An) propagation delay times
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Dual supply translating transceiver; auto direction sensing; 3-state
V
I
OE input
V
M
GND
t
t
PLZ
PZL
V
CCO
output
V
LOW-to-OFF
OFF-to-LOW
M
V
X
V
OL
t
t
PHZ
PZH
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
disabled
outputs
enabled
001aal919
Measurement points are given in Table 14.
OL and VOH are typical output voltage levels that occur with the output load.
V
Fig 5. Enable and disable times
Table 14. Measurement points[1]
Supply voltage
VCCO
Input
Output
VM
VM
VX
VY
1.2 V
0.5VCCI
0.5VCCI
0.5VCCI
0.5VCCI
0.5VCCI
0.5VCCI
0.5VCCO
0.5VCCO
0.5VCCO
0.5VCCO
0.5VCCO
0.5VCCO
VOL + 0.1 V
VOL + 0.1 V
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
VOH 0.1 V
VOH 0.1 V
VOH 0.15 V
VOH 0.15 V
VOH 0.3 V
VOH 0.3 V
1.5 V 0.1 V
1.8 V 0.15 V
2.5 V 0.2 V
3.3 V 0.3 V
5.0 V 0.5 V
[1] VCCI is the supply voltage associated with the input and VCCO is the supply voltage associated with the output.
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NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
EXT
V
CC
R
L
V
V
O
I
G
DUT
C
L
R
L
001aal920
Test data is given in Table 15.
All input pulses are supplied by generators having the following characteristics: PRR 10 MHz; ZO = 50 ; dV/dt 1.0 V/ns.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
V
EXT = External voltage for measuring switching times.
Fig 6. Test circuit for measuring switching times
Table 15. Test data
Supply voltage
VCC(A) VCC(B)
Input
VI[1]
Load
CL
VEXT
[2]
[3]
t/V
RL
tPLH, tPHL tPZH, tPHZ tPZL, tPLZ
1.2 V to 3.6 V 1.65 V to 5.5 V VCCI
1.0 ns/V
15 pF
50 k, 1 M open
open
2VCCO
[1] VCCI is the supply voltage associated with the input.
[2] For measuring data rate, pulse width, propagation delay and output rise and fall measurements, RL = 1 M; for measuring enable and
disable times, RL = 50 k.
[3] VCCO is the supply voltage associated with the output.
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Dual supply translating transceiver; auto direction sensing; 3-state
13. Application information
13.1 Applications
Voltage level-translation applications. The NTB0102-Q100 can be used to interface
between devices or systems operating at different supply voltages. See Figure 7 for a
typical operating circuit using the NTB0102-Q100.
ꢂ"ꢑꢛꢆ
ꢍ"ꢍꢛꢆ
ꢂ"ꢑꢛꢆ
ꢆ
ꢆ
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#$#ꢓꢌ%
("ꢂꢛ3*
("ꢂꢛ3*
ꢇꢇꢈꢊꢉ
ꢇꢇꢈꢀꢉ
#$#ꢓꢌ%
ꢇꢋꢄꢓ&ꢋ''ꢌ&
ꢋꢌ
ꢀꢁꢂꢃꢄꢃꢅꢆꢇꢄꢃꢃ
ꢊꢂ
ꢊꢁ
ꢀꢂ
ꢀꢁ
ꢅꢊꢓꢊ
ꢅꢊꢓꢊ
ꢃꢄꢅ
ꢀꢀꢀꢁꢂꢂꢃꢄꢂꢆ
Fig 7. Typical operating circuit
NTB0102_Q100
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NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
13.2 Architecture
The architecture of the NTB0102-Q100 is shown in Figure 8. The device does not require
an extra input signal to control the direction of data flow from A to B or from B to A. In a
static state, the output drivers of the NTB0102-Q100 can maintain a defined output level.
However, the output architecture is designed to be weak. This design enables an external
driver to override the drivers when data on the bus starts flowing in the opposite direction.
The output of one-shot circuits detect rising or falling edges on the A or B ports. During a
rising edge, the one-shot circuits turn on the PMOS transistors (T1, T3) for a short
duration, accelerating the LOW-to-HIGH transition. Similarly, during a falling edge, the
one-shot circuits turn on the NMOS transistors (T2, T4) for a short duration, accelerating
the HIGH-to-LOW transition. During output transitions, the typical output impedance is
70 at VCCO = 1.2 V to 1.8 V, 50 at VCCO = 1.8 V to 3.3 V and 40 at VCCO = 3.3 V to
5.0 V.
V
V
CC(B)
CC(A)
ONE
SHOT
T1
4 kΩ
T2
ONE
SHOT
B
A
ONE
SHOT
T3
4 kΩ
T4
ONE
SHOT
001aal921
Fig 8. Architecture of NTB0102-Q100 I/O cell (one channel)
NTB0102_Q100
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NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
13.3 Input driver requirements
For correct operation, the device driving the data I/Os of the NTB0102-Q100 must have a
minimum drive capability of 2 mA. See Figure 9 for a plot of typical input current versus
input voltage.
I
I
V /4 kΩ
T
V
I
−(V − V )/4 kΩ
D
T
001aal922
VT: input threshold voltage of the NTB0102-Q100 (typically VCCI / 2).
VD: supply voltage of the external driver.
Fig 9. Typical input current versus input voltage graph
13.4 Power-up
During operation, VCC(A) must never be higher than VCC(B). However, during power-up,
VCC(A) VCC(B) does not damage the device, so either power supply can be ramped up
first. There is no special power-up sequencing required. The NTB0102-Q100 includes
circuitry that disables all output ports when either VCC(A) or VCC(B) is switched off.
13.5 Enable and disable
An output enable input (OE) is used to disable the device. Setting OE = LOW causes all
I/Os to assume the high-impedance OFF-state. The disable time (tdis with no external
load) indicates the delay between when OE goes LOW and when outputs actually
become disabled. The enable time (ten) indicates the amount of time that must be allowed
for the one one-shot circuitry to become operational after OE is taken HIGH. To ensure the
high-impedance OFF-state during power-up or power-down, pin OE should be tied to
GND through a pull-down resistor. The current-sourcing capability of the driver determines
the minimum value of the resistor.
13.6 Pull-up or pull-down resistors on I/O lines
As mentioned previously the NTB0102-Q100 is designed with low static drive strength to
drive capacitive loads of up to 70 pF. To avoid output contention issues, any pull-up or
pull-down resistors used must be above 50 k. For this reason, the NTB0102 is not
recommended for use in open-drain driver applications such as 1-Wire or I2C-bus. For
these applications, the NTS0102-Q100 level translator is recommended.
NTB0102_Q100
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Product data sheet
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17 of 23
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NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
14. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
SOT505-2
D
E
A
X
c
H
v
M
y
A
E
Z
5
8
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
detail X
1
4
e
w
M
b
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
A
A
A
b
c
D
E
e
H
E
L
L
p
UNIT
v
w
y
Z
θ
1
2
3
p
max.
0.15
0.00
0.95
0.75
0.38
0.22
0.18
0.08
3.1
2.9
3.1
2.9
4.1
3.9
0.47
0.33
0.70
0.35
8°
0°
mm
1.1
0.65
0.25
0.5
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-01-16
SOT505-2
- - -
Fig 10. Package outline SOT505-2 (TSSOP8)
NTB0102_Q100
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NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
XSON8: plastic extremely thin small outline package; no leads;
8 terminals; body 3 x 2 x 0.5 mm
SOT996-2
D
B
A
E
A
A
1
detail X
terminal 1
index area
e
1
C
v
C
C
A
B
b
e
L
1
y
1
y
w
C
1
4
L
2
L
8
5
X
0
1
2 mm
scale
Dimensions (mm are the original dimensions)
(1)
Unit
A
A
1
b
D
E
e
e
1
L
L
1
L
2
v
w
y
y
1
max
mm nom 0.5
min
0.05 0.35 2.1 3.1
0.00 0.15 1.9 2.9
0.5 0.15 0.6
0.3 0.05 0.4
0.5 1.5
0.1 0.05 0.05 0.1
sot996-2_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
07-12-21
12-11-20
SOT996-2
Fig 11. Package outline SOT996-2 (XSON8)
NTB0102_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 18 April 2013
19 of 23
NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
15. Abbreviations
Table 16. Abbreviations
Acronym
CDM
DUT
Description
Charged Device Model
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MIL
Military
MM
Machine Model
NMOS
PMOS
PRR
N-type Metal Oxide Semiconductor
P-type Metal Oxide Semiconductor
Pulse Repetition Rate
16. Revision history
Table 17. Revision history
Document ID
Release date
20130418
Data sheet status
Change notice
Supersedes
NTB0102_Q100 v.1
Product data sheet
-
-
NTB0102_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 18 April 2013
20 of 23
NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use in automotive applications — This NXP
17.2 Definitions
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
17.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
NTB0102_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 18 April 2013
21 of 23
NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NTB0102_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 18 April 2013
22 of 23
NTB0102-Q100
NXP Semiconductors
Dual supply translating transceiver; auto direction sensing; 3-state
19. Contents
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
8
9
10
11
12
13
Application information. . . . . . . . . . . . . . . . . . 15
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Input driver requirements . . . . . . . . . . . . . . . . 17
Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Enable and disable. . . . . . . . . . . . . . . . . . . . . 17
Pull-up or pull-down resistors on I/O lines . . . 17
13.1
13.2
13.3
13.4
13.5
13.6
14
15
16
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 20
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 20
17
Legal information. . . . . . . . . . . . . . . . . . . . . . . 21
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
17.1
17.2
17.3
17.4
18
19
Contact information. . . . . . . . . . . . . . . . . . . . . 22
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 18 April 2013
Document identifier: NTB0102_Q100
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