NX3L2T384GT [NXP]
Dual low-ohmic single-pole single-throw analog switch; 双低电阻单刀单掷模拟开关
| 型号： | NX3L2T384GT |
| 厂家： | 
NXP |
| 描述： | Dual low-ohmic single-pole single-throw analog switch |
| 文件： | 总20页 (文件大小：172K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NX3L2T384
Dual low-ohmic single-pole single-throw analog switch
Rev. 3 — 7 November 2011
Product data sheet
1. General description
The NX3L2T384 is a dual low-ohmic single-pole single-throw analog switch. Each switch
has two input/output terminals (nY and nZ) and an active LOW enable input (nE). When
pin nE is HIGH, the analog switch is turned off.
Schmitt trigger action at the enable input (nE) makes the circuit tolerant to slower input
rise and fall times. A low input voltage threshold allows pin nE to be driven by lower level
logic signals without a significant increase in supply current ICC. This makes it possible for
the NX3L2T384 to switch 4.3 V signals with a 1.8 V digital controller, eliminating the need
for logic level translation.
The NX3L2T384 allows signals with amplitude up to VCC to be transmitted from nY to nZ;
or from nZ to nY. Its low ON resistance (0.5 ) and flatness (0.13 ) ensures minimal
attenuation and distortion of transmitted signals.
2. Features and benefits
Wide supply voltage range from 1.4 V to 4.3 V
Very low ON resistance (peak):
1.6 (typical) at VCC = 1.4 V
1.0 (typical) at VCC = 1.65 V
0.55 (typical) at VCC = 2.3 V
0.50 (typical) at VCC = 2.7 V
0.50 (typical) at VCC = 4.3 V
High noise immunity
ESD protection:
HBM JESD22-A114F Class 3A exceeds 7500 V
MM JESD22-A115-A exceeds 200 V
CDM AEC-Q100-011 revision B exceeds 1000 V
IEC61000-4-2 contact discharge exceeds 4000 V for switch ports
CMOS low-power consumption
Latch-up performance exceeds 100 mA per JESD 78B Class II Level A
1.8 V control logic at VCC = 3.6 V
Control input accepts voltages above supply voltage
Very low supply current, even when input is below VCC
High current handling capability (350 mA continuous current under 3.3 V supply)
Specified from 40 C to +85 C and from 40 C to +125 C
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
3. Applications
Cell phone
PDA
Portable media player
4. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
NX3L2T384GT
NX3L2T384GD
NX3L2T384GM
40 C to +125 C
40 C to +125 C
40 C to +125 C
XSON8 plastic extremely thin small outline package; no leads; SOT833-1
8 terminals; body 1 1.95 0.5 mm
XSON8U plastic extremely thin small outline package; no leads; SOT996-2
8 terminals; UTLP based; body 3 2 0.5 mm
XQFN8
plastic extremely thin quad flat package; no leads;
SOT902-1
8 terminals; body 1.6 1.6 0.5 mm
5. Marking
Table 2.
Marking codes[1]
Type number
NX3L2T384GT
NX3L2T384GD
NX3L2T384GM
Marking code
M84
M84
M84
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
6. Functional diagram
1Y
1E
2Z
1Z
2Y
Y
E
Z
2E
001aai828
001aai598
Fig 1. Logic symbol
Fig 2. Logic diagram (one switch)
NX3L2T384
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 7 November 2011
2 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
7. Pinning information
7.1 Pinning
NX3L2T384
1Y
1Z
1
2
3
4
8
7
6
5
V
CC
NX3L2T384
1Y
1Z
1
2
3
4
8
7
6
5
V
CC
1E
2Z
2Y
1E
2Z
2Y
2E
2E
GND
GND
001aaj988
001aaj989
Transparent top view
Transparent top view
Fig 3. Pin configuration SOT833-1 (XSON8)
Fig 4. Pin configuration SOT996-2 (XSON8U)
NX3L2T384
terminal 1
index area
1E
1
7
6
5
1Y
1Z
2E
2Z
2Y
2
3
001aaj990
Transparent top view
Fig 5. Pin configuration SOT902-1 (XQFN8U)
7.2 Pin description
Table 3.
Symbol
Pin description
Pin
Description
SOT833-1 and SOT996-2
SOT902-1
1Y, 2Y
1Z, 2Z
GND
1, 5
2, 6
4
7, 3
6, 2
4
independent input or output
independent input or output
ground (0 V)
1E, 2E
VCC
7, 3
8
1, 5
8
enable input (active HIGH)
supply voltage
NX3L2T384
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 7 November 2011
3 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
8. Functional description
Table 4.
Function table[1]
Input nE
Switch
L
ON-state
OFF-state
H
[1] H = HIGH voltage level; L = LOW voltage level.
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
enable input nE
VI < 0.5 V
Min
0.5
0.5
0.5
50
-
Max
+4.6
+4.6
VCC + 0.5
-
Unit
V
supply voltage
input voltage
[1]
[2]
V
VSW
IIK
switch voltage
input clamping current
V
mA
mA
mA
ISK
switch clamping current VI < 0.5 V or VI > VCC + 0.5 V
50
ISW
switch current
VSW > 0.5 V or VSW < VCC + 0.5 V;
-
350
source or sink current
VSW > 0.5 V or VSW < VCC + 0.5 V;
pulsed at 1 ms duration, < 10 % duty cycle;
peak current
-
500
mA
Tstg
Ptot
storage temperature
total power dissipation
65
+150
250
C
[3]
Tamb = 40 C to +125 C
-
mW
[1] The minimum input voltage rating may be exceeded if the input current rating is observed.
[2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not
exceed 4.6 V.
[3] For XSON8, XSON8U and XQFN8U packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
10. Recommended operating conditions
Table 6.
Recommended operating conditions
Symbol Parameter
Conditions
Min
1.4
0
Typ
Max
4.3
Unit
V
VCC
VI
supply voltage
-
-
-
-
-
input voltage
enable input nE
4.3
V
[1]
[2]
VSW
Tamb
t/V
switch voltage
0
VCC
+125
200
V
ambient temperature
input transition rise and fall rate
40
-
C
ns/V
VCC = 1.4 V to 4.3 V
[1] To avoid sinking GND current from terminal nZ when switch current flows in terminal nY, the voltage drop across the bidirectional switch
must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current will flow from terminal nY. In this case, there is no
limit for the voltage drop across the switch.
[2] Applies to control signal levels.
NX3L2T384
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 7 November 2011
4 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
11. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter
Conditions
Tamb = 25 C
Tamb = 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Max
(85 C) (125 C)
VIH
HIGH-level
input voltage
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
0.9
0.9
1.1
1.3
1.4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.9
0.9
1.1
1.3
1.4
-
-
-
-
-
V
V
V
V
V
V
V
V
V
V
A
-
-
-
-
-
-
-
-
-
VIL
LOW-level
input voltage
0.3
0.4
0.4
0.5
0.6
-
0.3
0.4
0.4
0.5
0.6
0.5
0.3
0.3
0.4
0.5
0.6
1
-
-
-
-
-
-
-
-
II
input leakage enable input nE;
-
-
current
VI = GND to 4.3 V;
VCC = 1.4 V to 4.3 V
IS(OFF)
OFF-state
leakage
current
nY port; see Figure 6
VCC = 1.4 V to 3.6 V
VCC = 3.6 V to 4.3 V
nZ port; see Figure 7
VCC = 1.4 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
-
-
5
-
-
50
50
500 nA
500 nA
10
IS(ON)
ON-state
leakage
current
-
-
-
-
5
-
-
50
50
500 nA
500 nA
10
ICC
supply current VI = VCC or GND;
VSW = GND or VCC
VCC = 3.6 V
VCC = 4.3 V
-
-
-
-
100
150
-
-
690
800
6000 nA
7000 nA
ICC
additional
supply current
VSW = GND or VCC
VI = 2.6 V; VCC = 4.3 V
VI = 2.6 V; VCC = 3.6 V
VI = 1.8 V; VCC = 4.3 V
VI = 1.8 V; VCC = 3.6 V
VI = 1.8 V; VCC = 2.5 V
-
-
-
-
-
-
2.0
0.35
7.0
2.5
50
4.0
0.7
10.0
4.0
200
-
-
-
-
-
-
-
7
1
7
1
A
A
A
A
nA
pF
15
5
15
5
300
-
500
-
CI
input
1.0
capacitance
CS(OFF) OFF-state
capacitance
-
-
35
-
-
-
-
-
-
-
-
pF
pF
CS(ON)
ON-state
110
capacitance
NX3L2T384
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 7 November 2011
5 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
11.1 Test circuits
V
V
CC
CC
nE
nZ
nE
nZ
V
V
IL
IH
nY
nY
I
I
S
S
GND
GND
V
V
V
V
O
I
O
I
001aaj519
001aaj520
VI = 0.3 V or VCC 0.3 V; VO = VCC 0.3 V or 0.3 V.
VI = 0.3 V or VCC 0.3 V; VO = open circuit.
Fig 6. Test circuit for measuring OFF-state leakage
current
Fig 7. Test circuit for measuring ON-state leakage
current
11.2 ON resistance
Table 8.
ON resistance
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 9 to Figure 15.
Symbol Parameter
Conditions
Tamb = 40 C to +85 C
Tamb = 40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
RON(peak) ON resistance
(peak)
VI = GND to VCC
ISW = 100 mA;
see Figure 8
;
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
-
-
-
-
-
1.6
1.0
3.7
1.6
-
-
-
-
-
4.1
1.7
0.9
0.9
0.9
0.55
0.5
0.8
VCC = 2.7 V
0.75
0.75
VCC = 4.3 V
0.5
[2]
RON
ON resistance
VI = GND to VCC;
mismatch between ISW = 100 mA
channels
VCC = 1.4 V
-
-
-
-
-
0.04
0.04
0.02
0.02
0.02
0.3
0.2
-
-
-
-
-
0.3
0.3
0.1
0.1
0.1
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 4.3 V
0.08
0.075
0.075
[3]
RON(flat)
ON resistance
(flatness)
VI = GND to VCC
ISW = 100 mA
;
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 4.3 V
-
-
-
-
-
1.0
0.5
3.3
1.2
0.3
0.3
0.4
-
-
-
-
-
3.6
1.3
0.15
0.13
0.2
0.35
0.35
0.45
[1] Typical values are measured at Tamb = 25 C.
[2] Measured at identical VCC, temperature and input voltage.
NX3L2T384
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 7 November 2011
6 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
[3] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and
temperature.
11.3 ON resistance test circuit and graphs
001aag564
1.6
R
ON
(Ω)
1.2
V
SW
V
(1)
0.8
0.4
0
V
CC
(2)
(3)
nE
nZ
V
IL
(4)
(5)
(6)
nY
GND
V
I
SW
l
0
1
2
3
4
5
V (V)
I
001aaj521
RON = VSW / ISW
.
(1) VCC = 1.5 V.
(2) VCC = 1.8 V.
(3)
VCC = 2.5 V.
(4) VCC = 2.7 V.
(5) VCC = 3.3 V.
(6)
V
CC = 4.3 V.
Measured at Tamb = 25 C.
Fig 8. Test circuit for measuring ON resistance
Fig 9. Typical ON resistance as a function of input
voltage
NX3L2T384
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 7 November 2011
7 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
001aag565
001aag566
1.6
1.0
R
(Ω)
ON
R
(Ω)
ON
0.8
1.2
(1)
(2)
(3)
(4)
0.6
0.4
0.2
0
(1)
(2)
(3)
(4)
0.8
0.4
0
0
1
2
3
0
1
2
3
V (V)
I
V (V)
I
(1) Tamb = 125 C.
(2) amb = 85 C.
(1) Tamb = 125 C.
(2) amb = 85 C.
T
T
(3) Tamb = 25 C.
(4) Tamb = 40 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
Fig 10. ON resistance as a function of input voltage;
VCC = 1.5 V
Fig 11. ON resistance as a function of input voltage;
VCC = 1.8 V
001aag567
001aag568
1.0
1.0
R
ON
R
ON
(Ω)
(Ω)
0.8
0.8
0.6
0.4
0.2
0
0.6
0.4
0.2
0
(1)
(2)
(3)
(4)
(1)
(2)
(3)
(4)
0
1
2
3
0
1
2
3
V (V)
V (V)
I
I
(1) Tamb = 125 C.
(2) amb = 85 C.
(1) Tamb = 125 C.
(2) amb = 85 C.
T
T
(3) Tamb = 25 C.
(4) Tamb = 40 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
Fig 12. ON resistance as a function of input voltage;
VCC = 2.5 V
Fig 13. ON resistance as a function of input voltage;
VCC = 2.7 V
NX3L2T384
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 7 November 2011
8 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
001aag569
001aaj896
1.0
1.0
R
ON
R
ON
(Ω)
(Ω)
0.8
0.8
(1)
(2)
(3)
(4)
0.6
0.4
0.2
0
0.6
0.4
0.2
0
(1)
(2)
(3)
(4)
0
1
2
3
4
0
1
2
3
4
5
V (V)
I
V (V)
I
(1) Tamb = 125 C.
(2) amb = 85 C.
(1) Tamb = 125 C.
(2) amb = 85 C.
T
T
(3) Tamb = 25 C.
(4) Tamb = 40 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
Fig 14. ON resistance as a function of input voltage;
VCC = 3.3 V
Fig 15. ON resistance as a function of input voltage;
VCC = 4.3 V
12. Dynamic characteristics
Table 9.
Dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 17.
Symbol Parameter
Conditions
Tamb = 25 C
Tamb = 40 C to +125 C Unit
Min Typ[1] Max
Min
Max
Max
(85 C) (125 C)
ten
enable time
nE to nZ or nY;
see Figure 16
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
-
-
-
50
36
24
22
22
90
70
45
40
40
-
-
-
-
-
120
80
120
90
ns
ns
ns
ns
ns
50
55
45
45
50
50
tdis
disable time
nE to nZ or nY;
see Figure 16
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
-
-
-
30
20
15
11
11
45
30
20
15
15
-
-
-
-
-
50
35
22
18
18
60
40
25
22
22
ns
ns
ns
ns
ns
[1] Typical values are measured at Tamb = 25 C and VCC = 1.5 V, 1.8 V, 2.5 V, 3.3 V and 4.3 V respectively.
NX3L2T384
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 7 November 2011
9 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
12.1 Waveform and test circuits
V
I
V
V
nE input
M
M
GND
t
t
dis
en
V
OH
nY or nZ output
LOW to OFF
OFF to LOW
V
V
X
X
GND
switch
switch
switch
disabled
enabled
disabled
001aaj522
Measurement points are given in Table 10.
Logic level: VOH is the typical output voltage that occurs with the output load.
Fig 16. Enable and disable times
Table 10. Measurement points
Supply voltage
VCC
Input
VM
Output
VX
1.4 V to 4.3 V
0.5VCC
0.9VOH
V
CC
nE
nY/nZ
nZ/nY
G
V
= 1.5 V
R
L
C
L
EXT
V
V V
O
I
001aaj523
Test data is given in Table 11.
Definitions test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
VEXT = External voltage for measuring switching times.
Fig 17. Load circuit for switching times
Table 11. Test data
Supply voltage
VCC
Input
VI
Load
CL
tr, tf
RL
1.4 V to 4.3 V
VCC
2.5 ns
35 pF
50
NX3L2T384
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 7 November 2011
10 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
12.2 Additional dynamic characteristics
Table 12. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise
specified); tr = tf 2.5 ns.
Symbol Parameter
Conditions
Tamb = 25 C
Unit
Min
Typ
Max
[1]
THD
total harmonic
distortion
fi = 20 Hz to 20 kHz; RL = 32 ; see Figure 18
VCC = 1.4 V; VI = 1 V (p-p)
VCC = 1.65 V; VI = 1.2 V (p-p)
VCC = 2.3 V; VI = 1.5 V (p-p)
VCC = 2.7 V; VI = 2 V (p-p)
VCC = 4.3 V; VI = 2 V (p-p)
RL = 50 ; see Figure 19
-
-
-
-
-
0.15
0.10
0.02
0.02
0.02
-
-
-
-
-
%
%
%
%
%
[1]
[1]
f(3dB)
3 dB frequency
response
VCC = 1.4 V to 4.3 V
-
-
60
-
-
MHz
dB
iso
isolation (OFF-state)
crosstalk voltage
fi = 100 kHz; RL = 50 ; see Figure 20
VCC = 1.4 V to 4.3 V
90
Vct
between digital inputs and switch;
fi = 1 MHz; CL = 50 pF; RL = 50 ; see Figure 21
VCC = 1.4 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
0.2
0.2
-
-
V
V
[1]
Xtalk
Qinj
crosstalk
between switches;
fi = 100 kHz; RL = 50 ; see Figure 22
VCC = 1.4 V to 4.3 V
-
90
-
dB
charge injection
fi = 1 MHz; CL = 0.1 nF; RL = 1 M; Vgen = 0 V;
Rgen = 0 ; see Figure 23
VCC = 1.5 V
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 4.3 V
-
-
-
-
-
3
3
3
3
6
-
-
-
-
-
pC
pC
pC
pC
pC
[1] fi is biased at 0.5VCC
.
13. Test circuits
V
CC
0.5V
CC
nE
V
IL
R
L
nY/nZ
nZ/nY
f
i
D
001aaj524
Fig 18. Test circuit for measuring total harmonic distortion
NX3L2T384
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Product data sheet
Rev. 3 — 7 November 2011
11 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
V
CC
0.5V
CC
nE
V
IL
R
L
nY/nZ
nZ/nY
f
i
dB
001aaj525
Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads 3 dB.
Fig 19. Test circuit for measuring the frequency response when channel is in ON-state
V
CC
0.5V
0.5V
CC
CC
nE
nY/nZ
V
IH
R
L
R
L
nZ/nY
f
i
dB
001aaj526
Adjust fi voltage to obtain 0 dBm level at input.
Fig 20. Test circuit for measuring isolation (OFF-state)
V
CC
nE
nY/nZ
nZ/nY
G
V
R
L
R
L
C
L
V
V
O
I
0.5V
0.5V
CC
CC
001aaj527
a. Test circuit
logic
input (nE)
off
on
off
V
V
ct
O
001aaj528
b. Input and output pulse definitions
Fig 21. Test circuit for measuring crosstalk voltage between digital inputs and switch
NX3L2T384
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Product data sheet
Rev. 3 — 7 November 2011
12 of 20
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NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
0.5V
CC
1E
R
L
V
IL
1Y or 1Z
1Z or 1Y
CHANNEL
ON
f
50 Ω
V
V
O1
i
0.5V
CC
2E
R
L
V
IH
2Y or 2Z
2Z or 2Y
CHANNEL
OFF
R
50 Ω
i
V
V
O2
001aai832
20 log10 (VO2 / VO1) or 20 log10 (VO1 / VO2).
Fig 22. Test circuit for measuring crosstalk between switches
V
CC
nE
R
gen
nY/nZ
nZ/nY
G
V
V
gen
V
R
L
C
L
I
V
O
GND
001aaj529
a. Test circuit
logic
input (nE)
off
on
off
V
V
O
O
001aaj530
b. Input and output pulse definitions
Definition: Qinj = VO CL.
VO = output voltage variation.
Rgen = generator resistance.
Vgen = generator voltage.
Fig 23. Test circuit for measuring charge injection
NX3L2T384
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Product data sheet
Rev. 3 — 7 November 2011
13 of 20
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NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
14. Package outline
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
SOT833-1
b
1
2
3
4
4×
(2)
L
L
1
e
8
7
6
5
e
1
e
1
e
1
8×
A
(2)
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
A
1
UNIT
b
D
E
e
e
1
L
L
1
max max
0.25
0.17
2.0
1.9
1.05
0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.6
0.5
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
- - -
07-11-14
07-12-07
SOT833-1
- - -
MO-252
Fig 24. Package outline SOT833-1 (XSON8)
NX3L2T384
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Product data sheet
Rev. 3 — 7 November 2011
14 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
XSON8U: plastic extremely thin small outline package; no leads;
8 terminals; UTLP based; body 3 x 2 x 0.5 mm
SOT996-2
D
B
A
E
A
A
1
detail X
terminal 1
index area
e
1
C
M
M
v
C A
C
B
b
e
L
1
y
1
y
w
C
1
4
L
2
L
8
5
X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
A
b
D
E
e
e
1
L
L
L
v
w
y
y
1
1
1
2
max
0.05 0.35
0.00 0.15
2.1
1.9
3.1
2.9
0.5
0.3
0.15
0.05
0.6
0.4
mm
0.5
0.5
1.5
0.1
0.05 0.05
0.1
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
- - -
JEDEC
JEITA
07-12-18
07-12-21
SOT996-2
- - -
Fig 25. Package outline SOT996-2 (XSON8U)
NX3L2T384
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Product data sheet
Rev. 3 — 7 November 2011
15 of 20
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NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
XQFN8U: plastic extremely thin quad flat package; no leads;
8 terminals; UTLP based; body 1.6 x 1.6 x 0.5 mm
SOT902-1
D
B
A
terminal 1
index area
E
A
A
1
detail X
e
L
1
e
C
y
C
1
y
L
M
M
∅ v
∅ w
C A
C
B
4
5
6
7
3
2
metal area
not for soldering
e
1
b
e
1
1
terminal 1
index area
8
X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
A
1
b
D
E
e
e
1
L
L
v
w
y
y
1
1
max
0.05 0.25 1.65 1.65
0.00 0.15 1.55 1.55
0.35 0.15
0.25 0.05
mm
0.5
0.55
0.5
0.1
0.05 0.05 0.05
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
MO-255
JEITA
05-11-25
07-11-14
SOT902-1
- - -
- - -
Fig 26. Package outline SOT902-1 (XQFN8U)
NX3L2T384
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Product data sheet
Rev. 3 — 7 November 2011
16 of 20
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NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
15. Abbreviations
Table 13. Abbreviations
Acronym
CDM
Description
Charged Device Model
CMOS
ESD
Complementary Metal Oxide Semiconductor
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
16. Revision history
Table 14. Revision history
Document ID
NX3L2T384 v.3
Modifications:
NX3L2T384 v.2
NX3L2T384 v.1
Release date
20111107
Data sheet status
Change notice
Supersedes
Product data sheet
-
NX3L2T384 v.2
• Legal pages updated.
20101221
Product data sheet
-
-
NX3L2T384 v.1
-
20091022
Product data sheet
NX3L2T384
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Product data sheet
Rev. 3 — 7 November 2011
17 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
malfunction of an NXP Semiconductors product can reasonably be expected
17.2 Definitions
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
17.3 Disclaimers
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
NX3L2T384
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Product data sheet
Rev. 3 — 7 November 2011
18 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NX3L2T384
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 7 November 2011
19 of 20
NX3L2T384
NXP Semiconductors
Dual low-ohmic single-pole single-throw analog switch
19. Contents
1
2
3
4
5
6
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
7
7.1
7.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
8
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
9
10
11
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
ON resistance. . . . . . . . . . . . . . . . . . . . . . . . . . 6
ON resistance test circuit and graphs. . . . . . . . 7
11.1
11.2
11.3
12
12.1
12.2
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveform and test circuits . . . . . . . . . . . . . . . 10
Additional dynamic characteristics . . . . . . . . . 11
13
14
15
16
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 17
17
Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
17.1
17.2
17.3
17.4
18
19
Contact information. . . . . . . . . . . . . . . . . . . . . 19
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 7 November 2011
Document identifier: NX3L2T384
相关型号：
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