NX3L4684GM [NXP]
Dual low-ohmic single-pole double-throw analog switch; 双低电阻单刀双掷模拟开关型号: | NX3L4684GM |
厂家: | NXP |
描述: | Dual low-ohmic single-pole double-throw analog switch |
文件: | 总24页 (文件大小:460K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NX3L4684
Dual low-ohmic single-pole double-throw analog switch
Rev. 04 — 24 March 2010
Product data sheet
1. General description
The NX3L4684 provides two low-ohmic single-pole double-throw analog switches,
suitable for use as an analog or digital multiplexer/demultiplexer. It has a digital select
input (nS) with Schmitt trigger action, two independent inputs/outputs (nY0, nY1) and a
common input/output (nZ). Schmitt trigger action at the select input (nS) makes the circuit
tolerant to slower input rise and fall times across the entire VCC range from 1.4 V to 4.3 V.
A low input voltage threshold allows pin nS to be driven by lower level logic signals without
a significant increase in supply current ICC. This makes it possible for the NX3L4684 to
switch 4.3 V signals with a 1.8 V digital controller, eliminating the need for logic level
translation.
The NX3L4684 allows signals with amplitude up to VCC to be transmitted from nZ to nY0
or nY1; or from nY0 or nY1 to nZ. Its low ON resistance (0.3 Ω for Y0 port, 0.5 Ω for Y1
port) and flatness (0.1 Ω) ensures minimal attenuation and distortion of transmitted
signals.
2. Features
Wide supply voltage range from 1.4 V to 4.3 V
Very low ON resistance (peak) for Y0 port:
0.8 Ω (typical) at VCC = 1.4 V
0.5 Ω (typical) at VCC = 1.65 V
0.3 Ω (typical) at VCC = 2.3 V
0.25 Ω (typical) at VCC = 2.7 V
0.25 Ω (typical) at VCC = 4.3 V
Break-before-make switching
High noise immunity
ESD protection:
HBM JESD22-A114F Class 3A exceeds 4000 V
MM JESD22-A115-A exceeds 200 V
CDM AEC-Q100-011 revision B exceeds 1000 V
CMOS low-power consumption
Latch-up performance exceeds 100 mA per JESD 78B Class II Level A
1.8 V control logic at VCC = 3.6 V
Control input accepts voltages above supply voltage
Very low supply current, even when input is below VCC
High current handling capability (350 mA continuous current under 3.3 V supply)
Specified from −40 °C to +85 °C and from −40 °C to +125 °C
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
3. Applications
Cell phone
PDA
Portable media player
4. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
Type number
Description
Version
NX3L4684GM −40 °C to +125 °C
XQFN10U
plastic extremely thin quad flat package; no leads;
10 terminals; UTLP based; body 2 × 1.55 × 0.5 mm
SOT1049-2
NX3L4684TK −40 °C to +125 °C
HVSON10
plastic thermal enhanced very thin small outline
SOT650-1
package; no leads; 10 terminals; 3 × 3 × 0.85 mm
5. Marking
Table 2.
Marking
Type number
NX3L4684GM
NX3L4684TK
Marking code
D84
D84
6. Functional diagram
Y1
S
Z
1Y0
1S
2Y0
2S
1Z
2Z
Y0
1Y1
2Y1
001aac355
001aaj085
Fig 1. Logic symbol
Fig 2. Logic diagram (one switch)
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
2 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
7. Pinning information
7.1 Pinning
NX3L4684
terminal 1
index area
NX3L4684
1Y0
1S
1
2
3
4
9
8
7
6
2Y0
2S
1
2
3
4
5
10
9
V
2Y1
2Z
CC
1Y1
1Z
8
2S
1Z
2Z
7
1S
2Y0
GND
1Y1
2Y1
6
1Y0
001aaj086
Transparent top view
001aaj087
Transparent top view
Fig 3. Pin configuration SOT1049-2 (XQFN10U)
Fig 4. Pin configuration SOT650-1 (HVSON10)
7.2 Pin description
Table 3.
Symbol
Pin description
Pin
Description
SOT1049-2
SOT650-1
1Y0
1S
1
2
3
4
5
6
7
8
9
10
5
4
3
2
1
10
9
8
7
6
independent input or output
select input
1Z
common output or input
independent input or output
supply voltage
1Y1
VCC
2Y1
2Z
independent input or output
common output or input
select input
2S
2Y0
GND
independent input or output
ground (0 V)
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
3 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
8. Functional description
Table 4.
Function table[1]
Input nS
Channel on
nY0
L
H
nY1
[1] H = HIGH voltage level;
L = LOW voltage level.
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
Min
−0.5
−0.5
−0.5
−50
-
Max
+4.6
+4.6
Unit
V
supply voltage
input voltage
[1]
[2]
select input nS
V
VSW
IIK
switch voltage
input clamping current
switch input nY0 or nY1
VI < −0.5 V
VCC + 0.5 V
-
mA
ISK
switch clamping current VI < −0.5 V or VI > VCC + 0.5 V
±50
±350
mA
mA
ISW
switch current
VSW > −0.5 V or VSW < VCC + 0.5 V;
-
source or sink current
VSW > −0.5 V or VSW < VCC + 0.5 V;
pulsed at 1 ms duration, < 10 % duty cycle;
peak current
-
±500
mA
Tstg
Ptot
storage temperature
total power dissipation
−65
+150
250
°C
[3]
Tamb = −40 °C to +125 °C
-
mW
[1] The minimum input voltage rating may be exceeded if the input current rating is observed.
[2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not
exceed 4.6 V.
[3] For XQFN10U packages: above 132 °C the value of Ptot derates linearly with 14.1 mW/K.
For HVSON10 packages: above 135 °C °C the value of Ptot derates linearly with 17.2 mW/K.
10. Recommended operating conditions
Table 6.
Recommended operating conditions
Symbol Parameter
Conditions
Min
1.4
0
Max
4.3
Unit
V
VCC
VI
supply voltage
input voltage
select input nS
4.3
V
[1]
[2]
VSW
Tamb
Δt/ΔV
switch voltage
switch input nY0 or nY1
0
VCC
+125
200
V
ambient temperature
input transition rise and fall rate
−40
-
°C
ns/V
VCC = 1.4 V to 4.3 V
[1] To avoid sinking GND current from terminal nZ when switch current flows in terminal nYn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current will flow from terminal nYn. In this case, there
is no limit for the voltage drop across the switch.
[2] Applies to select input nS signal levels.
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
4 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
11. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter
Conditions
Tamb = 25 °C
Tamb = −40 °C to +125 °C Unit
Min
Typ
Max
Min
Max
Max
(85 °C) (125 °C)
VIH
HIGH-level
input voltage
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
0.9
0.9
1.1
1.3
1.4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.9
0.9
1.1
1.3
1.4
-
-
-
-
-
V
V
V
V
V
V
V
V
V
V
μA
-
-
-
-
-
-
-
-
-
VIL
LOW-level
input voltage
0.3
0.4
0.5
0.5
0.6
-
0.3
0.4
0.5
0.5
0.6
±0.5
0.3
0.3
0.4
0.5
0.6
±1
-
-
-
-
-
-
-
-
II
input leakage select input nS;
-
-
current
VI = GND to 4.3 V;
VCC = 1.4 V to 4.3 V
IS(OFF)
OFF-state
leakage
current
nYn port; see Figure 5
VCC = 1.4 V to 3.6 V
VCC = 3.6 V to 4.3 V
nZ port; see Figure 6
VCC = 1.4 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
-
-
±5
-
-
±10
±50
±100 nA
±200 nA
±10
IS(ON)
ON-state
leakage
current
-
-
-
-
±5
-
-
±20
±50
±200 nA
±400 nA
±10
ICC
supply current VI = VCC or GND;
VSW = GND or VCC
VCC = 3.6 V
VCC = 4.3 V
-
-
-
-
100
150
-
-
300
500
3000 nA
5000 nA
ΔICC
additional
supply current
VSW = GND or VCC
VI = 2.6 V; VCC = 4.3 V
VI = 2.6 V; VCC = 3.6 V
VI = 1.8 V; VCC = 4.3 V
VI = 1.8 V; VCC = 3.6 V
VI = 1.8 V; VCC = 2.5 V
-
-
-
-
-
-
2.0
0.35
7.0
2.5
50
4.0
0.7
10.0
4.0
200
-
-
-
-
-
-
-
7
1
7
1
μA
μA
μA
μA
nA
pF
15
5
15
5
300
-
500
-
CI
input
1.0
capacitance
CS(OFF) OFF-state
capacitance
port nY0
port nY1
port nY0
port nY1
-
-
-
-
65
35
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
pF
pF
pF
pF
CS(ON)
ON-state
260
160
capacitance
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
5 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
11.1 Test circuits
switch nS
V
CC
1
2
V
IH
V
IL
nS
nZ
nY0
nY1
1
2
V
IL
or V
IH
switch
I
S
V
V
O
I
GND
012aaa000
VI = 0.3 V or VCC − 0.3 V; VO = VCC − 0.3 V or 0.3 V.
Fig 5. Test circuit for measuring OFF-state leakage current
switch nS
V
CC
1
2
V
IH
V
IL
nS
nZ
nY0
nY1
1
2
V
IL
or V
IH
switch
I
S
V
V
I
O
GND
012aaa001
VI = 0.3 V or VCC − 0.3 V; VO = VCC − 0.3 V or 0.3 V.
Fig 6. Test circuit for measuring ON-state leakage current
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
6 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
11.2 ON resistance
Table 8.
ON resistance
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 9 to Figure 21.
Symbol Parameter
Conditions
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min Typ[1] Max
Min
Max
RON(peak) ON resistance
(peak)
port nY0; see Figure 7;
VI = GND to VCC; ISW = 100 mA
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 4.3 V
-
-
-
-
-
0.85
0.55
0.35
0.30
0.30
2.0
0.8
-
-
-
-
-
2.2
0.9
0.6
0.5
0.5
Ω
Ω
Ω
Ω
Ω
0.5
0.45
0.45
port nY1; see Figure 7;
VI = GND to VCC; ISW = 100 mA
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
-
-
-
-
-
1.65
0.95
0.55
0.50
0.50
3.7
1.6
-
-
-
-
-
4.1
1.7
0.9
0.9
0.9
Ω
Ω
Ω
Ω
Ω
0.8
VCC = 2.7 V
0.75
0.75
VCC = 4.3 V
[2]
ΔRON
ON resistance
mismatch between
channels
VI = GND to VCC; ISW = 100 mA
VCC = 1.4 V
-
-
-
-
-
0.15
0.15
0.04
0.04
0.04
0.3
0.2
-
-
-
-
-
0.3
0.3
0.1
0.1
0.1
Ω
Ω
Ω
Ω
Ω
VCC = 1.65 V
VCC = 2.3 V
0.08
0.075
0.075
VCC = 2.7 V
VCC = 4.3 V
[3]
RON(flat)
ON resistance
(flatness)
port nY0; VI = GND to VCC
ISW = 100 mA
;
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 4.3 V
-
-
-
-
-
0.5
0.25
0.1
1.7
0.6
-
-
-
-
-
1.8
0.7
Ω
Ω
Ω
Ω
Ω
0.2
0.2
0.1
0.15
0.20
0.2
0.1
0.25
[3]
port nY1; VI = GND to VCC
ISW = 100 mA
;
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 4.3 V
-
-
-
-
-
1.0
0.5
3.3
1.2
0.3
0.3
0.4
-
-
-
-
-
3.6
1.3
Ω
Ω
Ω
Ω
Ω
0.15
0.13
0.2
0.35
0.35
0.45
[1] Typical values are measured at Tamb = 25 °C.
[2] Measured at identical VCC, temperature and input voltage.
[3] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and
temperature.
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
7 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
11.3 ON resistance test circuit and graphs
V
SW
V
switch nS
V
CC
1
2
V
V
IL
nS
nZ
IH
nY0
nY1
1
2
V
IL
or V
IH
switch
V
I
SW
I
GND
012aaa002
RON = VSW / ISW
.
Fig 7. Test circuit for measuring ON resistance
001aah800
001aag564
0.8
1.6
R
ON
R
ON
(Ω)
(Ω)
0.6
1.2
(1)
(1)
0.4
0.2
0
0.8
0.4
0
(2)
(2)
(3)
(3)
(4)
(4)
(5)
(5)
(6)
(6)
0
1
2
3
4
5
0
1
2
3
4
5
V (V)
I
V (V)
I
(1) VCC = 1.5 V.
(2) VCC = 1.8 V.
(3) VCC = 2.5 V.
(4) VCC = 2.7 V.
(5) VCC = 3.3 V.
(6) VCC = 4.3 V.
(1) VCC = 1.5 V.
(2) VCC = 1.8 V.
(3) VCC = 2.5 V.
(4) VCC = 2.7 V.
(5) VCC = 3.3 V.
(6) VCC = 4.3 V.
Measured at Tamb = 25 °C.
Measured at Tamb = 25 °C.
Fig 8. Typical ON resistance as a function of input
voltage (nY0 port)
Fig 9. Typical ON resistance as a function of input
voltage (nY1 port)
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
8 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
001aah805
001aag565
0.8
1.6
R
ON
R
ON
(Ω)
(Ω)
0.6
1.2
(1)
(2)
(3)
(4)
0.4
0.8
0.4
0
(1)
(2)
(3)
0.2 (4)
0
0
1
2
3
0
1
2
3
V (V)
I
V (V)
I
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
Fig 10. ON resistance as a function of input voltage;
VCC = 1.5 V (nY0 port)
Fig 11. ON resistance as a function of input voltage;
VCC = 1.5 V (nY1 port)
001aah801
001aag566
0.6
1.0
R
ON
(Ω)
R
ON
(Ω)
0.8
(1)
(2)
(3)
(4)
0.4
0.6
0.4
0.2
0
(1)
(2)
(3)
0.2
(4)
0
0
1
2
3
0
1
2
3
V (V)
I
V (V)
I
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
Fig 12. ON resistance as a function of input voltage;
VCC = 1.8 V (nY0 port)
Fig 13. ON resistance as a function of input voltage;
VCC = 1.8 V (nY1 port)
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
9 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
001aah802
001aag567
0.6
1.0
R
ON
(Ω)
R
ON
(Ω)
0.8
0.4
0.6
0.4
0.2
0
(1)
(2)
(3)
(4)
(1)
(2)
(3)
0.2
(4)
0
0
1
2
3
0
1
2
3
V (V)
I
V (V)
I
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
Fig 14. ON resistance as a function of input voltage;
VCC = 2.5 V (nY0 port)
Fig 15. ON resistance as a function of input voltage;
VCC = 2.5 V (nY1 port)
001aah803
001aah802
0.6
0.6
R
ON
R
ON
(Ω)
(Ω)
0.4
0.4
(1)
(1)
(2)
(3)
(2)
(3)
0.2
0.2
(4)
(4)
0
0
0
1
2
3
0
1
2
3
V (V)
I
V (V)
I
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
Fig 16. ON resistance as a function of input voltage;
VCC = 2.7 V (nY0 port)
Fig 17. ON resistance as a function of input voltage;
VCC = 2.7 V (nY1 port)
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
10 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
001aah804
001aag569
0.6
1.0
R
ON
(Ω)
R
ON
(Ω)
0.8
0.4
0.6
0.4
0.2
0
(1)
(2)
(3)
(4)
(1)
(2)
(3)
(4)
0.2
0
0
1
2
3
4
0
1
2
3
4
V (V)
I
V (V)
I
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
Fig 18. ON resistance as a function of input voltage;
VCC = 3.3 V (nY0 port)
Fig 19. ON resistance as a function of input voltage;
VCC = 3.3 V (nY1 port)
001aaj895
001aaj896
0.6
1.0
R
ON
(Ω)
R
ON
(Ω)
0.8
0.4
(1)
(2)
(3)
(4)
0.6
0.4
0.2
0
(1)
(2)
(3)
(4)
0.2
0
0
1
2
3
4
5
0
1
2
3
4
5
V (V)
I
V (V)
I
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
Fig 20. ON resistance as a function of input voltage;
VCC = 4.3 V (nY0 port)
Fig 21. ON resistance as a function of input voltage;
VCC = 4.3 V (nY1 port)
NX3L4684_4
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Product data sheet
Rev. 04 — 24 March 2010
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NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
12. Dynamic characteristics
Table 9.
Dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 24.
Symbol Parameter
Conditions
Tamb = 25 °C
Tamb = −40 °C to +125 °C Unit
Min Typ[1] Max
Min
Max
Max
(85 °C) (125 °C)
ten
enable time
nS to nZ or nYn;
see Figure 22
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
-
-
-
50
35
24
20
20
100
80
-
-
-
-
-
130
85
55
50
50
130
95
ns
ns
ns
ns
ns
50
60
45
55
45
55
tdis
disable time
nS to nZ or nYn;
see Figure 22
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
-
-
-
30
18
11
9
70
55
25
20
20
-
-
-
-
-
80
60
30
25
25
90
65
35
30
30
ns
ns
ns
ns
ns
9
[2]
tb-m
break-before-make see Figure 23
time
VCC = 1.4 V to 1.6 V
-
-
-
-
-
20
19
13
10
10
-
-
-
-
-
9
7
4
2
1
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.5 V, 1.8 V, 2.5 V, 3.3 V and 4.3 V respectively.
[2] Break-before-make guaranteed by design.
NX3L4684_4
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Product data sheet
Rev. 04 — 24 March 2010
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NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
12.1 Waveform and test circuits
V
I
V
M
nS input
GND
t
en
t
dis
V
OH
V
X
V
X
nZ output
OFF to HIGH
HIGH to OFF
nY1 connected to V
nY0 connected to V
EXT
GND
t
t
en
dis
V
OH
V
X
V
X
nZ output
HIGH to OFF
OFF to HIGH
EXT
012aaa003
GND
Measurement points are given in Table 10.
Logic level: VOH is typical output voltage level that occurs with the output load.
Fig 22. Enable and disable times
Table 10. Measurement points
Supply voltage
VCC
Input
VM
Output
VX
1.4 V to 4.3 V
0.5VCC
0.9VOH
NX3L4684_4
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Product data sheet
Rev. 04 — 24 March 2010
13 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
V
CC
nS
nZ
nY0
nY1
G
V
EXT
= 1.5 V
V
V
R
C
L
V
I
O
L
GND
012aaa004
a. Test circuit.
V
I
0.5V
I
0.9V
O
0.9V
O
V
O
t
b-m
001aag572
b. Input and output measurement points
Fig 23. Test circuit for measuring break-before-make timing
V
CC
nS
nZ
nY0
nY1
1
2
switch
G
V
V
V
R
L
C
L
V
EXT
= 1.5 V
I
O
GND
012aaa005
Test data is given in Table 11.
Definitions test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
VEXT = External voltage for measuring switching times.
Fig 24. Load circuit for switching times
Table 11. Test data
Supply voltage
VCC
Input
VI
Load
CL
tr, tf
RL
1.4 V to 4.3 V
VCC
≤ 2.5 ns
35 pF
50 Ω
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
14 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
12.2 Additional dynamic characteristics
Table 12. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise
specified); tr = tf ≤ 2.5 ns.
Symbol Parameter
Conditions
Tamb = 25 °C
Unit
Min
Typ
Max
[1]
THD
total harmonic
distortion
fi = 20 Hz to 20 kHz; RL = 32 Ω; see Figure 25
VCC = 1.4 V; VI = 1 V (p-p)
-
-
-
-
-
-
0.06
0.02
0.02
0.02
0.02
0.01
-
-
-
-
-
-
%
%
%
%
%
%
VCC = 1.65 V; VI = 1.2 V (p-p)
VCC = 2.3 V; VI = 1.5 V (p-p)
VCC = 2.7 V; VI = 2 V (p-p)
VCC = 4.3 V; VI = 2 V (p-p)
VCC = 3.0 V; VI = 1 V (p-p); RL = 600 Ω
RL = 50 Ω; see Figure 26
[1]
[1]
f(−3dB)
−3 dB frequency
response
port nY0; VCC = 1.4 V to 4.3 V
port nY1; VCC = 1.4 V to 4.3 V
fi = 100 kHz; RL = 50 Ω; see Figure 27
VCC = 1.4 V to 4.3 V
-
-
15
20
-
-
MHz
MHz
αiso
isolation (OFF-state)
crosstalk voltage
-
−90
-
dB
Vct
between digital inputs and switch;
fi = 1 MHz; CL = 50 pF; RL = 50 Ω; see Figure 28
VCC = 1.4 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
0.5
0.7
-
-
V
V
[1]
Xtalk
Qinj
crosstalk
between switches;
fi = 100 kHz; RL = 50 Ω; see Figure 29
VCC = 1.4 V to 4.3 V
-
−90
-
dB
charge injection
fi = 1 MHz; CL = 0.1 nF; RL = 1 MΩ; Vgen = 0 V;
Rgen = 0 Ω; see Figure 30
VCC = 1.5 V
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 4.3 V
-
-
-
-
-
10
14
21
30
50
-
-
-
-
-
pC
pC
pC
pC
pC
[1] fi is biased at 0.5VCC
.
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
15 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
12.3 Test circuits
V
CC
0.5V
CC
switch nS
R
L
1
2
V
IL
nS
nZ
nY0
nY1
1
2
V
IL
or V
IH
switch
V
IH
f
D
i
GND
012aaa006
Fig 25. Test circuit for measuring total harmonic distortion
V
CC
0.5V
CC
switch nS
R
L
1
2
V
IL
nS
nZ
nY0 1
nY1 2
V
IL
or V
IH
switch
V
IH
f
dB
i
GND
012aaa007
Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads −3 dB.
Fig 26. Test circuit for measuring the frequency response when channel is in ON-state
0.5V
V
CC
0.5V
CC
CC
switch nS
R
L
R
L
1
2
V
IH
nS
nZ
nY0
nY1
1
2
V
IL
or V
IH
switch
V
IL
f
dB
i
GND
012aaa008
Adjust fi voltage to obtain 0 dBm level at input.
Fig 27. Test circuit for measuring isolation (OFF-state)
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
16 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
switch nS
V
CC
1
2
V
IL
V
IH
nS
nZ
nY0
nY1
1
2
switch
0.5V
logic
input
G
V
I
R
L
R
C
V
O
V
L
L
0.5V
CC
CC
012aaa009
a. Test circuit
logic
input (nS)
off
on
off
V
ct
V
O
012aaa010
b. Input and output pulse definitions
Fig 28. Test circuit for measuring crosstalk voltage between digital inputs and switch
0.5V
CC
1S
1Y0 or 1Z
50
V
IH
R
L
1Z or 1Y0
CHANNEL
ON
C
50 pF
L
f
V
V
O1
i
0.5V
CC
2S
V
IL
R
L
2Y0 or 2Z
2Z or 2Y0
CHANNEL
OFF
R
50
C
L
50 pF
i
V
V
O2
001aaj088
20 log10 (VO2 / VO1) or 20 log10 (VO1 / VO2).
Fig 29. Test circuit for measuring crosstalk between switches
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
17 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
V
CC
nS
nZ
nY0
nY1
1
2
switch
R
gen
G
V
V
O
R
C
L
I
L
V
gen
GND
012aaa011
a. Test circuit.
logic
input
(nS) off
on
off
V
O
ΔV
O
012aaa012
b. Input and output pulse definitions
Definition: Qinj = ΔVO × CL.
ΔVO = output voltage variation.
Rgen = generator resistance.
Vgen = generator voltage.
Fig 30. Test circuit for measuring charge injection
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
18 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
13. Package outline
XQFN10U: plastic extremely thin quad flat package; no leads; 10 terminals;
UTLP based; body 2 x 1.55 x 0.5 mm
SOT1049-2
D
B
A
terminal 1
index area
E
A
A
1
detail X
e
2
L
C
L
1
e
y
C
1
y
M
M
v
w
C A
C
B
5
4
3
2
1
6
7
e
1
b
e
3
1/2 e
8
1
9
terminal 1
index area
10
metal area
must not be soldered
X
0
2.5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
1
b
D
E
e
e
1
e
2
e
3
L
L
v
w
y
y
1
1
max 0.50 0.05 0.30 1.65
2.1
2.0
1.9
0.4
0.3
0.2
0.15
0.08
0.00
mm
0.58
0.5
1.16
1.5
0.1
0.05
0.1
0.05
nom
min
0.03
0.00
1.55
1.45
0.23
0.15
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
- - -
JEDEC
JEITA
08-04-22
10-02-05
SOT1049-2
- - -
MO-255
Fig 31. Package outline SOT1049-2 (XQFN10U)
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
19 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
HVSON10: plastic thermal enhanced very thin small outline package; no leads;
10 terminals; body 3 x 3 x 0.85 mm
SOT650-1
0
1
2 mm
scale
X
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
e
1
terminal 1
index area
y
y
v
M
e
C
C
A
B
b
C
1
1
5
w
M
L
E
h
6
10
D
h
DIMENSIONS (mm are the original dimensions)
(1)
A
max.
(1)
(1)
UNIT
A
b
E
e
e
y
c
D
D
E
L
v
w
y
1
1
h
1
h
0.05 0.30
0.00 0.18
3.1
2.9
2.55
2.15
3.1
2.9
1.75
1.45
0.55
0.30
mm
0.05
0.1
1
0.2
0.5
2
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
01-01-22
02-02-08
SOT650-1
- - -
MO-229
- - -
Fig 32. Package outline SOT650-1 (HVSON10)
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
20 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
14. Abbreviations
Table 13. Abbreviations
Acronym
CDM
Description
Charged Device Model
CMOS
ESD
Complementary Metal-Oxide Semiconductor
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
PDA
Personal Digital Assistant
15. Revision history
Table 14. Revision history
Document ID
NX3L4684_4
NX3L4684_3
Modifications:
NX3L4684_2
NX3L4684_1
Release date
Data sheet status
Product data sheet
Product data sheet
Change notice
Supersedes
NX3L4684_3
NX3L4684_2
20100324
20100209
-
-
• Table 8: ON resistance (flatness) for pins nY0 and nY1 changed at VCC = 4.3 V.
20090401
Product data sheet
-
NX3L4684_1
20081127
Product data sheet
-
-
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
21 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
suitable for use in medical, military, aircraft, space or life support equipment,
16.2 Definitions
nor in applications where failure or malfunction of an NXP Semiconductors
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. NXP Semiconductors accepts no
liability for inclusion and/or use of NXP Semiconductors products in such
equipment or applications and therefore such inclusion and/or use is at the
customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on a weakness or default in the
customer application/use or the application/use of customer’s third party
customer(s) (hereinafter both referred to as “Application”). It is customer’s
sole responsibility to check whether the NXP Semiconductors product is
suitable and fit for the Application planned. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and the
product. NXP Semiconductors does not accept any liability in this respect.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. The product is not designed, authorized or warranted to be
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
22 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NX3L4684_4
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 24 March 2010
23 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
18. Contents
1
2
3
4
5
6
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
7
7.1
7.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
8
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
9
10
11
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
ON resistance. . . . . . . . . . . . . . . . . . . . . . . . . . 7
ON resistance test circuit and graphs. . . . . . . . 8
11.1
11.2
11.3
12
Dynamic characteristics . . . . . . . . . . . . . . . . . 12
Waveform and test circuits . . . . . . . . . . . . . . . 13
Additional dynamic characteristics . . . . . . . . . 15
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
12.1
12.2
12.3
13
14
15
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 21
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 21
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 22
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 23
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 24 March 2010
Document identifier: NX3L4684_4
相关型号:
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