PBLS2003S [NXP]
20 V PNP BISS loadswitch; 20 V PNP BISS loadswitch型号: | PBLS2003S |
厂家: | NXP |
描述: | 20 V PNP BISS loadswitch |
文件: | 总16页 (文件大小:109K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PBLS2003S
20 V PNP BISS loadswitch
Rev. 02 — 24 August 2009
Product data sheet
1. Product profile
1.1 General description
PNP low VCEsat Breakthrough In Small Signal (BISS) transistor and NPN Resistor-
Equipped Transistor (RET) in a SOT96-1 (SO8) small Surface-Mounted Device (SMD)
plastic package.
1.2 Features
I Low VCEsat (BISS) transistor and resistor-equipped transistor in one package
I Low threshold voltage (< 1 V) compared to MOSFET
I Low drive power required
I Space-saving solution
I Reduction of component count
1.3 Applications
I Supply line switches
I Battery charger switches
I High-side switches for LEDs, drivers and backlights
I Portable equipment
1.4 Quick reference data
Table 1.
Symbol
Quick reference data
Parameter
Conditions
Min
Typ
Max
Unit
TR1; PNP low VCEsat (BISS) transistor
VCEO
IC
collector-emitter voltage
collector current
open base
-
-
-
-
−20
−3
V
-
A
[1]
RCEsat
collector-emitter saturation IC = −2 A;
resistance IB = −200 mA
75
120
mΩ
TR2; NPN resistor-equipped transistor
VCEO
IO
collector-emitter voltage
output current
open base
-
-
50
V
-
-
100
13
mA
kΩ
R1
bias resistor 1 (input)
bias resistor ratio
7
10
1
R2/R1
0.8
1.2
[1] Pulse test: tp ≤ 300 µs; δ ≤ 0.02
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
2. Pinning information
Table 2.
Pinning
Pin
1
Description
Simplified outline
Symbol
input (base) TR2
GND (emitter) TR2
base TR1
8
5
1
8
2
R1
R2
3
4
emitter TR1
5
collector TR1
1
4
2
3
7
6
TR2
6
collector TR1
7
output (collector) TR2
output (collector) TR2
8
4
5
TR1
006aaa813
3. Ordering information
Table 3.
Ordering information
Type number Package
Name
Description
Version
PBLS2003S
SO8
plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
4. Marking
Table 4.
Marking codes
Type number
Marking code
PBLS2003S
LS2003S
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
2 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
TR1; PNP low VCEsat (BISS) transistor
VCBO
VCEO
VEBO
IC
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current
open emitter
open base
-
-
-
-
-
−20
−20
−5
V
V
V
A
A
open collector
−3
ICM
peak collector current
single pulse;
−5
tp ≤ 1 ms
IB
base current
-
-
−0.5
−1
A
A
IBM
peak base current
single pulse;
tp ≤ 1 ms
[1]
[2]
[3]
Ptot
total power dissipation
Tamb ≤ 25 °C
-
-
-
0.55
0.87
1.43
W
W
W
TR2; NPN resistor-equipped transistor
VCBO
VCEO
VEBO
VI
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
open emitter
open base
-
-
-
50
50
10
V
V
V
open collector
positive
-
-
-
-
+40
−10
100
100
V
negative
V
IO
output current
mA
mA
ICM
peak collector current
single pulse;
tp ≤ 1 ms
[1]
Ptot
total power dissipation
total power dissipation
T
amb ≤ 25 °C
amb ≤ 25 °C
-
0.2
W
Per device
Ptot
[1]
[2]
[3]
T
-
0.7
W
W
W
°C
°C
°C
-
1.0
-
1.5
Tj
junction temperature
ambient temperature
storage temperature
-
150
+150
+150
Tamb
Tstg
−65
−65
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
3 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
006aaa808
2.0
P
tot
(W)
(1)
1.5
(2)
(3)
1.0
0.5
0
−75
−25
25
75
125
175
(°C)
T
amb
(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 1cm2
(3) FR4 PCB, standard footprint
Fig 1. Power derating curves
6. Thermal characteristics
Table 6.
Thermal characteristics
Parameter
Symbol
Per device
Rth(j-a)
Conditions
Min
Typ
Max
Unit
[1]
thermal resistance from in free air
junction to ambient
-
-
-
-
-
-
180
125
85
K/W
K/W
K/W
[2]
[3]
TR1; PNP low VCEsat (BISS) transistor
Rth(j-sp)
thermal resistance from
junction to solder point
-
-
40
K/W
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
4 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
006aaa809
3
10
duty cycle =
Z
th(j-a)
(K/W)
1.0
0.75
0.5
2
10
0.33
0.2
0.1
0.05
10
0.02
0.01
0
1
−1
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, standard footprint
Fig 2. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
006aaa810
3
10
duty cycle =
Z
th(j-a)
(K/W)
1.0
0.75
0.5
2
10
0.33
0.2
0.1
10
0.05
0.02
0.01
0
1
−1
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, mounting pad for collector 1cm2
Fig 3. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
5 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
006aaa811
3
10
Z
th(j-a)
(K/W)
duty cycle =
2
10
1.0
0.75
0.5
0.33
0.2
10
0.1
0.05
0.02
0.01
0
1
10
−4
−3
−2
−1
2
3
10
10
10
1
10
10
10
t
(s)
p
Ceramic PCB, Al2O3, standard footprint
Fig 4. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
7. Characteristics
Table 7.
Characteristics
Tamb = 25 °C unless otherwise specified
Symbol Parameter
Conditions
Min
Typ
Max
Unit
TR1; PNP low VCEsat (BISS) transistor
ICBO
collector-base cut-off VCB = −20 V; IE = 0 A
-
-
-
-
−100 nA
−50 µA
current
VCB = −20 V; IE = 0 A;
Tj = 150 °C
ICES
IEBO
hFE
collector-emitter
cut-off current
VCE = −20 V; VBE = 0 V
-
-
-
-
−100 nA
−100 nA
emitter-base cut-off
current
VEB = −5 V; IC = 0 A
DC current gain
VCE = −2 V; IC = −0.1 A
VCE = −2 V; IC = −0.5 A
VCE = −2 V; IC = −1 A
VCE = −2 V; IC = −2 A
VCE = −2 V; IC = −3 A
IC = −0.5 A; IB = −50 mA
IC = −1 A; IB = −50 mA
IC = −2 A; IB = −100 mA
IC = −2 A; IB = −200 mA
IC = −3 A; IB = −300 mA
IC = −2 A; IB = −100 mA
IC = −2 A; IB = −200 mA
220
420
360
310
235
180
−45
−90
-
-
-
-
-
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
220
200
150
100
VCEsat
collector-emitter
saturation voltage
-
-
-
-
-
-
-
−75
mV
−140 mV
−160 −255 mV
−150 −240 mV
−220 −355 mV
RCEsat
collector-emitter
saturation resistance
80
75
130
120
mΩ
mΩ
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
6 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
Table 7.
Characteristics …continued
Tamb = 25 °C unless otherwise specified
Symbol Parameter Conditions
Min
Typ
Max
Unit
V
[1]
[1]
[1]
VBEsat
base-emitter
saturation voltage
IC = −2 A; IB = −100 mA
IC = −3 A; IB = −300 mA
-
-
-
−0.95 −1.1
−1
−1.2
−1.2
V
VBEon
base-emitter turn-on VCE = −2 V; IC = −1 A
−0.8
V
voltage
td
tr
delay time
IC = −2 A; IBon = −100 mA;
Boff = 100 mA
-
7
-
-
-
-
-
-
-
ns
I
rise time
-
34
41
175
30
205
-
ns
ton
ts
turn-on time
storage time
fall time
-
ns
-
ns
tf
-
ns
toff
fT
turn-off time
transition frequency
-
ns
IC = −100 mA; VCE = −5 V;
100
MHz
f = 100 MHz
Cc
collector capacitance VCB = −10 V; IE = ie = 0 A;
-
-
-
-
50
pF
nA
f = 1 MHz
TR2; NPN resistor-equipped transistor
ICBO collector-base cut-off VCB = 50 V; IE = 0 A
100
current
ICEO
collector-emitter
cut-off current
VCE = 30 V; IB = 0 A
-
-
-
-
1
µA
µA
VCE = 30 V; IB = 0 A;
50
Tj = 150 °C
IEBO
emitter-base cut-off
current
VEB = 5 V; IC = 0 A
-
-
400
µA
hFE
DC current gain
VCE = 5 V; IC = 5 mA
30
-
-
-
-
VCEsat
collector-emitter
IC = 10 mA; IB = 0.5 mA
150
mV
saturation voltage
VI(off)
VI(on)
R1
off-state input voltage VCE = 5 V; IC = 100 µA
on-state input voltage VCE = 0.3 V; IC = 10 mA
bias resistor 1 (input)
-
1.1
1.8
10
1
0.8
-
V
2.5
7
V
13
1.2
2.5
kΩ
R2/R1
Cc
bias resistor ratio
0.8
-
collector capacitance VCB = 10 V; IE = ie = 0 A;
f = 1 MHz
-
pF
[1] Pulse test: tp ≤ 300 µs; δ ≤ 0.02
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
7 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
006aaa800
006aaa801
800
−5
I
(mA) =
−45.0
−40.5
−36.0
−31.5
−27.0
−22.5
B
I
C
h
FE
(A)
(1)
(2)
−4
600
−18.0
−13.5
−3
−2
−1
0
400
200
0
−9.0
−4.5
(3)
2
3
4
−1
−10
−10
−10
−10
0
−0.4
−0.8
−1.2
−1.6
−2.0
(V)
I
(mA)
V
C
CE
VCE = −2 V
Tamb = 25 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig 5. TR1 (PNP): DC current gain as a function of
collector current; typical values
Fig 6. TR1 (PNP): Collector current as a function of
collector-emitter voltage; typical values
006aaa802
006aaa803
−1.1
−1.1
V
(V)
V
BE
BEsat
(V)
−0.9
−0.9
−0.7
−0.5
−0.3
−0.1
(1)
(2)
(3)
(1)
(2)
(3)
−0.7
−0.5
−0.3
−0.1
2
3
4
2
3
4
−1
−10
−10
−10
−10
−1
−10
−10
−10
−10
I
(mA)
I (mA)
C
C
VCE = −2 V
IC/IB = 20
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig 7. TR1 (PNP): Base-emitter voltage as a function
of collector current; typical values
Fig 8. TR1 (PNP): Base-emitter saturation voltage as
a function of collector current; typical values
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
8 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
006aaa804
006aaa805
−1
−1
V
V
CEsat
(V)
CEsat
(V)
(1)
(2)
(3)
−1
−1
−10
−10
−10
−10
−10
−10
(1)
(2)
−2
−3
−2
−3
(3)
2
3
4
2
3
4
−1
−10
−10
−10
−10
−1
−10
−10
−10
−10
I
(mA)
I (mA)
C
C
IC/IB = 20
Tamb = 25 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
Fig 9. TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig 10. TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa806
006aaa807
2
10
10
R
CEsat
(Ω)
R
CEsat
(Ω)
10
1
1
(1)
(2)
(3)
(1)
(2)
(3)
−1
10
10
−1
10
−2
−2
10
2
3
4
2
3
4
−1
−10
−10
−10
−10
−1
−10
−10
−10
−10
I
(mA)
I (mA)
C
C
IC/IB = 20
Tamb = 25 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
Fig 11. TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
Fig 12. TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
9 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
006aaa034
006aaa035
3
10
1
(1)
(2)
(3)
h
FE
V
CEsat
(V)
2
10
(1)
(2)
(3)
−1
10
10
−2
1
10
10
−1
2
2
1
10
10
1
10
10
I
(mA)
I (mA)
C
C
VCE = 5 V
IC/IB = 20
(1) Tamb = 150 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
Fig 13. TR2 (NPN): DC current gain as a function of
collector current; typical values
Fig 14. TR2 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa036
006aaa037
10
10
V
I(on)
V
I(off)
(V)
(V)
(1)
(2)
(1)
(2)
(3)
1
1
(3)
−1
−1
10
10
−1
2
−2
−1
10
1
10
10
10
10
1
10
I
(mA)
I (mA)
C
C
VCE = 0.3 V
VCE = 5 V
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig 15. TR2 (NPN): On-state input voltage as a
function of collector current; typical values
Fig 16. TR2 (NPN): Off-state input voltage as a
function of collector current; typical values
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
10 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
8. Test information
−
I
B
input pulse
90 %
(idealized waveform)
−
I
(100 %)
Bon
10 %
−
I
Boff
output pulse
−
(idealized waveform)
I
C
90 %
−
I
(100 %)
C
10 %
t
t
t
f
t
t
r
s
d
006aaa266
t
t
off
on
Fig 17. BISS transistor switching time definition
V
V
CC
BB
R
B
R
C
V
o
(probe)
(probe)
oscilloscope
oscilloscope
450 Ω
450 Ω
R2
V
I
DUT
R1
mgd624
IC = −2 A; IBon = −100 mA; IBoff = 100 mA; R1 = open; R2 = 25 Ω; RB = 70 Ω; RC = 5 Ω
Fig 18. Test circuit for switching times
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
11 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
9. Package outline
5.0
4.8
1.75
1.0
0.4
6.2 4.0
5.8 3.8
pin 1 index
0.49
0.36
0.25
0.19
1.27
Dimensions in mm
03-02-18
Fig 19. Package outline SOT96-1 (SO8)
10. Packing information
Table 8.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number Package
Description
Packing quantity
1000
2500
PBLS2003S
SOT96-1
8 mm pitch, 12 mm tape and reel
-115
-118
[1] For further information and the availability of packing methods, see Section 14.
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
12 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
11. Soldering
5.50
0.60 (8×)
1.30
4.00 6.60 7.00
1.27 (6×)
solder lands
sot096-1_fr
occupied area
placement accuracy ± 0.25
Dimensions in mm
Fig 20. Reflow soldering footprint SOT96-1 (SO8)
1.20 (2×)
enlarged solder land
0.60 (6×)
0.3 (2×)
1.30
4.00 6.60 7.00
1.27 (6×)
5.50
board direction
solder lands
solder resist
placement accurracy ± 0.25
sot096-1_fw
occupied area
Dimensions in mm
Fig 21. Wave soldering footprint SOT96-1 (SO8)
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
13 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
12. Revision history
Table 9.
Revision history
Document ID
PBLS2003S_2
Modifications:
Release date
Data sheet status
Change notice
Supersedes
20090824
Product data sheet
-
PBLS2003S_1
• This data sheet was changed to reflect the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical
content.
PBLS2003S_1
20060803
Product data sheet
-
-
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
14 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
13. Legal information
13.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
13.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
PBLS2003S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
15 of 16
PBLS2003S
NXP Semiconductors
20 V PNP BISS loadswitch
15. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.3
1.4
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test information. . . . . . . . . . . . . . . . . . . . . . . . 11
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
Packing information. . . . . . . . . . . . . . . . . . . . . 12
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14
3
4
5
6
7
8
9
10
11
12
13
Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
13.1
13.2
13.3
13.4
14
15
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 24 August 2009
Document identifier: PBLS2003S_2
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