PCA2001AA [NXP]
32 kHz watch circuit with programmable adaptive motor pulse; 32 kHz的时钟电路与可编程自适应电机脉冲
| 型号： | PCA2001AA |
| 厂家： | 
NXP |
| 描述： | 32 kHz watch circuit with programmable adaptive motor pulse |
| 文件： | 总19页 (文件大小：117K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
PCA2000; PCA2001
32 kHz watch circuit with
programmable adaptive motor
pulse
Product specification
2003 Dec 17
Supersedes data of 2003 Feb 04
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
FEATURES
GENERAL DESCRIPTION
• Amplitude-regulated 32 kHz quartz crystal oscillator,
with excellent frequency stability and high immunity to
leakage currents
The PCA2000; PCA2001 are CMOS integrated circuits for
battery operated wrist watches with a 32 kHz quartz
crystal as timing element and a bipolar 1 Hz stepping
motor. The quartz crystal oscillator and the frequency
divider are optimized for minimum power consumption.
A timing accuracy of 1 ppm is achieved with a
• Electrically programmable time calibration with 1 ppm
resolution stored in One Time Programmable (OTP)
memory
programmable, digital frequency adjustment.
• The quartz crystal is the only external component
To obtain the minimum overall power consumption for the
watch, an automatic motor pulse adaptation function is
provided. The circuit supplies only the minimum drive
current, which is necessary to ensure a correct motor step.
Changing the drive current of the motor is achieved by
chopping the motor pulse with a variable duty cycle. The
pulse width and the range of the variable duty cycle can be
programmed to suit different types of motor. The automatic
pulse adaptation scheme is based on a safe dynamic
detection of successful motor steps.
connected
• Very low power consumption, typical 90 nA
• One second output pulses for bipolar stepping motor
• Minimum power consumption for the entire watch, due
to self adaptation of the motor drive according to the
required torque
• Reliable step detection circuit
• Motor pulse width, pulse modulation, and pulse
adaptation range programmable in a wide range, stored
in OTP memory
A pad RESET is provided (used for stopping the motor) for
accurate time setting and for accelerated testing of the
watch.
• Stop function for accurate time setting and power saving
during shelf life
The PCA2000 has a battery EOL warning function. If the
battery voltage drops below the EOL threshold voltage
(which can be programmed for silver oxide or lithium
batteries), the motor steps change from one pulse per
second to a burst of four pulses every 4 seconds.
• End Of Life (EOL) indication for silver oxide or lithium
battery (only the PCA2000 has the EOL feature)
• Test mode for accelerated testing of the mechanical
parts and the IC.
The PCA2001 uses the same circuit as the PCA2000, but
without the EOL function.
APPLICATIONS
• Driver circuits for bipolar stepping motors
• High immunity motor drive circuits.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
PCA2000U/AA
PCA2001U/AA
PCA2000U/10AA
PCA2001U/10AA
−
−
−
−
bare die; chip in tray
bare die; chip in tray
−
−
−
−
bare die; chip on film frame carrier
bare die; chip on film frame carrier
2003 Dec 17
2
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
BLOCK DIAGRAM
32 Hz
8 kHz
3
OSCIN
8
OSCILLATOR
DIVIDER
RESET
÷4
RESET
4
OSCOUT
reset
TIMING ADJUSTMENT,
INHIBITION
5
1
V
DD
VOLTAGE DETECTOR,
OTP-CONTROLLER
1 Hz
OTP-MEMORY
V
SS
MOTOR CONTROL WITH
ADAPTIVE PULSE MODULATION
EOL
PCA2000 only
2
STEP
DETECTION
TEST
PCA2000
PCA2001
6
7
mgw567
MOT1
MOT2
Fig.1 Block diagram.
PINNING
SYMBOL
handbook, halfpage
PAD
DESCRIPTION
ground
V
1
2
8
7
RESET
MOT2
SS
VSS
1
2
3
4
5
6
7
8
TEST
TEST
OSCIN
OSCOUT
VDD
test output
PCA2000
PCA2001
oscillator input
oscillator output
supply voltage
motor 1 output
motor 2 output
reset input
MOT1
OSCIN
3
4
6
OSCOUT
V
5
DD
MGU554
MOT1
MOT2
RESET
Fig.2 Pad configuration.
2003 Dec 17
3
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
FUNCTIONAL DESCRIPTION
Motor pulse
Therefore, it is possible to program a larger energy gap
between the pulses with step detection and the strongest,
not monitored, pulse. This might be necessary to ensure a
reliable and stable operation under adverse conditions
(magnetic fields, vibrations). If the watch works in the
highest driving stage, the driving level jumps after the
4-minute period directly to the lowest stage, and not just
one stage lower.
The motor output supplies pulses of different driving
stages, depending on the torque required to turn on the
motor. The number of different stages can be selected
between three and six. With the exception of the highest
driving stage, each motor pulse (tp in Figs 3 and 6) is
followed by a detection phase during which the motor
movement is monitored, in order to check whether the
motor has turned correctly or not.
To optimize the performance for different motors, the
following parameters can be programmed:
• Pulse width: 0.98 to 7.8 ms in steps of 0.98 ms
If a missing step is detected, a correction sequence is
generated (see Fig.3) and the driving stage is switched to
the next level. The correction sequence consists of two
pulses: first a short pulse in the opposite direction
(0.98 ms, modulated with the maximum duty cycle) to give
the motor a defined position, followed by a motor pulse of
the strongest driving level. Every 4 minutes, the driving
level is lowered again by one stage.
• Duty cycle of lowest driving level: 37.5% to 56.25% in
steps of 6.25%
• Number of driving levels (including the highest driving
level): 3 to 6
• Duty cycle of the highest driving level: 75% or 100%
• Enlargement pulse for the highest driving level: on or off.
The enlargement pulse has a duty cycle of 25% and a
pulse width which is twice the programmed motor pulse
width. The repetition period for the chopping pattern is
0.98 ms. Figure 4 shows an example of a 3.9 ms pulse.
The motor pulse has a constant pulse width. The driving
level is regulated by chopping the driving pulse with a
variable duty cycle. The driving level starts from the
programmed minimum value and increases by 6.25% after
each failed motor step. The strongest driving stage, which
is not followed by a detection phase, is programmed
separately.
1.96 ms
t
t
2t
p
detection phase
p
p
MGW350
0.98 ms
31.25 ms
31.25 ms
Fig.3 Correction sequence after failed motor step.
2003 Dec 17
4
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
0.244 ms
0.122 ms
DUTY CYCLE
37.5%
43.75%
50%
56.25%
62.5%
68.75%
75%
81.25%
100%
MGW351
0.98 ms
0.98 ms
0.98 ms
0.98 ms
Fig.4 Possible modulations for a 3.9 ms motor pulse.
Step detection
The induced current caused by the residual motor
movement is then sampled in phase 3 (closing P3 and P2)
and in phase 4 (closing P1 and P4). For step detection in
the opposite direction P1 and P4 are closed during
phase 3 and P2 and P3 during phase 4 (see Fig.6).
Figure 5 shows a simplified diagram of the motor driving
and step detection circuit, and Fig.6 shows the step
detection sequence and corresponding sampling current.
Between the motor driving pulses, the switches P1 and P2
are closed, which means the motor is short-circuited. For
a pulse in one direction, P1 and N2 are open, and
P2 and N1 are closed with the appropriate duty cycle; for
a pulse in the opposite direction, P2 and N1 are open, and
P1 and N2 closed.
The condition for a successful motor step is a positive step
detection pulse (current in the same direction as in the
driving phase) followed by a negative detection pulse
within a given time limit. This time limit can be programmed
between 3.9 and 10.7 ms (in steps of 0.98 ms) in order to
ensure a safe and correct step detection under all
conditions (for instance magnetic fields). The step
detection phase stops after the last 31.25 ms, after the
start of the motor driving pulse.
The step detection phase is initiated after the motor driving
pulse (see Fig.3). P1 and P2 are first closed for 0.98 ms
and then all four drive switches (P1, N1, P2 and N2) are
opened for 0.98 ms.
As a result, the energy stored in the motor inductance is
reduced as fast as possible.
2003 Dec 17
5
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
V
DD
R
D
D1
P2
N2
P1
N1
P3
MOTOR
P4
MOT1
MOT2
V
SS
MGW352
Fig.5 Simplified diagram of motor driving and step detection circuit.
I
MOT
positive detection level
t
negative detection level
t
p
0.98 ms
(motor shorted)
programmable time limit
OTP C4 to C6
t
= 0.98 ms
sampling
d
sampling
voltage
t
sampling
voltage
positive detection
motor shorted
negative detection
sampling results
t
sampling
MGW569
61 µs
0.49 ms
Fig.6 Step detection sequence and corresponding sampling voltage.
6
2003 Dec 17
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
Time calibration
Reset
The quartz crystal oscillator has an integrated capacitance
of 5.2 pF, which is lower than the specified capacitance
(CL) of 8.2 pF for the quartz crystal. Therefore, the
oscillator frequency is typically 60 ppm higher than
32.768 kHz. This positive frequency offset is compensated
by removing the appropriate number of 8192 Hz pulses in
the divider chain (maximum 127 pulses), every
At pin RESET an output signal with a frequency of
1
× f
------------
1024
= 32 Hz is provided.
osc
Connecting pad RESET to VDD stops the motor drive and
opens all four (P1, N1, P2 and N2) driver switches (see
Fig.5). Connecting pad RESET to VSS activates the test
mode. In this mode the motor output frequency is 32 Hz,
which can be used to test the mechanical function of the
watch.
1 or 2 minutes. The time correction is given in Table 1.
After measuring the effective oscillator frequency, the
number of correction pulses must be calculated and stored
together with the calibration period in the OTP memory
(see Section “Programming the memory cells”).
After releasing the pad RESET, the motor starts exactly
one second later with the smallest duty cycle and with the
opposite polarity to the last pulse before stopping.
The oscillator frequency can be measured at pad RESET,
The debounce time for the RESET function is between
31 and 62 ms.
where a square wave signal with the frequency of
1
× f
------------
1024
is provided.
osc
Programming possibilities
This frequency shows a jitter every minute or every two
minutes, depending on the programmed calibration period,
which originates from the time calibration.
The programming data is stored in OTP cells (EPROM
cells). At delivery, all memory cells are in state 0. The cells
can be programmed to the state 1, but then there is no
more set back to state 0.
Details on how to measure the oscillator frequency and the
programmed inhibit time are given in Section
“Measurement of oscillator frequency and inhibit time”.
The programming data is organized in an array of three
8-bit words: word A contains the time calibration, and
words B and C contain the setting for the monitor pulses
(see Table 2).
Table 1 Time calibration
CORRECTION PER STEP (n = 1)
CORRECTION PER STEP (n = 127)
CALIBRATION PERIOD
ppm
seconds per day
ppm
seconds per day
1 minute
2.03
0.176
0.088
258
129
22.3
2 minutes
1.017
11.15
Table 2 Words and bits
BIT
WORD
1
2
3
4
5
6
7
8
A
number of 8192 Hz pulses to be removed
calibration
period
B
C
lowest stage: duty cycle number of driving stages highest stage:
factory test bit
duty cycle and
stretching
pulse width
maximum time delay between positive
and negative detection pulses
EOL
factory test
bit
voltage
2003 Dec 17
7
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
Table 3 Description of word A bits
Table 5 Description of word C bits
BIT VALUE DESCRIPTION
Pulse width tpr (ms)
BIT
VALUE
DESCRIPTION
Inhibit time
1 to 7
−
Adjust the number of the 8192 Hz
pulses to be removed. Bit 1 is the
MSB and bit 7 is the LSB.
1 to 3
000
001
010
011
100
101
110
111
0.98
1.95
2.90
3.90
4.90
5.90
6.80
7.80
Calibration period
8
0
1
1 minute
2 minutes
Table 4 Description of word B bits
BIT VALUE DESCRIPTION
Duty cycle lowest driving stage
Time delay tmax (ms); note 1
4 to 6
000
001
010
011
100
101
110
111
3.91
4.88
5.86
6.84
7.81
8.79
9.77
10.74
1 to 2
00
01
10
11
37.5%
43.75%
50%
56.25%
Number of driving stages
3 to 4
00
01
10
11
3
4
5
EOL voltage of the battery
6; note 1
7
0
1
1.38 V (silver-oxide)
2.5 V (lithium)
Duty cycle highest driving stage
5
0
1
75%; note 2
100%
Factory test bit
8
−
Stretching pulse
Note
1. Between positive and negative detection pulses.
6
0
1
pulse is not stretched
pulse of 2tpr and duty cycle of 25%
is added
Factory test bits
7 to 8
−
Notes
1. Including the highest driving stage, which one has no
motor step detection.
2. If the maximum duty cycle of 75% is selected, not all
programming combinations are possible since the
second highest level must be smaller than the highest
driving level.
2003 Dec 17
8
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
Programming procedure
Programming the memory cells
For a watch it is essential that the timing calibration can be
made after the watch is fully assembled. In this situation,
the supply pads are often the only terminals which are still
accessible.
Applying the two-stage programming pulse (see Fig.7)
transfers the stored data in the shift register to the OTP
cells.
Perform the following to program a memory word:
Writing to the OTP cells and performing the related
functional checks is achieved in the PCA2000; PCA2001
by modulating the supply voltage. The necessary control
circuit consists basically of a voltage level detector, an
instruction counter which determines the function to be
performed, and an 8-bit shift register which allows writing
to the OTP cells of an 8-bit word in one step and acts as a
data pointer for checking the OTP content.
1. Starting with a VP(start) pulse wait for the time period t0
then set the instruction counter to the word you want to
write (td = t1).
2. Enter the data you want to store in the shift register
(td = t2 or t3). Enter the LSB first (bit 8) and the MSB
last (bit 1).
3. Apply the two-stage programming pulse (Vpre-store then
V
store) stores the word. The delay between the last
There are five different instruction states (states 3 and 5
are handled as state 4):
data bit and the pre-store pulse (Vpre-store) is td = t4.
The example shown in Fig.7 performs the following
functions:
• State 1: measurement of the quartz crystal oscillator
frequency (divided by 1024)
• Start
• State 2: measurement of the inhibit time
• State 3: write/check word A
• Setting instruction counter to state 4 (word B)
• Entering data word 110101 into the shift register
(sequence: first bit 6 and last bit 1)
• State 4: write/check word B
• State 5: write/check word C.
• Writing to the OTP cells for word B.
Each instruction state is switched on with a pulse to
VP (6.7 V). After this large pulse, an initial waiting time of
t0 (20 ms) is required. The programming instructions are
then entered by modulating the supply voltage with small
pulses (amplitude VP(mod) = 0.35 V and pulse width
tmod = 30 µs). The first small pulse defines the start time,
the following pulses perform three different functions,
depending on the delay from the preceding pulse
(see Figs 7, 8, 11, and 12):
General start up sequence
You must follow the sequence below to ensure the correct
operation at start up:
1. Apply the supply voltage to the circuit.
2. Wait for at least 2 seconds.
3. Connect the pad RESET to VDD for a minimum of 62
ms (this activates the stop mode).
• t1 = 0.7 ms: increments the instruction counter
4. Disconnect the pad RESET from VDD (this resets the
circuit to normal operating mode).
• t2 = 1.7 ms: clocks the shift register with data = logic 0
• t3 = 2.7 ms: clocks the shift register with data = logic 1.
After this sequence the memory contents are read
immediately and the programmed options are set. This
sequence also resets all major circuit blocks and ensures
that they function correctly.
The programming procedure requires a stable oscillator.
This means that a waiting time, determined by the start-up
time of the oscillator is necessary after power-up of the
circuit.
After the VP(start) pulse, the instruction counter is in state 1
and the data shift register is cleared.
The instruction state ends with a second pulse to VP(stop)
or with a pulse to Vstore
.
In any case, the instruction states are terminated
automatically 2 seconds after the last VDD(mod) pulse.
2003 Dec 17
9
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
t
pre-store
V
DD(mod)
V
store
t
p(start)
V
V
P(start)
pre-store
t
t
t
t
t
t
t
t
t
t
t
t
0
1
1
1
3
2
3
2
3
3
4
store
V
P(mod)
V
DD
V
SS
MGW356
Fig.7 Supply voltage modulation for programming.
Checking memory content
If the addressed OTP cell contains a logic 1, a 30 kΩ
resistor is connected between VDD and VSS, which
increases the supply current accordingly.
The stored data of the OTP array can be checked bit wise
by measuring the supply current. The array word is
selected by the instruction state and the bit is addressed
by the shift register.
Figure 8 shows the supply voltage modulation for reading
word B, with the corresponding supply current variation for
word B = 110101 (sequence: first MSB and last LSB).
To read a word, the word is first selected (pulse
distance t1), and a logic 1 is written into the first cell of the
shift register (pulse distance t3). This logic 1 is then shifted
through the entire shift register (pulse distance t2), so that
it points with each clock pulse to the next bit.
2003 Dec 17
10
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
V
DD(mod)
t
p(start)
t
p(stop)
V
P(start)
V
P(stop)
t
t
t
t
t
t
t
t
t
t
0
1
1
1
3
2
2
2
2
2
V
P(mod)
V
DD
V
SS
I
DD
(1)
mgw357
VDD
(1) ∆IDD
=
---------------
30 kΩ
Fig.8 Supply voltage modulation and corresponding supply current variation for reading word B.
Frequency tuning of assembled watch
Figure 9 shows the test set-up for frequency tuning the assembled watch.
32 kHz
M
PCA200x
FREQUENCY
COUNTER
motor
PROGRAMMABLE
DC POWER SUPPLY
battery
PC INTERFACE
PC
MGW568
Fig.9 Frequency tuning at assembled watch.
2003 Dec 17
11
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
Measurement of oscillator frequency and inhibit time
Customer testing
The output of the two measuring states can either be
monitored directly at pad RESET or as a modulation of the
supply voltage (a modulating resistor of 30 kΩ is
connected between VDD and VSS when the signal at
pad RESET is at HIGH-level).
Connecting pad RESET to VSS activates the test mode. In
this test mode, the motor output frequency is 8 Hz; the duty
cycle reduction and battery check occurs every second,
instead of every 4 minutes. If the supply voltage drops
below the EOL threshold voltage, the motor output
frequency is 32 Hz with the highest driving level.
You must follow the supply voltage modulation (see
Fig.10)) in order to guarantee the correct start up of the
circuit during production and testing.
EOL of battery
The supply voltage is checked every 4 minutes. If it drops
below the EOL reference (1.38 V for silver-oxide, 2.5 V for
lithium batteries), the motor steps change from one pulse
per second to a burst of four pulses every 4 seconds. The
step detection is switched off, and the motor is driven with
the highest pulse level.
t
p(stop)
V
DD
V
P(stop)
Only the PCA2000 has an EOL function.
t
> 500 ms
(start)
V
DD(nom)
V
handbook, halfpage
DD
V
t
t
SS
p(stop)
p(start)
001aaa055
V
V
P(stop)
P(start)
Fig.10 Supply voltage at start up during production
and testing.
t
t
1
0
V
P(mod)
V
Measuring states:
DD(nom)
V
SS
• State 1: quartz crystal oscillator frequency divided by
1024; state 1 starts with a pulse to VP and ends with a
second pulse to VP
MGU719
Fig.12 Supply voltage modulation for starting and
stopping of instruction state 2.
• State 2: inhibit time (see Figs 11 and 12); a signal with
periodicity of 31.25 + n × 0.122 ms appears at
pad RESET and as current modulation at pad VDD
.
31.25 ms + inhibition time
handbook, halfpage
V
DD
V
SS
MGW355
Fig.11 Output waveform at pad RESET for
instruction state 2.
2003 Dec 17
12
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
MAX.
UNIT
VDD
Vi
VSS = 0 V; notes 1 and 2
−1.8
SS − 0.5
+7.0
V
all input voltages
V
VDD + 0.5
+60
V
Tamb
Tstg
to(sc)
ambient temperature
storage temperature
output short-circuit duration
−10
−30
°C
°C
s
+100
indefinite
Notes
1. For writing to the OTP cells, the supply voltage VDD can be raised to a maximum of 12 V for a period of 1 second.
2. Connecting the battery with reversed polarity does not destroy the circuit, but in this condition a large current flows,
which rapidly discharges the battery.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However to be totally safe, it is
advised to undertake handling precautions appropriate to handling MOS devices. Advice can be found in
“Data handbook IC16: General; handling MOS devices”.
CHARACTERISTICS
VDD = 1.55 V; VSS = 0 V; fosc = 32.768 kHz; Tamb = 25 °C; quartz crystal: RS = 40 kΩ, C1 = 2 to 3 fF, CL = 8.2 pF; unless
otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
Supply
VDD
supply voltage
normal operating mode;
1.10
1.55
3.60
V
Tamb = −10 to +60 °C
∆VDD
supply voltage variation
supply current
∆V/∆t = 1 V/µs
−
−
−
−
−
−
0.25
120
180
200
135
V
IDD
between motor pulses
90
120
−
nA
nA
nA
nA
between motor pulses at VDD = 3.5 V
Tamb = −10 to +60 °C
stop mode; pad RESET connected to VDD
100
Motor output
Vsat
Zsc
saturation voltage
RM = 2 kΩ; Tamb = −10 to +60 °C; note 1
−
−
150
200
200
300
mV
short-circuit impedance
between motor pulses; Imotor < 1 mA
Ω
Oscillator
Vstart
gm
starting voltage
1.1
5
−
−
V
transconductance
start-up time
V
OSCIN ≤ 50 mV (p-p)
10
0.3
0.05
5.2
−
−
µS
s
tosc
−
0.9
0.20
6.3
−
∆f/f
frequency stability
integrated load capacitance
parasitic resistance
∆VDD = 100 mV
−
ppm
pF
MΩ
Cint
Rpar
4.3
allowed resistance between adjacent pads 20
2003 Dec 17
13
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
Voltage level detector
Vth(EOL)
EOL threshold voltage
silver-oxide battery
1.30
2.35
−
1.38
2.50
−0.07
1.46
2.65
−
V
lithium battery
V
TCEOL
temperature coefficient
%/°C
Pad RESET
fo
output frequency
−
32
−
−
Hz
V
∆Vo
tr, tf
Ii(AV)
output voltage swing
rise and fall time
RL = 1 MΩ; CL = 10 pF; note 2
RL = 1 MΩ; CL = 10 pF; note 2
pad RESET connected to VDD or VSS
1.4
−
−
1
−
µs
nA
average input current
−
10
20
Notes
1. Σ (P + N).
2. RL and CL are a load resistor and load capacitor, externally connected to pad RESET.
Table 6 Specifications for OTP programming (see Figs 7, 8 and 12).
SYMBOL
PARAMETER(1)
MIN.
1.5
TYP. MAX. UNIT
VDD
supply voltage during programming procedure
supply voltage for starting programming procedure
supply voltage for stopping programming procedure
supply voltage modulation for entering instructions
supply voltage for pre-store pulse
−
3.0
6.8
6.4
380
6.4
10.1
10
V
VP(start)
VP(stop)
VP(mod)
Vpre-store
Vstore
Istore
tp(start)
tp(stop)
tmod
6.6
6.2
320
6.2
9.9
−
−
V
−
V
350
−
mV
V
supply voltage for writing to the OTP cells
supply current for writing to the OTP cells
pulse width of start pulse
10.0
−
V
mA
ms
ms
µs
8
10
−
12
pulse width of stop pulse
0.05
25
0.5
40
modulation pulse width
30
−
tpre-store
tstore
t0
pulse width of pre-store pulse
0.05
95
0.5
110
30
ms
ms
ms
ms
ms
ms
ms
V/µs
kΩ
pulse width for writing to the OTP cells
waiting time after start pulse
100
−
20
t1
pulse distance for incrementing the state counter
pulse distance for clocking the data register with data = logic 0
pulse distance for clocking the data register with data = logic 1
waiting time for writing to OTP cells
0.6
1.6
2.6
0.1
0.5
18
0.7
1.7
2.7
0.2
−
0.8
1.8
2.8
0.3
5.0
45
t2
t3
t4
SR
slew rate for modulation of the supply voltage
supply current modulation read-out resistor
Rread
30
Note
1. Program each word once only.
2003 Dec 17
14
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
BONDING PAD LOCATIONS
COORDINATES(1)
Table 7 Mechanical chip data; note 1
PARAMETER
Bonding pad:
VALUE
SYMBOL
PAD
x
y
metal
96 × 96 µm
(3)
VSS
1
2
3
4
5
6
7
8
−480
−480
−480
−480
+480
+480
+480
+480
+330
+160
−160
−330
−330
−160
+160
+330
opening
86 × 86 µm
TEST(2)
OSCIN
OSCOUT
VDD
Thickness:
chip for bonding
chip for golden bumps
Bumps:
200 ±25 µm
270 ±25 µm
MOT1
height
25 ±5 µm
MOT2
RESET
Note
1. The substrate of the chip is connected to VSS
.
Notes
1. All coordinates are referenced, in µm, to the centre of
the die (see Fig.13).
2. Pad TEST is used for factory tests; in normal operation
it should be left open-circuit, and it has an internal
pull-down resistance to VSS
3. The substrate (rear side of the chip) is connected to
SS. Therefore the die pad must be either floating or
connected to VSS
.
V
.
1.20 mm
handbook, halfpage
V
8
7
1
2
RESET
MOT2
SS
y
TEST
x
0.90 mm
0
0
MOT1
OSCIN
3
4
6
OSCOUT
V
5
DD
MGW353
Fig.13 Bonding pad locations.
2003 Dec 17
15
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
TRAY INFORMATION
A
x
G
C
H
y
1,1 2,1 3,1
1,2 2,2
1,3
x,1
D
B
F
x,y
1,y
A
A
E
M
J
SECTION A-A
MGU653
Fig.14 Tray details.
Table 8 Tray dimensions
DIMENSION
DESCRIPTION
VALUE
2.15 mm
2.43 mm
A
B
C
D
E
F
pocket pitch; x direction
pocket pitch; y direction
pocket width; x direction
pocket width; y direction
tray width; x direction
tray width; y direction
handbook, halfpage
1.01 mm
1.39 mm
50.67 mm
50.67 mm
G
distance from cut corner to 4.86 mm
pocket (1, 1) centre
H
distance from cut corner to 4.66 mm
pocket (1, 1) centre
MGU652
J
M
x
tray thickness
pocket depth
3.94 mm
0.61 mm
20
The orientation of the IC in a pocket is indicated by the
position of the IC type name on the surface of the die, with
respect to the cut corner on the upper left of the tray.
number of pockets in
x direction
y
number of pockets in
y direction
18
Fig.15 Tray alignment.
2003 Dec 17
16
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2003 Dec 17
17
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
Bare die
All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for
a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be
separately indicated in the data sheet. There are no post packing tests performed on individual die or wafer. Philips
Semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die.
Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems
after third party sawing, handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify
their application in which the die is used.
2003 Dec 17
18
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R15/03/pp19
Date of release: 2003 Dec 17
Document order number: 9397 750 11757
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