PCA9516APW [NXP]
5-channel I2C hub; 5通道I2C集线器
| 型号： | PCA9516APW |
| 厂家： | 
NXP |
| 描述： | 5-channel I2C hub |
| 文件： | 总13页 (文件大小：122K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
PCA9516A
5-channel I2C hub
Product data sheet
2004 Sep 29
Supersedes data of 2004 May 28
Philips
Semiconductors
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
DESCRIPTION
The PCA9516A is a CMOS integrated circuit intended for application
2
in I C and SMBus systems.
2
While retaining all the operating modes and features of the I C
2
system, it permits extension of the I C-bus by buffering both the data
(SDA) and the clock (SCL) lines, thus enabling five buses of 400 pF.
2
The I C-bus capacitance limit of 400 pF restricts the number of
devices and bus length. Using the PCA9516A enables the system
designer to divide the bus into five segments off of a hub where any
segment to segment transition sees only one repeater delay.
FEATURES
• 5 channel, bi-directional buffer
• I C-bus and SMBus compatible
• Active HIGH individual repeater enable input
• Open-drain input/outputs
• Lock-up free operation
It can also be used to run different buses at 5 V and 3.3 V or
400 kHz and 100 kHz buses where the 100 kHz bus is isolated
when 400 kHz operation of the other bus is required.
2
Two or more PCA9516As cannot be put in series. The
PCA9516A design does not allow this configuration. Since there is
no direction pin, slightly different “legal” low voltage levels are used
to avoid lock-up conditions between the input and the output of each
repeater in the hub. A “regular LOW” applied at the input of a
PCA9516A will be propagated as a “buffered LOW” with a slightly
higher value on all the enabled outputs. When this “buffered LOW” is
applied to another PCA9515A, PCA9516A, or PCA9518 in series,
the second PCA9515A, PCA9516A, or PCA9518 will not recognize
it as a “regular LOW” and will not propagate it as a “buffered LOW”
again. The PCA9510/9511/9513/9514 and PCA9512 cannot be used
in series with the PCA9515A, PCA9516A, or PCA9518 but can be
used in series with themselves since they use shifting instead of
static offsets to avoid lock-up conditions.
• Supports arbitration and clock stretching across the repeater
2
• Accommodates standard mode and fast mode I C devices and
multiple masters
2
• Powered-off high impedance I C pins
• Operating supply voltage range of 2.3 V to 3.6 V
2
• 5.5 V tolerant I C and enable pins
1
• 0 kHz to 400 kHz clock frequency
• ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115, and 1000 V CDM per
JESD22-C101.
• Latch-up testing is done to JEDEC Standard JESD78 which
exceeds 100 mA.
• Package offerings: SO16 and TSSOP16
ORDERING INFORMATION
DESCRIPTION
16-pin plastic SO
TEMPERATURE RANGE
–40 °C to +85 °C
ORDER CODE
PCA9516AD
TOPSIDE MARK
PCA9516AD
PA9516A
DRAWING NUMBER
SOT109-1
16-pin plastic TSSOP
–40 °C to +85 °C
PCA9516APW
SOT403-1
Standard packing quantities and other packaging data is available at www.standardproducts.philips.com/packaging.
1.
The maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater.
2
2004 Sep 29
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
PIN CONFIGURATION
PIN DESCRIPTION
PIN
1
SYMBOL
SCL0
FUNCTION
Serial clock bus 0
SCL0
SDA0
1
2
3
4
5
6
7
8
16
15
14
V
CC
EN4
2
SDA0
SCL1
SDA1
EN1
Serial data bus 0
Serial clock bus 1
Serial data bus 1
SCL1
SDA1
SDA4
3
13
SCL4
EN3
4
EN1
12
11
10
5
Active-HIGH Bus 1 enable Input
Serial clock bus 2
SCL2
SDA3
6
SCL2
SDA2
GND
EN2
SDA2
GND
SCL3
EN2
7
Serial data bus 2
9
8
Supply ground
SU01395
9
Active-HIGH Bus 2 enable Input
Serial clock bus 3
Figure 1. Pin configuration
10
11
12
13
14
15
16
SCL3
SDA3
EN3
Serial data bus 3
Active-HIGH Bus 3 enable Input
Serial clock bus 4
SCL4
SDA4
EN4
Serial data bus 4
Active-HIGH Bus 4 enable Input
Supply power
V
CC
3
2004 Sep 29
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
BLOCK DIAGRAM
V
CC
PCA9516A
SCL0
BUFFER
SCL4
SCL3
BUFFER
BUFFER
HUB
LOGIC
SCL1
SCL2
BUFFER
BUFFER
SDA0
BUFFER
SDA4
SDA3
BUFFER
BUFFER
HUB
LOGIC
SDA1
SDA2
BUFFER
BUFFER
EN1
EN2
EN4
EN3
SW02248
GND
Figure 2. Block Diagram: PCA9516A
A more detailed view of Figure 2 buffer is shown in Figure 3.
To output
Data
z
In
Inc
Enable
SW00712
Figure 3.
The output pull-down of each internal buffer is set for approximately
0.5 V, while the input threshold of each internal buffer is set about
0.07 V lower, when the output is internally driven LOW. This
prevents a lock-up condition from occurring.
4
2004 Sep 29
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
SDA0/SCL0. If the SDA0/SCL0 port is not used, the pins need to be
FUNCTIONAL DESCRIPTION
2
pulled to V through appropriately sized resistors.
CC
The PCA9516A is a five way hub repeater, which enables I C and
similar bus systems to be expanded with only one repeater delay
and no functional degradation of system performance.
The PCA9516A is 5.5 V tolerant so it does not require any additional
circuitry to translate between the different bus voltages.
The PCA9516A contains five bi-directional, open drain buffers
specifically designed to support the standard low-level-contention
arbitration of the I C-bus. Except during arbitration or clock
stretching, the PCA9516A acts like five pairs of non-inverting, open
drain buffers, one for SDA and one for SCL.
When one side of the PCA9516A is pulled LOW by a device on the
I C-bus, a CMOS hysteresis type input detects the falling edge and
causes an internal driver on the other side to turn on, thus causing
the other side to also go LOW. The side driven LOW by the
2
2
PCA9516A will typically be at V = 0.5 V.
OL
Enable
The enable pins EN1 through EN4 are active HIGH and have
internal pull-up resistors. Each enable pin ENn controls its
associated SDAn and SCLn ports. When LOW, the ENn pin blocks
the inputs from SDAn and SCLn as well as disabling the output
drivers on the SDAn and SCLn pins. The enable pins should only
change state when both the global bus and the local port are in an
idle state to prevent system failures.
3.3 V
5 V
3.3 V
5 V
SDA
SCL
BUS
MASTER
SDA0
SCL0
SDA1
SCL1
SDA
SCL
SLAVE 1
400 kHz
The active HIGH enable pins allow the use of open drain drivers
which can be wire-ORed to create a distributed enable where either
centralized control signal (master) or spoke signal (submaster) can
enable the channel when it is idle.
EN1
EN2
EN3
EN4
2
I C Systems
2
As with the standard I C system, pull-up resistors are required to
provide the logic HIGH levels on the Buffered bus. (Standard
2
400 kHz
open-collector configuration of the I C-bus). The size of these
SDA2
SCL2
SDA
SCL
pull-up resistors depends on the system, but each side of the
repeater must have a pull-up resistor. This part is designed to work
SLAVE 2
400 kHz
2
with standard mode and fast mode I C devices in addition to SMBus
2
devices. Standard mode I C devices only specify 3 mA output drive,
PCA9516A
2
this limits the termination current to 3 mA in a generic I C system
where standard mode devices and multiple masters are possible.
2
Please see Application Note AN255 “I C & SMBus Repeaters, Hubs
and Expanders” for additional information on sizing resistors and
precautions when using more than one PCA9515A/PCA9516A in a
system or using the PCA9515A/16A in conjunction with the P82B96.
SDA3
SDA
SCL
SLAVE 3
100 kHz
SCL3
APPLICATION INFORMATION
3.3 V or 5 V
A typical application is shown in Figure 4. In this example, the
2
system master is running on a 3.3 V I C-bus while the slave is
connected to a 5 V bus. All buses run at 100 kHz unless slave 3 is
isolated and then the master bus and slave 1 and 2 can run at
400 kHz.
SDA4
SCL4
Any segment of the hub can talk to any other segment of the hub.
Bus masters and slaves can be located on all five segments with
400 pF load allowed on each segment.
SW02249
Unused ports should be isolated by holding the enable pin to GND
and/or pulling SDA/SCL pins to V through appropriately sized
CC
resistors. The primary bus master is normally connected to
Figure 4. Typical application
5
2004 Sep 29
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
In order to illustrate what would be seen in a typical application,
refer to Figures 5 and 6. If the bus master in Figure 4 were to write
to the slave through the PCA9516A, we would see the waveform
On the Bus 1 side of the PCA9516A, the clock and data lines would
have a positive offset from ground equal to the V of the
OL
PCA9516A. After the 8th clock pulse, the data line will be pulled to
2
shown in Figure 5 on Bus 0. This looks like a normal I C
the V of the slave device that is very close to ground in our
OL
transmission until the falling edge of the 8th clock pulse. At that
point, the master releases the data line (SDA) while the slave pulls it
example.
It is important to note that any arbitration or clock stretching events
on Bus 1 require that the V of the devices on Bus 1 be 70 mV
below the V of the PCA9516A (see V – V in the DC
Characteristics section) to be recognized by the PCA9516A and
then transmitted to Bus 0.
LOW through the PCA9516A. Because the V of the PCA9516A is
OL
OL
typically around 0.5 V, a step in the SDA will be seen. After the
master has transmitted the 9th clock pulse, the slave releases the
data line.
OL
OL
ilc
2 V/DIV
9th CLOCK PULSE
V
OF PCA9516A
OL
V
OF MASTER
OL
SW02250
Figure 5. Bus 0 waveform
2 V/DIV
9th CLOCK PULSE
V
OF PCA9516A
OL
V
OF SLAVE
OL
SW02251
Figure 6. Bus 1 waveform
6
2004 Sep 29
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
ABSOLUTE MAXIMUM RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134).
Voltages with respect to pin GND.
LIMITS
SYMBOL
PARAMETER
MIN.
–0.5
–0.5
—
MAX.
+7
UNIT
V
V
V
I
to GND
Supply voltage range V
CC
CC
2
Voltage range I C-bus, SCL or SDA
DC current (any pin)
+7
V
bus
50
mA
mW
°C
P
Power dissipation
—
300
+125
+85
tot
T
Storage temperature range
Operating ambient temperature range
–55
–40
stg
T
°C
amb
DC ELECTRICAL CHARACTERISTICS
V
CC
= 3.0 V to 3.6 V; GND = 0 V; T
= –40 °C to +85 °C; unless otherwise specified.
amb
LIMITS
SYMBOL
Supplies
PARAMETER
TEST CONDITIONS
UNIT
2
MIN.
TYP.
MAX.
V
DC supply voltage
3.0
—
—
3.6
5
V
CC
I
Quiescent supply current,
both channels HIGH
V
= 3.6 V;
2.1
mA
CCH
CC
SDAn = SCLn = V
CC
I
Quiescent supply current,
both channels LOW
V
= 3.6 V;
—
—
4.7
4.0
10
10
mA
mA
CCL
CC
one SDA and one SCL = GND,
other SDA and SCL open
I
Quiescent supply current in contention
V
CC
= 3.6 V;
CCLc
SDAn = SCLn = GND
Input SCL; input/output SDA
V
HIGH-level input voltage
0.7 V
—
—
—
5.5
V
V
V
IH
CC
V
LOW-level input voltage (Note 1)
–0.5
–0.5
0.3 V
CC
IL
V
ILc
LOW-level input voltage contention
(Note 1)
0.4
V
Input clamp voltage
I = –18 mA
—
–1
—
—
–1.2
1
V
µA
µA
V
IK
I
I
I
Input leakage current
V = 3.6 V
I
LI
Input current LOW, SDA, SCL
LOW-level output voltage
V = 0.2 V, SDA, SCL
I
—
—
5
IL
V
OL
I
OL
= 0 or 6 mA
0.47
—
0.52
—
0.6
70
V
–V
LOW-level input voltage below
output LOW-level voltage
Guaranteed by design
mV
OL
ILc
C
Input capacitance
V = 3 V or 0 V
I
—
6
10
pF
I
Enable 1–4
V
LOW-level input voltage
HIGH-level input voltage
Input current LOW, EN1–EN4
Input leakage current
–0.5
2.0
—
—
—
0.8
5.5
–30
1
V
IL
IH
IL
V
I
V
V = 0.2 V, EN1–EN4
–12
—
µA
µA
pF
I
I
LI
–1
C
Input capacitance
V = 3.0 V or 0 V
I
—
6
7
I
NOTES:
1. V specification is for the first LOW level seen by the SDAx/SCLx lines. V is for the second and subsequent LOW levels seen by the
IL
ILc
SDAx/SCLx lines.
2. Typical value taken at 3.3 V and 25 °C.
3. For operation between published voltage ranges, refer to worst case parameter in both ranges.
7
2004 Sep 29
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
DC ELECTRICAL CHARACTERISTICS
V
CC
= 2.3 V to 2.7 V; GND = 0 V; T
= –40 °C to +85 °C; unless otherwise specified.
amb
LIMITS
SYMBOL
Supplies
PARAMETER
TEST CONDITIONS
UNIT
MAX.
2
MIN.
TYP.
V
DC supply voltage
2.3
—
—
2.7
5
V
CC
I
Quiescent supply current,
both channels HIGH
V
= 2.7 V;
2.1
mA
CCH
CC
SDAn = SCLn = V
CC
I
Quiescent supply current,
both channels LOW
V
= 2.7 V;
—
—
4.6
3.9
10
10
mA
mA
CCL
CC
one SDA and one SCL = GND,
other SDA and SCL open
I
Quiescent supply current in contention
V
CC
= 2.7 V;
CCLc
SDAn = SCLn = GND
Input SCL; input/output SDA
V
HIGH-level input voltage
0.7 V
—
—
—
5.5
V
V
V
IH
CC
V
LOW-level input voltage (Note 1)
–0.5
–0.5
0.3 V
CC
IL
V
ILc
LOW-level input voltage contention
(Note 1)
0.4
V
Input clamp voltage
I = –18 mA
—
–1
—
—
–1.2
1
V
µA
µA
V
IK
I
I
I
Input leakage current
V = 2.7 V
I
LI
Input current LOW, SDA, SCL
LOW-level output voltage
V = 0.2 V, SDA, SCL
I
—
—
5
IL
V
OL
I
OL
= 0 or 6 mA
0.47
—
0.52
—
0.6
70
V
–V
LOW-level input voltage below
output LOW-level voltage
Guaranteed by design
mV
OL
ILc
C
Input capacitance
V = 3 V or 0 V
I
—
6
10
pF
I
Enable 1–4
V
LOW-level input voltage
HIGH-level input voltage
Input current LOW, EN1–EN4
Input leakage current
–0.5
1.5
—
—
—
0.8
5.5
–30
1
V
IL
IH
IL
V
I
V
V = 0.2 V, EN1–EN4
–10
—
µA
µA
pF
I
I
LI
–1
C
Input capacitance
V = 3.0 V or 0 V
I
—
6
7
I
NOTES:
1. V specification is for the first LOW level seen by the SDAx/SCLx lines. V is for the second and subsequent LOW levels seen by the
IL
ILc
SDAx/SCLx lines.
2. Typical value taken at 2.5 V and 25 °C.
8
2004 Sep 29
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
AC ELECTRICAL CHARACTERISTICS
V
CC
= 2.3 V to 2.7 V
LIMITS
SYMBOL
PARAMETER
Propagation delay
TEST CONDITIONS
Waveform 1
UNIT
MAX.
2
MIN.
45
TYP.
t
t
t
t
t
t
93
90
60
131
—
150
135
—
ns
ns
ns
ns
ns
ns
PHL
PLH
THL
TLH
SET
HOLD
Propagation delay
Transition time
Waveform 1; Note 1
Waveform 1
33
—
Transition time
Waveform 1; Note 1
—
—
Enable to Start condition
Enable after Stop condition
100
130
—
—
—
NOTES:
1. Different load resistance and capacitance will alter the RC time constant, thereby changing the propagation delay and transition times.
2. Typical value taken at 2.5 V and 25 °C.
AC ELECTRICAL CHARACTERISTICS
V
CC
= 3.0 V to 3.6 V
LIMITS
SYMBOL
PARAMETER
Propagation delay
TEST CONDITIONS
Waveform 1
UNIT
2
MIN.
45
TYP.
MAX.
120
83
t
t
t
t
t
t
75
60
47
130
—
ns
ns
ns
ns
ns
ns
PHL
PLH
THL
TLH
SET
HOLD
Propagation delay
Transition time
Waveform 1; Note 1
Waveform 1
33
—
—
Transition time
Waveform 1; Note 1
—
—
Enable to Start condition
Enable after Stop condition
100
100
—
—
—
NOTES:
1. Different load resistance and capacitance will alter the RC time constant, thereby changing the propagation delay and transition times.
2. Typical value taken at 3.3 V and 25 °C.
AC WAVEFORMS
TEST CIRCUIT
V
V
CC
CC
3.3 V
0.1 V
INPUT
1.5 V
1.5 V
R
L
V
V
OUT
IN
PULSE
GENERATOR
D.U.T.
t
t
PLH
PHL
3.3 V
C
80%
80%
R
T
L
OUTPUT
1.5 V
20%
1.5 V
20%
V
OL
t
t
TLH
THL
Test Circuit for Open Drain Outputs
DEFINITIONS
SW00646
R = Load resistor; 1.35 kΩ
L
Waveform 1.
C = Load capacitance includes jig and probe capacitance;
L
50 pF
R = Termination resistance should be equal to Z
T
of
OUT
pulse generators.
SW02280
Figure 7. Test circuit
9
2004 Sep 29
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
10
2004 Sep 29
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
11
2004 Sep 29
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
REVISION HISTORY
Rev
Date
Description
_2
20040929
Product data sheet (9397 750 14108). Supersedes data of 2004 May 28 (9397 750 13238).
Modifications:
• “Application information” section on page 5:
– First paragraph, third sentence:
change from “... unless slave 3 and 4 are isolated ...” to “... unless slave 3 is isolated ...”
– Add (new) third paragraph.
– Figure 4 modified.
_1
20040528
Product data sheet (9397 750 13238).
12
2004 Sep 29
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516A
2
2
Purchase of Philips I C components conveys a license under the Philips’ I C patent
2
to use the components in the I C system provided the system conforms to the
I C specifications defined by Philips. This specification can be ordered using the
2
code 9398 393 40011.
Data sheet status
Product
status
Definitions
[1]
Level
Data sheet status
[2] [3]
I
Objective data
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limitingvaluesdefinition— Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no
representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree
to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated
viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys
nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,
copyright, or mask work right infringement, unless otherwise specified.
Koninklijke Philips Electronics N.V. 2004
All rights reserved. Published in the U.S.A.
Contact information
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
Date of release: 09-04
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Document number:
9397 750 14108
Philips
Semiconductors
相关型号：
PCA9516D,118
IC SPECIALTY INTERFACE CIRCUIT, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT109-1, SOP-16, Interface IC:Other
NXP
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