PCF8591_技术文档

INTEGRATED CIRCUITS

DATA SHEET

PCF8591

8-bit A/D and D/A converter

1998 Jul 02

Product speciﬁcation

Supersedes data of 1997 Apr 02

File under Integrated Circuits, IC12

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

CONTENTS

1

2

3

4

5

6

7

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

ORDERING INFORMATION

BLOCK DIAGRAM

PINNING

FUNCTIONAL DESCRIPTION

7.1

7.2

7.3

7.4

7.5

7.6

Addressing

Control byte

D/A conversion

A/D conversion

Reference voltage

Oscillator

8

CHARACTERISTICS OF THE I²C-BUS

8.1

8.2

8.3

8.4

8.5

Bit transfer

Start and stop conditions

System configuration

Acknowledge

I²C-bus protocol

9

LIMITING VALUES

10

11

12

13

14

15

16

17

HANDLING

DC CHARACTERISTICS

D/A CHARACTERISTICS

A/D CHARACTERISTICS

AC CHARACTERISTICS

APPLICATION INFORMATION

PACKAGE OUTLINES

SOLDERING

17.1

Introduction

17.2

DIP

17.2.1

17.2.2

17.3

Soldering by dipping or by wave

Repairing soldered joints

SO

17.3.1

17.3.2

17.3.3

Reflow soldering

Wave soldering

Repairing soldered joints

18

19

20

DEFINITIONS

LIFE SUPPORT APPLICATIONS

PURCHASE OF PHILIPS I²C COMPONENTS

1998 Jul 02

2

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

1

FEATURES

• Single power supply

• Operating supply voltage 2.5 V to 6 V

• Low standby current

• Serial input/output via I²C-bus

• Address by 3 hardware address pins

• Sampling rate given by I²C-bus speed

3

GENERAL DESCRIPTION

The PCF8591 is a single-chip, single-supply low power

8-bit CMOS data acquisition device with four analog

inputs, one analog output and a serial I²C-bus interface.

Three address pins A0, A1 and A2 are used for

programming the hardware address, allowing the use of

up to eight devices connected to the I²C-bus without

additional hardware. Address, control and data to and from

the device are transferred serially via the two-line

bidirectional I²C-bus.

• 4 analog inputs programmable as single-ended or

differential inputs

• Auto-incremented channel selection

• Analog voltage range from V_SSto V_DD

• On-chip track and hold circuit

• 8-bit successive approximation A/D conversion

• Multiplying DAC with one analog output.

The functions of the device include analog input

multiplexing, on-chip track and hold function, 8-bit

analog-to-digital conversion and an 8-bit digital-to-analog

conversion. The maximum conversion rate is given by the

maximum speed of the I²C-bus.

2

APPLICATIONS

• Closed loop control systems

• Low power converter for remote data acquisition

• Battery operated equipment

• Acquisition of analog values in automotive, audio and

TV applications.

4

ORDERING INFORMATION

TYPE

PACKAGE

NUMBER

NAME

DESCRIPTION

VERSION

PCA8591P

PCA8591T

DIP16

SO16

plastic dual in-line package; 16 leads (300 mil); long body

plastic small outline package; 16 leads; body width 7.5 mm

SOT38-1

SOT162-1

1998 Jul 02

3

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

6

PINNING

SYMBOL PIN

DESCRIPTION

AINO

AIN1

AIN2

AIN3

A0

1

2

analog inputs

(A/D converter)

3

4

5

A1

6

hardware address

A2

7

V_SS

8

negative supply voltage

I²C-bus data input/output

I²C-bus clock input

SDA

SCL

OSC

EXT

9

10

11

12

oscillator input/output

external/internal switch for oscillator

input

AGND

V_REF

13

14

15

16

analog ground

voltage reference input

analog output (D/A converter)

positive supply voltage

AOUT

V_DD

Fig.2 Pinning diagram.

1998 Jul 02

5

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

7

FUNCTIONAL DESCRIPTION

Addressing

7.2

Control byte

The second byte sent to a PCF8591 device will be stored

in its control register and is required to control the device

function.

7.1

Each PCF8591 device in an I²C-bus system is activated by

sending a valid address to the device. The address

consists of a fixed part and a programmable part.

The programmable part must be set according to the

address pins A0, A1 and A2. The address always has to

be sent as the first byte after the start condition in the

I²C-bus protocol. The last bit of the address byte is the

read/write-bit which sets the direction of the following data

transfer (see Figs 3, 15 and 16).

The upper nibble of the control register is used for enabling

the analog output, and for programming the analog inputs

as single-ended or differential inputs. The lower nibble

selects one of the analog input channels defined by the

upper nibble (see Fig.4). If the auto-increment flag is set

the channel number is incremented automatically after

each A/D conversion.

If the auto-increment mode is desired in applications

where the internal oscillator is used, the analog output

enable flag in the control byte (bit 6) should be set. This

allows the internal oscillator to run continuously, thereby

preventing conversion errors resulting from oscillator

start-up delay. The analog output enable flag may be reset

at other times to reduce quiescent power consumption.

Fig.3 Address byte.

The selection of a non-existing input channel results in the

highest available channel number being allocated.

Therefore, if the auto-increment flag is set, the next

selected channel will be always channel 0. The most

significant bits of both nibbles are reserved for future

functions and have to be set to 0. After a Power-on reset

condition all bits of the control register are reset to 0.

The D/A converter and the oscillator are disabled for power

saving. The analog output is switched to a high-impedance

state.

1998 Jul 02

6

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

Fig.4 Control byte.

7

1998 Jul 02

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

The on-chip D/A converter is also used for successive

approximation A/D conversion. In order to release the

DAC for an A/D conversion cycle the unity gain amplifier is

equipped with a track and hold circuit. This circuit holds the

output voltage while executing the A/D conversion.

7.3

D/A conversion

The third byte sent to a PCF8591 device is stored in the

DAC data register and is converted to the corresponding

analog voltage using the on-chip D/A converter. This D/A

converter consists of a resistor divider chain connected to

the external reference voltage with 256 taps and selection

switches. The tap-decoder switches one of these taps to

the DAC output line (see Fig.5).

The output voltage supplied to the analog output AOUT is

given by the formula shown in Fig.6. The waveforms of a

D/A conversion sequence are shown in Fig.7.

The analog output voltage is buffered by an auto-zeroed

unity gain amplifier. This buffer amplifier may be switched

on or off by setting the analog output enable flag of the

control register. In the active state the output voltage is

held until a further data byte is sent.

Fig.5 DAC resistor divider chain.

1998 Jul 02

8

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

Fig.6 DAC data and DC conversion characteristics.

Fig.7 D/A conversion sequence.

9

1998 Jul 02

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

The conversion result is stored in the ADC data register

and awaits transmission. If the auto-increment flag is set

the next channel is selected.

7.4

A/D conversion

The A/D converter makes use of the successive

approximation conversion technique. The on-chip D/A

converter and a high-gain comparator are used

temporarily during an A/D conversion cycle.

The first byte transmitted in a read cycle contains the

conversion result code of the previous read cycle. After a

Power-on reset condition the first byte read is a

hexadecimal 80. The protocol of an I²C-bus read cycle is

shown in Chapter 8, Figs 15 and 16.

An A/D conversion cycle is always started after sending a

valid read mode address to a PCF8591 device. The A/D

conversion cycle is triggered at the trailing edge of the

acknowledge clock pulse and is executed while

transmitting the result of the previous conversion (see

Fig.8).

The maximum A/D conversion rate is given by the actual

speed of the I²C-bus.

Once a conversion cycle is triggered an input voltage

sample of the selected channel is stored on the chip and is

converted to the corresponding 8-bit binary code. Samples

picked up from differential inputs are converted to an 8-bit

two’s complement code (see Figs 9 and 10).

Fig.8 A/D conversion sequence.

1998 Jul 02

10

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

Fig.9 A/D conversion characteristics of single-ended inputs.

Fig.10 A/D conversion characteristics of differential inputs.

11

1998 Jul 02

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

7.5

Reference voltage

7.6

Oscillator

For the D/A and A/D conversion either a stable external

voltage reference or the supply voltage has to be applied

to the resistor divider chain (pins V_REFand AGND).

The AGND pin has to be connected to the system analog

An on-chip oscillator generates the clock signal required

for the A/D conversion cycle and for refreshing the

auto-zeroed buffer amplifier. When using this oscillator the

EXT pin has to be connected to V_SS. At the OSC pin the

oscillator frequency is available.

ground and may have a DC off-set with reference to V_SS

.

A low frequency may be applied to the V_REFand AGND

pins. This allows the use of the D/A converter as a

one-quadrant multiplier; see Chapter 15 and Fig.6.

If the EXT pin is connected to V_DDthe oscillator output

OSC is switched to a high-impedance state allowing the

user to feed an external clock signal to OSC.

The A/D converter may also be used as a one or two

quadrant analog divider. The analog input voltage is

divided by the reference voltage. The result is converted to

a binary code. In this application the user has to keep the

reference voltage stable during the conversion cycle.

1998 Jul 02

12

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

8

CHARACTERISTICS OF THE I²C-BUS

The I²C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a serial data

line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data

transfer may be initiated only when the bus is not busy.

8.1

Bit transfer

One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period

of the clock pulse as changes in the data line at this time will be interpreted as a control signal.

handbook, full pagewidth

SDA

SCL

data line

stable;

data valid

change

of data

allowed

MBC621

Fig.11 Bit transfer.

8.2

Start and stop conditions

Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the

clock is HIGH, is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH, is

defined as the stop condition (P).

handbook, full pagewidth

SDA

SCL

SDA

SCL

S

P

STOP condition

START condition

MBC622

Fig.12 Definition of START and STOP condition.

1998 Jul 02

13

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

8.3

System conﬁguration

A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls

the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’.

SDA

SCL

MASTER

TRANSMITTER /

RECEIVER

SLAVE

TRANSMITTER /

RECEIVER

MASTER

TRANSMITTER /

RECEIVER

SLAVE

RECEIVER

MASTER

TRANSMITTER

MBA605

Fig.13 System configuration.

8.4

Acknowledge

The number of data bytes transferred between the start and stop conditions from transmitter to receiver is not limited.

Each data byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by

the transmitter whereas the master also generates an extra acknowledge related clock pulse. A slave receiver which is

addressed must generate an acknowledge after the reception of each byte. Also a master must generate an

acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that

acknowledges has to pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW

during the HIGH period of the acknowledge related clock pulse. A master receiver must signal an end of data to the

transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the

transmitter must leave the data line HIGH to enable the master to generate a stop condition.

handbook, full pagewidth

DATA OUTPUT

BY TRANSMITTER

not acknowledge

DATA OUTPUT

BY RECEIVER

acknowledge

SCL FROM

MASTER

1

2

8

9

S

clock pulse for

acknowledgement

START

condition

MBC602

Fig.14 Acknowledgement on the I²C-bus.

1998 Jul 02

14

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

8.5

I²C-bus protocol

After a start condition a valid hardware address has to be sent to a PCF8591 device. The read/write bit defines the

direction of the following single or multiple byte data transfer. For the format and the timing of the start condition (S), the

stop condition (P) and the acknowledge bit (A) refer to the I²C-bus characteristics. In the write mode a data transfer is

terminated by sending either a stop condition or the start condition of the next data transfer.

Fig.15 Bus protocol for write mode, D/A conversion.

Fig.16 Bus protocol for read mode, A/D conversion.

1998 Jul 02

15

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

9

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER

V_DDsupply voltage (pin 16)

MIN.

−0.5

MAX.

UNIT

+8.0

V_DD+ 0.5

±10

V

V_I

input voltage (any input)

DC input current

−0.5

−

V

I_I

mA

I_O

DC output current

−

±20

I_DD, I_SS

P_tot

P_O

V_DDor V_SScurrent

−

±50

total power dissipation per package

power dissipation per output

operating ambient temperature

storage temperature

−

300

mW

°C

−

100

T_amb

T_stg

−40

−65

+85

+150

°C

10 HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is

desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC12 under

“Handling MOS Devices”.

1998 Jul 02

16

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

11 DC CHARACTERISTICS

V_DD= 2.5 V to 6 V; V_SS= 0 V; T_amb= −40 °C to +85 °C unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply

V_DD

I_DD

supply voltage (operating)

supply current

2.5

−

6.0

V

standby

V_I= V_SSor V_DD; no load

f_SCL= 100 kHz

−

1

15

µA

mA

V

operating, AOUT off

operating, AOUT active

Power-on reset level

−

125

0.45

−

250

1.0

2.0

f_SCL= 100 kHz

−

V_POR

note 1

0.8

Digital inputs/output: SCL, SDA, A0, A1, A2

V_IL

V_IH

I_L

LOW level input voltage

HIGH level input voltage

leakage current

A0, A1, A2

0

−

0.3 × V_DD

V

0.7 × V_DD

V_DD

V_I= V_SSto V_DD

−250

−1

−

+250

+1

5

nA

µA

pF

mA

SCL, SDA

C_i

input capacitance

−

I_OL

LOW level SDA output current V_OL= 0.4 V

3.0

−

Reference voltage inputs

V_REF

V_AGND

I_LI

reference voltage

analog ground voltage

input leakage current

input resistance

V_REF> V_AGND; note 2

V_SS+ 1.6

V_SS

−

V_DD

V

−

V_DD− 0.8 V

−250

−

+250

nA

R_REF

pins V_REFand AGND

100

−

kΩ

Oscillator: OSC, EXT

I_LI

input leakage current

oscillator frequency

−

250

nA

f_OSC

0.75

1.25

MHz

Notes

1. The power on reset circuit resets the I²C-bus logic when V_DDis less than V_POR

2. A further extension of the range is possible, if the following conditions are fulfilled:

_REF+ V

.

V

_REF+ V

^AGND≥ 0.8V, V

--------------------------------------

–

^AGND≥ 0.4V

--------------------------------------

DD

2

1998 Jul 02

17

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

12 D/A CHARACTERISTICS

V_DD= 5.0 V; V_SS= 0 V; V_REF= 5.0 V; V_AGND= 0 V; R_L= 10 kΩ; C_L= 100 pF; T_amb= −40 °C to +85 °C unless otherwise

speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Analog output

V_OA

output voltage

no resistive load

V_SS

−

V_DD

V

R_L= 10 kΩ

V_SS

0.9 × V_DD

I_LO

output leakage current

AOUT disabled

−

250

nA

Accuracy

OS_e

L_e

offset error

T_amb= 25 °C

−

50

±1.5

1

mV

LSB

%

linearity error

−

G_e

gain error

no resistive load

to ¹⁄₂LSB full scale step

−

t_DAC

f_DAC

SNRR

settling time

−

90

11.1

−

µs

conversion rate

supply noise rejection ratio

−

kHz

dB

f = 100 Hz;

40

V_DDN= 0.1 × V_PP

13 A/D CHARACTERISTICS

V_DD= 5.0 V; V_SS= 0 V; V_REF= 5.0 V; V_AGND= 0 V; R_S= 10 kΩ; T_amb= −40 °C to +85 °C unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Analog inputs

V_IA

I_LIA

C_IA

C_ID

V_IS

V_ID

analog input voltage

V_SS

−

V_DD

V

analog input leakage current

analog input capacitance

differential input capacitance

single-ended voltage

−

100

−

nA

pF

V

−

10

−

measuring range

V_AGND

V_REF

differential voltage

measuring range;

V_FS= V_REF− V_AGND

−

V

–V_FS

+V_FS

------------

2

-------------

2

Accuracy

OS_e

L_e

offset error

T_amb= 25 °C

−

20

±1.5

1

mV

LSB

%

linearity error

gain error

−

G_e

−

GS_e

CMRR

small-signal gain error

∆V_i= 16 LSB

−

5

%

common-mode rejection

ratio

60

−

dB

SNRR

supply noise rejection ratio

f = 100 Hz;

−

40

−

dB

V_DDN= 0.1 × V_PP

t_ADC

f_ADC

conversion time

−

90

µs

sampling/conversion rate

11.1

kHz

1998 Jul 02

18

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

(a) Internal oscillator; T_amb= +27 °C.

(b) External oscillator.

Fig.17 Operating supply current as a function of supply voltage (analog output disabled).

(a) Output impedance near negative power rail; T_amb= +27 °C.

(b) Output impedance near positive power rail; T_amb= +27 °C.

The x-axis represents the hex input-code equivalent of the output voltage.

Fig.18 Output impedance of analog output buffer (near power rails).

1998 Jul 02

19

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

14 AC CHARACTERISTICS

All timing values are valid within the operating supply voltage and ambient temperature range and reference to V_ILand

_IHwith an input voltage swing of V_SSto V_DD

V

.

SYMBOL PARAMETER

I²C-bus timing (see Fig.19; note 1)

MIN.

TYP.

MAX.

UNIT

f_SCL

SCL clock frequency

−

100

kHz

t_SP

tolerable spike width on bus

bus free time

100

−

ns

µs

ns

µs

t_BUF

4.7

4.0

4.7

4.0

−

t_SU;STA

t_HD;STA

t_LOW

t_HIGH

t_r

START condition set-up time

START condition hold time

SCL LOW time

−

SCL HIGH time

−

SCL and SDA rise time

SCL and SDA fall time

data set-up time

1.0

0.3

−

t_f

−

t_SU;DAT

t_HD;DAT

t_VD;DAT

t_SU;STO

250

0

data hold time

−

SCL LOW-to-data out valid

STOP condition set-up time

−

3.4

−

4.0

Note

1. A detailed description of the I²C-bus specification, with applications, is given in brochure “The I²C-bus and how to

use it”. This brochure may be ordered using the code 9398 393 40011.

handbook, full pagewidth

START

CONDITION

(S)

BIT 7

MSB

(A7)

BIT 6

(A6)

BIT 0

LSB

(R/W)

ACKNOWLEDGE

(A)

STOP

CONDITION

(P)

PROTOCOL

t

HIGH

SU;STA

LOW

1 / f

SCL

SDA

t

f

BUF

r

t

HD;STA

SU;DAT

VD;DAT

SU;STO

HD;DAT

MBD820

Fig.19 I²C-bus timing diagram; rise and fall times refer to V_ILand V_IH.

1998 Jul 02

20

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

15 APPLICATION INFORMATION

Inputs must be connected to V_SSor V_DDwhen not in use. Analog inputs may also be connected to AGND or V_REF

.

In order to prevent excessive ground and supply noise and to minimize cross-talk of the digital to analog signal paths the

user has to design the printed-circuit board layout very carefully. Supply lines common to a PCF8591 device and noisy

digital circuits and ground loops should be avoided. Decoupling capacitors (>10 µF) are recommended for power supply

and reference voltage inputs.

Fig.20 Application diagram.

1998 Jul 02

21

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

16 PACKAGE OUTLINES

DIP16: plastic dual in-line package; 16 leads (300 mil); long body

SOT38-1

D

M

E

A

2

A

1

L

c

e

w M

Z

b

1

(e )

1

b

16

9

M

H

pin 1 index

E

1

8

0

5

10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

(1)

Z

A

2

(1)

1

w

UNIT

mm

b

c

D

E

e

L

M

H

1

E

max.

min.

max.

1.40

1.14

0.53

0.38

0.32

0.23

21.8

21.4

6.48

6.20

3.9

3.4

8.25

7.80

9.5

8.3

4.7

0.51

3.7

2.54

0.10

7.62

0.30

0.254

0.01

2.2

0.021

0.015

0.013

0.009

0.86

0.84

0.32

0.31

0.055

0.045

0.26

0.24

0.15

0.13

0.37

0.33

inches

0.19

0.020

0.15

0.087

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

EIAJ

92-10-02

95-01-19

SOT38-1

050G09

MO-001AE

1998 Jul 02

22

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

SO16: plastic small outline package; 16 leads; body width 7.5 mm

SOT162-1

D

E

A

X

c

H

v

M

A

E

y

Z

16

9

Q

A

2

A

(A )

3

A

1

pin 1 index

θ

L

p

L

1

8

detail X

e

w

M

b

p

0

5

10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

max.

(1)

UNIT

A

b

c

D

E

e

H

L

Q

v

w

y

θ

1

2

3

p

E

p

Z

0.30

0.10

2.45

2.25

0.49

0.36

0.32

0.23

10.5

10.1

7.6

7.4

10.65

10.00

1.1

0.4

1.1

1.0

0.9

0.4

mm

2.65

1.27

0.050

1.4

0.25

0.01

0.25

0.1

0.25

0.01

8^o

0^o

0.012 0.096

0.004 0.089

0.019 0.013 0.41

0.014 0.009 0.40

0.30

0.29

0.419

0.394

0.043 0.043

0.016 0.039

0.035

0.016

inches 0.10

0.055

0.01 0.004

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

EIAJ

95-01-24

97-05-22

SOT162-1

075E03

MS-013AA

1998 Jul 02

23

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

Several techniques exist for reflowing; for example,

17 SOLDERING

thermal conduction by heated belt. Dwell times vary

between 50 and 300 seconds depending on heating

method. Typical reflow temperatures range from

215 to 250 °C.

17.1 Introduction

There is no soldering method that is ideal for all IC

packages. Wave soldering is often preferred when

through-hole and surface mounted components are mixed

on one printed-circuit board. However, wave soldering is

not always suitable for surface mounted ICs, or for

printed-circuits with high population densities. In these

situations reflow soldering is often used.

Preheating is necessary to dry the paste and evaporate

the binding agent. Preheating duration: 45 minutes at

45 °C.

17.3.2 WAVE SOLDERING

This text gives a very brief insight to a complex technology.

A more in-depth account of soldering ICs can be found in

our “Data Handbook IC26; Integrated Circuit Packages”

(order code 9398 652 90011).

Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave) soldering

technique should be used.

17.2 DIP

• The longitudinal axis of the package footprint must be

parallel to the solder flow.

17.2.1 SOLDERING BY DIPPING OR BY WAVE

The maximum permissible temperature of the solder is

260 °C; solder at this temperature must not be in contact

with the joint for more than 5 seconds. The total contact

time of successive solder waves must not exceed

5 seconds.

• The package footprint must incorporate solder thieves at

the downstream end.

During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be

applied by screen printing, pin transfer or syringe

dispensing. The package can be soldered after the

adhesive is cured.

The device may be mounted up to the seating plane, but

the temperature of the plastic body must not exceed the

specified maximum storage temperature (T_{stg max}). If the

printed-circuit board has been pre-heated, forced cooling

may be necessary immediately after soldering to keep the

temperature within the permissible limit.

Maximum permissible solder temperature is 260 °C, and

maximum duration of package immersion in solder is

10 seconds, if cooled to less than 150 °C within

6 seconds. Typical dwell time is 4 seconds at 250 °C.

17.2.2 REPAIRING SOLDERED JOINTS

A mildly-activated flux will eliminate the need for removal

of corrosive residues in most applications.

Apply a low voltage soldering iron (less than 24 V) to the

lead(s) of the package, below the seating plane or not

more than 2 mm above it. If the temperature of the

soldering iron bit is less than 300 °C it may remain in

contact for up to 10 seconds. If the bit temperature is

between 300 and 400 °C, contact may be up to 5 seconds.

17.3.3 REPAIRING SOLDERED JOINTS

Fix the component by first soldering two diagonally-

opposite end leads. Use only a low voltage soldering iron

(less than 24 V) applied to the flat part of the lead. Contact

time must be limited to 10 seconds at up to 300 °C. When

using a dedicated tool, all other leads can be soldered in

one operation within 2 to 5 seconds between

270 and 320 °C.

17.3 SO

17.3.1 REFLOW SOLDERING

Reflow soldering techniques are suitable for all SO

packages.

Reflow soldering requires solder paste (a suspension of

fine solder particles, flux and binding agent) to be applied

to the printed-circuit board by screen printing, stencilling or

pressure-syringe dispensing before package placement.

1998 Jul 02

24

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

18 DEFINITIONS

Data sheet status

Objective speciﬁcation

Preliminary speciﬁcation

Product speciﬁcation

This data sheet contains target or goal speciﬁcations for product development.

This data sheet contains preliminary data; supplementary data may be published later.

This data sheet contains ﬁnal product speciﬁcations.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or

more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation

of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation

is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the speciﬁcation.

19 LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these

products can reasonably be expected to result in personal injury. Philips customers using or selling these products for

use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such

improper use or sale.

20 PURCHASE OF PHILIPS I²C COMPONENTS

Purchase of Philips I²C components conveys a license under the Philips’ I²C patent to use the

components in the I²C system provided the system conforms to the I²C specification defined by

Philips. This specification can be ordered using the code 9398 393 40011.

1998 Jul 02

25

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

NOTES

1998 Jul 02

26

Philips Semiconductors

Product speciﬁcation

8-bit A/D and D/A converter

PCF8591

NOTES

1998 Jul 02

27

Philips Semiconductors – a worldwide company

Argentina: see South America

Middle East: see Italy

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TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874

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Tel. +90 212 279 2770, Fax. +90 212 282 6707

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Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,

20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557

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Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,

TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077

MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421

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Tel. +381 11 625 344, Fax.+381 11 635 777

For all other countries apply to: Philips Semiconductors,

Internet: http://www.semiconductors.philips.com

International Marketing & Sales Communications, Building BE-p, P.O. Box 218,

5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825

SCA60

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

Printed in The Netherlands

415106/1200/04/pp28

Date of release: 1998 Jul 02

Document order number: 9397 750 04058


型号：	PCF8591
厂家：	NXP
描述：	8-bit A/D and D/A converter 8位A / D和D / A转换器转换器
文件：	总28页 (文件大小：225K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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